STP50NE08

STP50NE08 N - CHANNEL ENHANCEMENT MODE ” SINGLE FEATURE SIZE™ ” POWER MOSFET TYPE ST P50NE08 s s s s s V DSS 80 V R DS(on) I D(on) x R DS(on) max V GS = 10 V DYNAMIC Symb ol g fs ( ∗ ) C iss C oss C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse T ransfer Capacitance Test Cond ition s V DS > I D(on) x R DS(on) max V DS = 25 V f = 1 MHz I D =25 A VGS = 0 Min. 20 Typ . 35 3850 480 105 5100 650 140 Max. Un it S pF pF pF 2/8 STP50NE08 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symb ol t d(on) tr Qg Q gs Q gd Parameter Turn-on Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Cond ition s V DD = 40 V ID = 25 A V GS = 10 V R G =4.7 Ω (see test circuit, figure 3) V DD = 64 V I D = 50 A V GS = 10 V Min. Typ . 37 95 85 19 28 Max. 50 130 110 Un it ns ns nC nC nC SWITCHING OFF Symb ol t r(Vof f) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Cond ition s V DD = 64 V I D = 50 A R G =4.7 Ω VGS = 10 V (see test circuit, figure 5) Min. Typ . 12 30 50 Max. 17 40 68 Un it ns ns ns SOURCE DRAIN DIODE Symb ol I SD I SDM (• ) V SD ( ∗ ) t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 50 A V GS = 0 100 400 8 di/dt = 100 A/µ s I SD = 50 A o Tj = 150 C V DD = 30 V (see test circuit, figure 5) Test Cond ition s Min. Typ . Max. 50 200 1.5 Un it A A V ns nC A ( ∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % ( •) Pulse width limited by safe operating area Safe Operating Area Thermal Impedance 3/8 STP50NE08 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STP50NE08 Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STP50NE08 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STP50NE08 TO-220 MECHANICAL DATA DIM. MIN. A C D D1 E F F1 F2 G G1 H2 L2 L4 L5 L6 L7 L9 DIA. 13.0 2.65 15.25 6.2 3.5 3.75 0.49 0.61 1.14 1.14 4.95 2.4 10.0 16.4 14.0 2.95 15.75 6.6 3.93 3.85 0.511 0.104 0.600 0.244 0.137 0.147 E mm TYP. MAX. 4.60 1.32 2.72 1.27 0.70 0.88 1.70 1.70 5.15 2.7 10.40 0.019 0.024 0.044 0.044 0.194 0.094 0.393 MIN. 0.173 0.048 0.094 4.40 1.23 2.40 inch TYP. MAX. 0.181 0.051 0.107 0.050 0.027 0.034 0.067 0.067 0.203 0.106 0.409 0.645 0.551 0.116 0.620 0.260 0.154 0.151 A C D1 L2 F1 D G1 Dia. F2 F L5 L7 L6 L9 L4 G H2 P011C 7/8 STP50NE08 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectonics. © 1998 SGS-THOMSON Microelectronics - Printed in Italy - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A . .. 8/8