STV6412A
Audio/video switch matrix
Features
■
I²C bus control
■
Standby mode with interrupt signal output
■
Video section
– 4 CVBS inputs, 3 CVBS outputs (one with
selectable chroma trap filter)
– 3 Y/C inputs, 2 Y/C outputs
– 6 dB gain on all CVBS/Y and C outputs
– Integrated 150 Ω buffers
– 1 Y/C adder
– 2 RGB/FB inputs, 1 tri-state RGB/FB output
with 6 dB adjustable gain (from +3dB to
+9dB)
– Video muting on all outputs
– 2 slow blanking inputs/outputs
– Sync bottom clamp on all CVBS/Y and
RGB inputs, average clamp on C Inputs
– Bandwidth: 15 MHz
– Crosstalk: 50 dB minimum
■
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LQFP64L(14 x 14 x 1.4 mm)
(Low-profile Quad Flat Package)
Order code: STV6412ADT
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ODescription
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Audio Section
– 4 stereo inputs, 3 stereo outputs
– 1 mono-sound output
– stereo-to-mono sound capability
– 0/6/9 dB selectable gain on one stereo
input
– Full range volume control with soft control
– Audio muting on all outputs
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The STV6412A is a highly integrated I²C buscontrolled audio and video switch matrix,
optimized for use in digital set-top box
applications. It provides all the audio and video
routings required in a full two SCART set-top box
design.
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www.st.com
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Contents
STV6412A
Contents
1
2
General overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2
Block diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
Latch up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.5
Audio section characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.6
Video section characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.7
Chroma section characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.8
Blanking section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.9
I²C bus characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
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I2C bus selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1
I2C bus addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.2
Power-on reset — bus register initial conditions . . . . . . . . . . . . . . . . . . . 21
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Input/output groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5
Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
6
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
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Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
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2/31
Doc ID 9754 Rev 2
STV6412A
General overview
1
General overview
1.1
Pin connections
Figure 1.
Pinout dagram
LOUT_TV
FILTER
AOUT_RF
VOUT_RF
VccB 5
BOUT_TV
VccB 4
GOUT_TV
GNDB
R/COUT_TV
VccB 3
Y/CVBSOUT_TV
VccB 2
COUT_VCR
VccB 1
Y/CVBSOUT_VCR
FBOUT_TV
FBIN_VCR
FBIN_ENC
C_GATE
VDD
ADD
SCL
SDA
GND
IT_OUT
SLB_TV
R/CIN_VCR
SLB_VCR
GIN_VCR
Vcc12
BIN_VCR
ROUT_TV
Vccao
LOUT_VCR
ROUT_VCR
LOUT_CINCH
ROUT_CINCH
NC
GNDA
VccA
RIN_TV
LIN_TV
CVBSIN_TV
RIN_VCR
LIN_VCR
Y/CVBSIN_VCR
GND
DECA
NC
BIN_ENC
LIN_ENC
GIN_ENC
RIN_ENC
R/CIN_ENC
LIN_AUX
CIN_ENC
RIN_AUX
YIN_ENC
GND
Y/CVBSIN_ENC
DECV
CVBSIN_AUX
Vcc
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Table 1.
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Pin description
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Pin no.
Symbol
1
VCC
2
CVBSIN_AUX
CVBS input from auxiliary
DECV
Video decoupling capacitor
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4
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Y/CVBSIN_ENC
GND
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Description
+5 V supply
Y/CVBS input from encoder
Ground
6
YIN_ENC
Y input from encoder
7
RIN_AUX
Audio right input from auxiliary
8
CIN_ENC
Chroma input from encoder
9
LIN_AUX
Audio left, input from auxiliary
10
R/CIN_ENC
11
RIN_ENC
Audio right, input from encoder
12
GIN_ENC
Green input from encoder
13
LIN_ENC
Audio left, input from encoder
Red/Chroma input from encoder
Doc ID 9754 Rev 2
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General overview
Table 1.
STV6412A
Pin description (continued)
Pin no.
Symbol
14
BIN_ENC
15
NC
16
DECA
Audio decoupling capacitor
17
GND
Ground
18
Y/CVBSIN_VCR
19
LIN_VCR
Audio left, input from VCR SCART
20
RIN_VCR
Audio right, input from VCR SCART
21
CVBSIN_TV
22
LIN_TV
Audio left, input from TV SCART
23
RIN_TV
Audio right, input from TV SCART
24
VCCA
Audio supply voltage - or - audio supply decoupling
25
GNDA
Audio ground
26
NC
Not connected
27
ROUT_CINCH
Audio right output to cinch
28
LOUT_CINCH
Audio left output to cinch
29
ROUT_VCR
Audio right output to VCR SCART
30
LOUT_VCR
Audio left output to VCR SCART
31
VCCAO
32
ROUT_TV
Audio right output to TV SCART
33
LOUT_TV
Audio left output to TV SCART
34
FILTER
35
AOUT_RF
36
VOUT_RF
37
VCCB5
BOUT_TV
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Blue input from encoder
Not connected
Y/CVBS input from VCR SCART
CVBS input from TV SCART
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Chroma trap filter
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VCCB4
GOUT_TV
Audio (L+R) output to RF modulator
CVBS video output to RF modulator
Video output buffer supply pin
Blue output to TV SCART
Video output buffer supply pin
Green output to TV SCART
41
GNDB
Video buffer ground
42
R/COUT_TV
43
VCCB3
Video output buffer supply pin
44
Y/CVBSOUT_TV
Y/CVBS output to TV SCART
45
VCCB2
Video output buffer supply pin
46
COUT_VCR
Chroma output to VCR SCART
47
VCCB1
Video output buffer supply pin
48
Y/CVBSOUT_VCR
Red/Chroma output to TV SCART
Y/CVBS output to VCR SCART
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Audio output supply voltage - or - main audio supply voltage
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Description
STV6412A
Table 1.
General overview
Pin description (continued)
Pin no.
Symbol
Description
49
FBOUT_TV
Fast blanking output to TV SCART
50
FBIN_VCR
Fast blanking input from VCR SCART
51
FBIN_ENC
Fast blanking input from encoder
52
C_GATE
53
VDD
+5 V I2C supply
54
ADD
I2C address selection
55
SCL
I2C bus clock
56
SDA
I2C bus data
57
GND
Ground digital
58
IT_OUT
Interrupt output
59
SLB_TV
Slow blanking input/output from TV SCART
60
R/CIN_VCR
61
SLB_VCR
Slow blanking input/output from VCR SCART
62
GIN_VCR
Green input from VCR SCART
63
VCC12
64
BIN_VCR
External MOS command for C_VCR bidirectional mode
Red input (or C input) from VCR SCART
+12 V supply
Blue input from VCR SCART
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General overview
STV6412A
1.2
Block diagrams
Figure 2.
STV6412A block diagram
FBIN_ENC
FBIN_ENC
FBIN_VCR
FBIN_VCR
FBOUT_TV
FB switch
BIN_ENC
BIN_VCR
GIN_ENC
GIN_VCR
BIN_ENC
BIN_VCR
GIN_ENC
3 to
9 dB
BOUT_TV
3 to
9 dB
R/CIN_ENC
R/CIN_VCR
Mute
GIN_VCR
R/CIN_ENC
GOUT_TV
3 to
9 dB
RGB switch
R/CIN_VCR
Mute
R/CIN_VCR
CIN_ENC
R/CIN_ENC
Mute
CIN_ENC
R/COUT_TV
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VOUT_RF
C switch
CVBSIN_AUX
Y/CVBSIN_VCR
YIN_ENC
Y/CVBSIN_ENC
Mute
CVBSIN_AUX
Y/CVBSIN_VCR
YIN_ENC
Mute
Mute
CIN_ENC
R/CIN_ENC
Mute
Y/CVBSIN_ENC
Trap
6 dB
Y/CVBS switch
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C switch
CVBSIN_AUX
CVBSIN_TV
Y_ENC
Y/CVBSIN_ENC
Mute
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CVBSIN_TV
LIN_AUX
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LIN_ENC
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0/6/9 dB
LIN_TV
RIN_AUX
Ob
RIN_ENC
RIN_TV
LIN_VCR
RIN_VCR
Y/CVBSOUT_TV
C_GATE
COUT_VCR
Slow blank
monitor
interrupt
signal
IT_OUT
SLB_TV
SLB_VCR
6 dB
Y/CVBSOUT_VCR
Y/CVBS switch
LIN_AUX
LIN_ENC
LIN_TV
RIN_AUX
RIN_ENC
RIN_TV
Mute
Stereo/mono
LOUT_VCR
ROUT_VCR
0/6 dB
ROUT_CINCH
0/6 dB
LOUT_CINCH
0/6 dB
AOUT_RF
VCR switch
0/6/9 dB
LIN_AUX
LIN_ENC
LIN_VCR
LIN_TV
RIN_AUX
RIN_ENC
RIN_VCR
RIN_TV
Mute
-62 dB
0/6 dB
Stereo/mono
LOUT_TV
ROUT_TV
-62 dB
ADD
0/6 dB
I²C bus
decoder
TV switch
6/31
FILTER
Doc ID 9754 Rev 2
SDA
SCL
STV6412A
Figure 3.
General overview
Functional block diagram
SCART1
TV
R/C
G
B
FAST BLANK
CVBS
AUDIO L
AUDIO R
CVBS/Y
AUDIO L
AUDIO R
SLOW BLANK
STV6412A
R, G, B, FB
switches
CVBS/Y
switches
RF MOD
CVBS
AUDIO L
AUDIO R
AUX
Audio
switches
Slow blank,
I/O control
INTERRUPT
MICRO
CINCH
output
R/C
G
B
FAST BLANK
CVBS/Y
C
AUDIO L
AUDIO R
Y
Encoder
R/C
G
B
FAST BLANK
CVBS/Y
AUDIO L
AUDIO R
CVBS/Y
C
AUDIO L
AUDIO R
SLOW BLANK
Chroma
switches
CVBS
AUDIO L+R
AUDIO L
AUDIO R
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SCART2
VCR
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Electrical characteristics
STV6412A
2
Electrical characteristics
2.1
Absolute maximum ratings
Symbol
Parameter
VCC12
Supply voltage for:
VCCAO
Value
Unit
- Slow blanking sections
13.2
V
- Audio drivers
13.2
V
VCCA
- Internal digital audio parts
10
V
VDD
- Digital parts
6
V
- Video sections
6
V
- Audio pins
0, VCCA
V
- Video pins
0, VCC or VCCBi
V
Vcc, VCCBi
Voltage at pin I to GND:
VI
- Bus pins
- Slow blanking pins
VESD
Maximum ESD voltage allowed. 100 pF capacitor
discharged through 1.5 kΩ serial resistor (human body
model)
Toper
Operating ambient temperature
Tstg
Storage temperature
2.2
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0, VCC12
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Junction-ambient thermal resistance (maximum)
Latch up
V
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±4
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Parameter
Rth(j-a)
2.3
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Thermal data
Symbol
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0, 5.5
0, +70
°C
-20, +150
°C
Value
Unit
48
°C/W
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At an ambient temperature of 25 °C, all pins meet the following specifications:
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Ob2.4
I trigger = 200 mA or I trigger = 200 mA.
Pin 58 (IT_OUT) does not meet this specification and the trigger current must be
limited to -100 mA.
Recommended operating conditions
Tamb = 25 °C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V
RGA = 600 Ω, RLOUTA = 10 kΩ, RGV = 50 Ω, RLOUTV = 150 Ω, unless otherwise specified.
8/31
Doc ID 9754 Rev 2
STV6412A
Table 2.
Electrical characteristics
Supply voltages
Symbol
VDD
Parameter
Test condition
Digital supply voltage
- Decoupling capacitor on VCCA
- Connected to VCCA
Min.
Typ.
Max.
Unit
4.75
5
5.25
V
11.2
8.5
12
9
12.8
9.5
V
V
VCCAO
Audio operating supply voltage
VCC
Video operating supply voltage
4.75
5
5.25
V
VCC12
Slow blanking control supply voltage
11.2
12
12.8
V
Min.
Typ.
Max.
Unit
4.5
10
mA
Table 3.
Active mode (all channels ON)
Symbol
Parameter
Test condition
IDD
Digital supply current
VDD = 5 V
ICCA
Audio supply current
VCCAO = 12 V, no load
9
15
mA
VCC = 5 V, no load
43
60
mA
ICCV
ICC12
Table 4.
Total video supply current
(VCC+VCCB1+VCCB2+VCCB3+VCCB4+VCCB5)
VCC12 = 12 V
SLB input mode
SLB output mode, no load
12 V Supply Current
Standby mode (all channels OFF)
Symbol
Parameter
IDD
Digital supply current
VDD = 5 V
ICCAstd
Audio supply current
VCCA0 = 12 V, no load
ICCVstd
Total video supply current
VCC = 5 V
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Test condition
Min.
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2.5
1
4
mA
Typ.
Max.
Unit
4.5
10
mA
3
mA
1
mA
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2.5
Audio section characteristics
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Tamb = 25°C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V
RGA = 600 Ω, RLOUTA = 10 kΩ, RGV = 50 Ω, RLOUTV = 150 Ω, unless otherwise specified.
Table 5.
Symbol
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Audio section characteristics
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Parameter
Test condition
SVR100 Supply voltage rejection
VRIPPLE = 500m VRMS at f = 100 Hz,
Gain= 0 dB,
DECA filter cap = 47 µF
DECA filter cap = 220 µF
SVR1K
Supply voltage rejection
VRIPPLE = 500m VRMS at f = 1 kHz,
Gain = 0 dB
VINDC
Input DC Level
VCCA = 9 V
VINAC
Input signal amplitude
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RIN
Min
.
Typ.
Max
.
60
70
80
dB
dB
70
80
dB
VCCA/2
V
2
Input resistance
30
Doc ID 9754 Rev 2
Unit
50
VRMS
kΩ
9/31
Electrical characteristics
Table 5.
STV6412A
Audio section characteristics (continued)
Symbol
Parameter
Min
.
Test condition
RINmatch Input resistance matching
FRANGE
-3 dB, 0.5 VRMS, RLOAD = 10 kΩ,
gain = 0 dB
Bandwidth
Channel separation, from audio
inputs
between L & R of TV outputs
VIN = 0.5 VRMS, f = 1 kHz, on one
input,
RLOAD = 10 kΩ, gain = 0 dB
Ci
Channel isolation from video inputs
VIN = 1 Vpp, f = 15 kHz, on one point
VOUT
Output DC Level
VCCA = 9 V
VOFF
DC offset change
Switching between inputs
ROUT
Output resistance
PHD
Phase dDifference
f = 1 kHz, 1 VRMS input on each
input channel
ASN
S/N Ratio
f = 1 kHz, 1 VRMS input (gain = 0dB)
weighted CCIR 468-4 quasi peak
eNI
Equivalent RMS Input voltage noise
BW = 20 Hz, 20 kHz flat, gain =
0 dB
G0
0 dB gain
0.5 VRMS, RLOAD = 10 kΩ, gain =
0 dB
GSTEP
Gain step
-62 dB to +6 dB ( see Figure 2)
GMATCH1
Gain matching between different
inputs of one output
VIN = 0.5 VRMS, 1 kHz, Gain = 0 dB
GMATCH2
Gain matching between left/right
outputs of one input channel
VIN = 0.5 VRMS, 1 kHz, Gain = 0 dB
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80
70
±10
%
kHz
THD = 0.2%, 1 kHz
RL
Output load resistance
Mute suppression
dB
90
74
dB
dB
85
dB
VCCA/2
V
1
±15
60
120
mV
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3
70
5
-0.5
+0.5
2
W
° deg.
dB
µV
dB
dB
-0.5
0.5
dB
-0.5
0.5
dB
0.1
0.1
0.1
%
%
%
0.01
0.01
0.01
VOUT = 0.5 VRMS, 1 kHz, LPF @
80 kHz
Output clipping level
2.6
±2
50
eP
VCL
Mute
Unit
0.5
CS
Total harmonic distortion
ENC input at 0 dB
ENC input at 6 dB
ENC input at 9 dB
Max
.
-0.5 VRMS, 20 Hz to 20 kHz,
gain = 0 dB
Flatness Spread of gain in audio band
THD0
THD6
THD9
Typ.
2.1
2.3
VRMS
VIN = 1 VRMS, THD = 0.3%,
Gain = 0 dB
2
2.25
kΩ
VIN = 0.5 VRMS, on one point
-90
dB
Video section characteristics
Tamb = 25 °C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V
RGA = 600 Ω, RLOUTA = 10 kΩ, RGV = 50 Ω, RLOUTV = 150 Ω, unless otherwise specified.
10/31
Doc ID 9754 Rev 2
STV6412A
Table 6.
Electrical characteristics
Video section characteristics
Symbol
Parameter
VDCIN
DC input level
Bottom synch pulse
ICLAMP
Clamping current
at VDCIN -400 mV
Input leakage current
VIN = VDCIN +1 V
ILEAK
CIN
Input capacitance
VIN
Max input signal
DYN
Dynamic output signal
BW
Min.
1
Typ.
Max.
Unit
2
V
2
mA
1
10
µA
2
pF
VCC = 5 V
1.5
VPP
VCC = 5 V
3
VPP
15
15
10
MHz
MHz
MHz
Bandwidth at -3 dB
Y/CVBS
VIN = 1 VPP
RGB
VIN = 1 VPP
Y/C mixer (on VOUT-RF) VIN = 1 VPP, VINC = muted
Flatness
Spread of gain in video band
(15 kHz - 5 MHz)
Y/CVBS
VIN = 1 VPP
RGB
VIN = 1 VPP
Y/C Mixer (on VOUT-RF) VIN = 1 VPP, VINC = muted
Crosstalk isolation between input
channel
VIN = 1 VPP at f = 4.43 MHz,
on one point
CTo
Crosstalk isolation between output
channel
VIN = 1 VPP at f = 4.43 MHz,
on one point, RLOAD = 150Ω
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12
8
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CTi
+/-0.5
+/-0.5
+/-1.5
dB
dB
dB
60
dB
50
dB
5
10
Ω
5.5
6
6.5
dB
VIN = 1 VPP, gain set to 6 dB
-0.3
0
0.3
dB
3 dB to 6 dB
0.75
1
1.25
dB
Gain on Y,/CVBS channels
VIN = 1 VPP
5.5
6
6.5
dB
Gain matching between Y, CVBS
inputs
VIN = 1 VPP
-0.5
0
0.5
dB
DC output voltage
Bottom sync pulse
0.6
V
DCOUT RF RF output voltage
Bottom sync pulse
1
V
Differential phase
VIN = 1 VPP at f = 4.43 MHz
1
5
° deg.
Differential gain
VIN = 1 VPP at f = 4.43 MHz
1
5
%
Mute
Mute suppression
VIN = 1 VPP at f = 5 MHz on one
point
LNL
Luminance non-linerarity
VSN
Video S/N ratio
ROUT
Output resistance
GRGB
Gain at RGB outputs
VIN = 1 Vpp, gain set to 6 dB
Gain matching between R, G, B
Step of gain
GRGBM
GRGBSTE
P
GYCVBS
GYCVBSM
)
s
t(
c
du
o
r
eP
t
e
ol
DCOUT
bs
O
Test condition
DPHI
DG
Note:
1
-55
dB
0.3
Refer to Note 1
3
65
%
dB
S/N = 20 log (VOUT Black to White = 0.7 VPP / VNoise (mVRMS) weighted CCIR 567).
Doc ID 9754 Rev 2
11/31
Electrical characteristics
2.7
STV6412A
Chroma section characteristics
Tamb = 25 °C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V
RGA = 600 Ω, RLOUTA = 10 kΩ, RGV = 50 Ω, RLOUTV = 150 Ω, unless otherwise specified.
Table 7.
Chroma section characteristics
Symbol
VDCIN
Parameter
Test conditions
Min.
DC input level
RIN
Input resistance
CIN
Input capacitance
VIN
Max input signal
30
Typ.
Max.
Unit
3
V
50
kΩ
2
pF
1.5
VPP
DYN
Dynamic output signal
3
VPP
DCOUT
DC output VCR voltage
2.2
V
55
)
s
t(
CBW
CTi
CTo
ROUT
GOUTC
GCM
Chroma Bandwidth
CIN = 1 VPP at -3 db
Crosstalk isolation between input channel
VIN = 1 VPP at f = 4.43 MHz,
on one input
Crosstalk isolation between output channel
VIN = 1 VPP at f = 4.43 MHz,
on one input, RLOAD = 150 Ω
10
c
u
d
o
r
50
Output resistance
Gain at OUTC
MHz
VIN = 1 Vpp
dB
5
10
W
5.5
6
6.5
dB
-0.5
0
0.5
dB
eP
let
dB
Gain matching between C inputs
VIN = 1 VPP
Mute suppression
VIN = 1 VPP at f = 4.43 MHz,
on one input
CToYdel
Chroma to luma delay, source Y/C
Pin other than VOUT_RF,
VPP @ 4.43 MHz,
20
ns
CToYdel
Chroma to luma delay, source Y/C
Pin VOUT_RF
20
ns
Mute
o
s
b
-55
dB
O
)
s
(
t
c
u
d
2.8
Blanking section
Tamb = 25 °C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V
o
r
eP
RGA = 600 Ω, RLOUTA = 10 kΩ, RGV = 50 Ω, RLOUTV = 150 Ω, unless otherwise specified.
t
e
l
o
s
Table 8.
Slow blanking section
Symbol
Ob
Parameter
Test condition
Min.
Typ.
Max.
Unit
Input mode
SLBlow
Input low level threshold
2.5
3.25
4
V
SLBhigh
Input high level threshold
7.5
8.25
9
V
50
100
µA
0.02
1.5
V
IIN
Input current
Output mode
SLBlow
12/31
Output low level (int. TV)
0
Doc ID 9754 Rev 2
STV6412A
Table 8.
Electrical characteristics
Slow blanking section (continued)
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
SLBmed
Output medium level (ext. 16/9)
5
5.75
6.5
V
SLBhigh
Output high level (ext. 4/3)
10
11
12
V
Min.
Typ.
Max.
Unit
0.4
0.7
0.9
V
2
10
µA
0.5
V
3.8
15
)
s
t(
10
10
ns
ns
Table 9.
Fast blanking section
Symbol
Parameter
Test condition
Input mode
FBlow/high Input low/high level threshold
Input current
IIN
Output mode
FBLOW
Output low level
FBHIGH
Output high level
FBDEL
Fast blanking RGB delay
FBTRANS
Table 10.
RLOAD = 150 Ω
At 50% on digital RGB transients,
at 2 V on FB rise transient, at 1 V
on FB fall, CLOAD = 10pF
maximum
FB transitions at FB output
Rise Time
Fall Time
CLOAD = 10 pF maximum
between 10% and 90%
between 90% and 10%
Parameter
Test condition
C_GATE-H Pull-up resistor value to VCCB1
)
s
t(
c
du
C_GATE-L Output low level
3.4
c
u
d
o
r
eP
t
e
l
o
s
b
C_Gate function output
Symbol
3.0
Min.
-O
Typ.
Max.
20
IIN = 0 mA
IIN = 1 mA
V
ns
Unit
kΩ
0.3
0.7
V
V
Max.
Unit
Interrupt output (refer to Note 1)
Symbol
Parameter
o
r
eP
Min.
Typ.
IT-Leak
High level leakage
External pull-up to 5 V
10
µA
IT-Low
Output low level (active)
IIN = 0 mA
IIN = 1 mA
0.3
0.7
V
V
Typ.
Max.
Unit
0
0.2
V
VDD
V
10
µA
t
e
ol
bs
Table 11.
O
Test condition
Symbol
Address selection input
Parameter
Test condition
Min.
ADDsel_L Address selection low level
ADDsel_H Address selection high level
Leakage current
ILEAK
Note:
2.5
1
The interrupt is forced to a low level when a change is detected on slow blanking inputs. It
can be used in standby mode to wake up the microprocessor. It is released when the I2C
bus register is read.
Doc ID 9754 Rev 2
13/31
Electrical characteristics
2.9
STV6412A
I²C bus characteristics
Tamb = 25°C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V
RGA = 600Ω, RLOUTA = 10kΩ, RGV = 50Ω, RLOUTV = 150Ω, unless otherwise specified.
Table 12.
I²C bus characteristics
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
SCL
VIL
Low level input voltage
-0.3
1.5
V
VIH
High level input voltage
2.3
5.5
V
ILI
Input leakage current
10
µA
V
VIN = 0 to 5.5 V
-10
0
SDA
VIL
Low level input voltage
-0.3
1.5
VIH
High level input voltage
2.3
5.5
ILI
Input leakage current
CI
Input capacitance
tR
Input rise time
1.5 V to 3 V
tF
Input fall time
3 V to 1.5 V
Low level output voltage
IOL = 3 mA
tF
Output fall time
3 V to 1.5 V
CL
Load capacitance
VOL
VIN = 0 to 5.5 V
Timing
tLOW
Clock low period
tHIGH
Clock high period
c
u
d
O
)
t(s
tSU,DAT
Data setup time
tHD,DAT
Data hold time
tSU,STO
Setup time from clock high to stop
tBUF
l
o
bs
o
r
eP
Start setup time following a stop
t
e
l
o
s
tHD,STA
Start hold time
tSU,STA
Start Setup time following clock low
to high transition
Ob
Note:
14/31
1
-10
0
10
)
s
t(
1
µs
300
ns
0.4
V
250
ns
400
pF
10
c
u
d
o
r
P
e
et
V
µA
pF
4.7
µs
4
µs
250
ns
0
340
ns
4
µs
4.7
µs
4
µs
4.7
µs
The device can also operate at 400 kHz and is capable of interfacing with +3.3 V or + 5 V
logic levels.
Doc ID 9754 Rev 2
STV6412A
Figure 4.
Electrical characteristics
I²C bus timing
(start, stop)
)
s
t(
c
u
d
o
r
l
o
bs
P
e
et
O
)
s
(
t
c
u
d
o
r
eP
t
e
ol
s
b
O
Doc ID 9754 Rev 2
15/31
I2C bus selection
STV6412A
I2C bus selection
3
Data transfers follow the usual I2C format; that is, after the start condition (S), a 7-bit slave
address is sent, followed by an eight-bit data direction bit (W). An 8-bit sub-address is sent
to select a register, followed by an 8-bit data word to be included in the register. The IC’s I2C
bus decoder enables the automatic incrementation mode in write mode.
String format
Write only mode (S = Start condition, P = Stop condition, A = Acknowledge)
S
Slave address
0
A
Sub-address
A
Data
A
P
Read only mode
S
Slave address
1
A
Data
A
P
)
s
t(
Slave address
Address
A6
A5
A4
A3
A2
A1
Value
1
0
0
1
0
1
Auto increment mode
S
0
Slave address
A
Sub-address
A
Data0
A
A
....
Sub-address +1
X
Datan
A
P
Sub-address + N
O
)
I2C bus addresses
3.1
Data1
l
o
bs
Sub-address
P
e
et
c
u
d
o
r
A0
s
(
t
c
u
d
Write address: 1001 01X0, read address: 1001 01X1
Selection pin grounded address: X = 0, write address = 94(hex), read address = 95(hex)
Selection pin to supply address: X = 1, write address = 96(hex), read address = 97(hex)
Table 13.
o
r
eP
Input signal summary (write mode)
t
e
l
o
s
Reg
addr
(hex)
Ob
d7
d6
Data
d5
d4
d3
d2
d1
d0
Audio
00
01
16/31
TV stereo
mono
VCR stereo
Mono
TV 0/6 dB
Not used
(see
Note 1)
TV volume-62 dB to 0 dB - 2 dB steps
VCR audio
switch control
CINCH
audio gain
Doc ID 9754 Rev 2
Soft volume
mode
TV/CINCH audio switch control
STV6412A
Table 13.
I2C bus selection
Input signal summary (write mode) (continued)
Data
Reg
addr
(hex)
d7
d6
d5
d4
d3
d2
d1
d0
Video
02
VCR
Chroma
muted
VCR video and Chroma switch control
03
RGB and FB
tri-state
RGB gain
TV Chroma
muted
TV video and Chroma switch control
Fast blanking
mode/input selection
RGB switch control
Miscellaneous
04
IT enable
05
SLB mode
VCR slow blanking
Not used
(see
Note 1)
VCR-C
VCR-C gate
output control
control
RF trap
filter control
ENC audio Input gain
0/6/9 dB
TV slow blanking
RF
outputs
Note:
1
Table 14.
Reg.
addr
(hex)
TV
outputs
CINCH
outputs
VCR
outputs
AUX
inputs
TV
inputs
Unused data must be set to “0”.
l
o
bs
TV audio output
Data
Description
Bits
O
)
TV R or C
output
selection
VCR R/C
sub clamp
ENC R/C
sub clamp
)
s
t(
c
u
d
o
r
STB-BY
06
RF adder
control
VCR
inputs
ENC
inputs
P
e
et
Comments
d7 d6 d5 d4 d3 d2 d1 d0
1
Soft volume change
00
o
r
eP
TV stereo or mono mode
t
e
ol
X
X
X
X
X
X
X
X
X
X
X
X
0
1
Active
Disabled
5
X
X
X
X
0
1
0
1
0
1
0
1
0
1
X
X
0 dB
-62 dB (-2 dB/step)
1
X
X
0
1
X
X
X
X
X
X
X
X
X
X
X
X
0 dB
+6 dB
1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0 = stereo
1 = mono
s
(
t
c
u
d
Level adjustment
6 dB extra gain
X
X
s
b
O
Doc ID 9754 Rev 2
17/31
I2C bus selection
Table 15.
Reg.
addr
(hex)
STV6412A
Audio selection & VCR audio output
Data
Description
Bits
3
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Muted
Encoder L/R selected
VCR L/R selected
AUX L/R selected
TV L/R selected
Not allowed
Not allowed
Not allowed
1
X
X
X
X
X
X
X
X
0
1
X
X
X
X
X
X
0 dB
Follow TV gain
2
X
X
X
X
X
X
X
X
0
0
1
1
0
1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Muted
Encoder L/R selected
TV L/R selected
AUX L/R selected
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0 = stereo
1 = mono
TV & CINCH audio
output selection
01
Comments
d7 d6 d5 d4 d3 d2 d1 d0
CINCH audio gain
VCR audio output selection
VCR stereo or mono mode
1
Table 16. TV & VCR video selection
Reg.
addr
(hex)
Data
Description
TV video output selection
02
t
e
ol
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
P
e
et
Comments
1
X
X
X
X
X
X
3
X
X
X
X
X
X
X
X
0
0
0
0
1
1
1
1
1
0
1
X
X
VCR video output selection
O
VCR Chroma output control
X
X
X
X
X
X
X
X
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Y/CVBS muted & Chroma muted
Y/CVBS_ENC & R/C_ENC
Y_ENC & C_ENC
Y/CVBS_VCR & R/C_VCR
CVBS_AUX & Chroma muted
Not allowed
Not allowed
Not allowed
X
X
0
1
X
X
X
X
X
X
Chroma defined by d2d1d0
Chroma force to mute
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Y/CVBS muted & Chroma muted
Y/CVBS_ENC & R/C_ENC
Y_ENC & C_ENC
CVBS_TV & Chroma muted
CVBS_AUX & Chroma muted
Not allowed
Not allowed
Not allowed
X
X
X
X
X
X
X
X
X
X
X
X
Chroma defined by d6d5d4
Chroma force to mute
O
)
s
(
t
c
u
d
o
r
eP
TV Chroma output control
18/31
c
u
d
o
r
d7 d6 d5 d4 d3 d2 d1 d0
3
bs
l
o
bs
Bits
)
s
t(
Doc ID 9754 Rev 2
STV6412A
Table 17.
Reg.
addr
(hex)
03
I2C bus selection
RGB & fast blanking outputs
Data
Description
Bits
Fast blanking control
2
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
1
1
0
1
0
1
FB forced to low level
FB forced to high level
FB from encoder
FB from VCR
RGB selection
2
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
1
1
0
1
0
1
X
X
X
X
X
X
X
X
Muted
RGB_ENC selected
RGB_VCR selected
Not allowed
RGB gain
2
X
X
X
X
X
X
X
X
0
0
1
1
0
1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
+6 dB gain
+5 dB gain
+4 dB gain
+3 dB gain
1
X
X
0
1
X
X
X
X
X
X
X
X
X
X
X
X
+0 dB extra gain
+3 dB for weak input signals
1
0
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
RGB and FB outputs high
impedance state
RGB and FB outputs active
RGB and fast blanking
control
Table 18.
Reg.
addr
(hex)
RF & miscellaneous control
Data
Description
)
s
t(
c
u
d
o
r
P
e
et
Comments
d7 d6 d5 d4 d3 d2 d1 d0
RF output: adder control
and chroma sub-carrier
filter selection
C_Gate output control
t
e
l
o
s
Slow blanking mode
IT enable
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
1
X
X
1
1
1
2
X
X
X
X
X
X
0
1
Red signal selected
Chroma signal selected
X
X
X
X
X
X
X
X
X
X
0
1
0
1
X
X
X
X
X
X
CVBS to RF output
Y + C to RF output
Filter not active
Filter active
X
X
X
X
0
1
X
X
X
X
X
X
High level
Low level
X
X
X
X
0
1
X
X
X
X
X
X
X
X
Tri-state mode (high impedance)
Active
X
X
0
1
X
X
X
X
X
X
X
X
X
X
X
X
Normal mode
SLB TV is driven by SLB VCR
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
No interrupt flag
IT enable
O
)
s
(
t
c
u
d
o
r
eP
C_VCR output control
Ob
l
o
bs
Bits
R/C TV output selection
04
Comments
d7 d6 d5 d4 d3 d2 d1 d0
Doc ID 9754 Rev 2
19/31
I2C bus selection
Table 19.
Reg.
addr
(hex)
STV6412A
l
Slow blanking & inputs contro
Data
Description
Bits
Encoder R/Csub clamp
VCR R/Csub clamp
Encoder input level
adjustment
05
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
Bottom level clamp
Average level clamp
1
X
X
X
X
X
X
X
X
X
X
X
X
0
1
X
X
Bottom level clamp
Average level clamp
2
X
X
X
X
X
X
X
X
X
X
X
X
0
0
1
0
1
0
X
X
X
X
X
X
0 dB for normal audio inputs
+6 dB for weak audio inputs
+9 dB for weak audio inputs
2
X
X
X
X
X
X
X
X
0
0
1
1
0
1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Input mode only
Output < 2 V
Output 16/9 format
Output 4/3 format
2
0
0
1
1
0
1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Input mode only
Output < 2 V
Output 16/9 format
Output 4/3 format
Slow blanking TV SCART
Slow blanking VCR SCART
Table 20.
Reg.
addr
(hex)
Bits
AUX inputs
o
r
eP
VCR outputs
t
e
ol
CINCH outputs
TV outputs
RFmod outputs
Full stop
1
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
1
Comments
X
X
X
X
X
X
0
1
Inputs active
Inputs disabled
O
)
X
X
X
X
0
1
X
X
Inputs active
Inputs disabled
X
X
X
X
0
1
X
X
X
X
Inputs active
Inputs disabled
X
X
X
X
X
X
X
X
0
1
X
X
X
X
X
X
Inputs active
Inputs disabled
1
X
X
X
X
X
X
0
1
X
X
X
X
X
X
X
X
Audio & video outputs ON
Audio & video outputs OFF
1
X
X
X
X
0
1
X
X
X
X
X
X
X
X
X
X
Audio & video outputs ON
Audio & video outputs OFF
1
X
X
0
1
X
X
X
X
X
X
X
X
X
X
X
X
Audio & video outputs ON
Audio & video outputs OFF
1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Audio & video outputs ON
Audio & video outputs OFF
1
1
1
1
1
1
1
1
Only I2C bus and slow blanking
detection parts are supplied.
s
(
t
c
u
d
TV inputs
20/31
t
e
l
o
s
b
d7 d6 d5 d4 d3 d2 d1 d0
VCR inputs
s
b
O
eP
Data
Description
)
s
t(
c
u
d
o
r
Standby modes
ENC inputs
06
Comments
d7 d6 d5 d4 d3 d2 d1 d0
Doc ID 9754 Rev 2
STV6412A
Table 21.
I2C bus selection
Output signals (read mode)
Reg.
addr
(hex)
Data
Description
Bits
Comments
d7 d6 d5 d4 d3 d2 d1 d0
2
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
1
1
0
1
Input
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