TDA7295S

TDA7295S ® 80V - 80W DMOS AUDIO AMPLIFIER WITH MUTE/ST-BY VERY HIGH OPERATING VOLTAGE RANGE (±40V) DMOS POWER STAGE HIGH OUTPUT POWER (80W @ THD = 10%, MUSIC POWER) MUTING/STAND-BY FUNCTIONS NO SWITCH ON/OFF NOISE VERY LOW DISTORTION VERY LOW NOISE SHORT CIRCUIT PROTECTION THERMAL SHUTDOWN CLIP DETECTOR MODULARITY (MORE DEVICES CAN BE EASILY CONNECTED IN PARALLEL TO DRIVE VERY LOW IMPEDANCES) MULTIPOWER BCD TECHNOLOGY Multiwatt15 ORDERING NUMBER: TDA7295S c u d class TV). Thanks to the wide voltage range and to the high out current capability it is able to supply the highest power into both 4Ω and 8Ω loads. The built in muting function with turn on delay simplifies the remote operation avoiding switching on-off noises. Parallel mode is made possible by connecting more device through of pin11. High output power can be delivered to very low impedance loads, so optimizing the thermal dissipation of the system. DESCRIPTION The TDA7295S is a monolithic integrated circuit in Multiwatt15 package, intended for use as audio class AB amplifier in Hi-Fi field applications (Home Stereo, self powered loudspeakers, Top- e t le o r P o s b O - Figure 1: Typical Application and Test Circuit ) s ( ct +Vs C7 100nF u d o ) s t( C6 1000µF R3 22K r P e C2 22µF t e l o bs O VMUTE R2 680Ω C1 470nF IN- 2 IN+ 3 BUFFER DRIVER +Vs +PWVs 11 7 13 - MUTE STBY BOOT LOADER C5 22µF 6 10 5 THERMAL SHUTDOWN MUTE VSTBY 12 4 (**) R5 10K OUT + R1 22K SGND 14 9 S/C PROTECTION (*) BOOTSTRAP CLIP DET VCLIP STBY R4 22K C3 10µF C4 10µF 1 8 15 STBY-GND -Vs -PWVs C9 100nF C8 1000µF D97AU805A (*) see Application note (**) for SLAVE function January 2003 -Vs 1/13 TDA7295S PIN CONNECTION (Top view) 15 -VS (POWER) 14 OUT 13 +VS (POWER) 12 BOOTSTRAP LOADER 11 BUFFER DRIVER 10 MUTE 9 STAND-BY 8 -VS (SIGNAL) 7 +VS (SIGNAL) 6 BOOTSTRAP 5 CLIP AND SHORT CIRCUIT DETECTOR 4 SIGNAL GROUND 3 NON INVERTING INPUT 2 INVERTING INPUT 1 STAND-BY GND TAB CONNECTED TO PIN 8 D97AU806 c u d QUICK REFERENCE DATA Symbol Parameter Test Conditions GLOOP P e let Closed Loop Gain 26 VS = ±34V; RL = 8Ω; THD = 10% Output Power Ptot SVR Max. Unit ± 40 V 45 dB 80 W VS = ±27V; RL = 4Ω; THD = 10% 80 W o s b O - 75 dB Supply Voltage Rejection ABSOLUTE MAXIMUM RATINGS Symbol Typ. ro ±12 Supply Voltage Operating VS Parameter ) s ( ct VS V1 Supply Voltage (No Signal) VSTAND-BY GND Voltage Referred to -VS (pin 8) V2 Input Voltage (inverting) Referred to -VS Value Unit ±42 80 V V 80 V Maximum Differential Inputs ±30 V V3 Input Voltage (non inverting) Referred to -VS 80 V V4 Signal GND Voltage Referred to -VS 80 V V5 Clip Detector Voltage Referred to -VS 80 V Bootstrap Voltage Referred to -VS 80 V Stand-by Voltage Referred to -VS Mute Voltage Referred to -VS 80 80 V V Buffer Voltage Referred to -VS 80 V Bootstrap Loader Voltage Referred to -VS 80 V V2 - V3 V9 V10 bs V11 o r P e du t e l o V6 V12 O Min. ) s t( Output Peak Current 10 A Ptot Power Dissipation Tcase = 70°C 50 W Top Operating Ambient Temperature Range 0 to 70 °C 150 °C IO Tstg, Tj Storage and Junction Temperature THERMAL DATA Symbol Rth j-case 2/13 Description Thermal Resistance Junction-case Typ Max Unit 1 1.5 °C/W TDA7295S ELECTRICAL CHARACTERISTICS (Refer to the Test Circuit VS = ±30V, RL = 8Ω, GV = 30dB; Rg = 50 Ω; Tamb = 25°C, f = 1 kHz; unless otherwise specified). Symbol Parameter Test Condition Min. VS Operating Supply Range ±10 Iq Quiescent Current 20 Ib Typ. 30 Max. Unit ±40 V 65 mA Input Bias Current 500 nA VOS Input Offset Voltage ±10 mV IOS PO Input Offset Current ±100 nA RMS Continuous Output Power d d = 0.5%: VS = ± 30V, RL = 8Ω VS = ± 26V, RL = 6Ω VS = ± 22V, RL = 4Ω 45 45 45 Music Power (RMS) (*) ∆t = 1s d = 10%; RL = 8Ω ; VS = ±34V (***)RL = 4Ω; VS = ±27V Total Harmonic Distortion (**) PO = 5W; f = 1kHz PO = 0.1 to 30W; f = 20Hz to 20kHz Overcurrent Protection Threshold 6 SR Slew Rate 7 GV Open Loop Voltage Gain GV eN Closed Loop Voltage Gain fL, fH Frequency Response (-3dB) PO = 1W Input Resistance Ri SVR Supply Voltage Rejection ) s ( ct STAND-BY FUNCTION (Ref: -VS or GND) VST on Stand-by on Threshold VST off Stand-by off Threshold ATTst-by u d o Stand-by Attenuation b O - f = 100Hz; Vripple = 0.5Vrms Thermal Shutdown TS so r P e 0.1 % % 0.1 % % c u d ) s t( A 10 V/µs 80 dB 30 1 2 45 dB 5 µV µV 20Hz to 20kHz 100 60 kΩ 75 dB 150 °C 1.5 3.5 70 Quiescent Current @ Stand-by Iq st-by W W o r P 26 e t le 80 80 0.01 IMAX A = curve f = 20Hz to 20kHz W W W 0.005 VS = ±22V, RL = 4Ω: PO = 5W; f = 1kHz PO = 0.1 to 30W; f = 20Hz to 20kHz Total Input Noise 50 50 50 V V 90 1 dB 3 mA 1.5 V MUTE FUNCTION (Ref: -VS or GND) Mute on Threshold VMon t e l o VMoff ATTmute Mute off Threshold Mute Attenuation 3.5 60 80 V dB s b O Note (*): MUSIC POWER is the maximal power which the amplifier is capable of producing across the rated load resistance (regardless of non linearity) 1 sec after the application of a sinusoidal input signal of frequency 1KHz. Note (**): Tested with optimized Application Board (see fig. 2) Note (***): Limited by the max. allowable out current 3/13 TDA7295S Figure 2: Typical Application P.C. Board and Component Layout (scale 1:1) c u d e t le ) s ( ct u d o r P e t e l o s b O 4/13 o s b O - o r P ) s t( TDA7295S APPLICATION SUGGESTIONS (see Test and Application Circuits of the Fig. 1) The recommended values of the external components are those shown on the application circuit of Figure 1. Different values can be used; the following table can help the designer. LARGER THAN SUGGESTED SMALLER THAN SUGGESTED INCREASE INPUT IMPEDANCE DECREASE INPUT IMPEDANCE COMPONENTS SUGGESTED VALUE PURPOSE R1 (*) 22k INPUT RESISTANCE R2 680Ω R3 (*) 22k R4 22k ST-BY TIME CONSTANT LARGER ST-BY ON/OFF TIME SMALLER ST-BY ON/OFF TIME; POP NOISE R5 10k MUTE TIME CONSTANT LARGER MUTE ON/OFF TIME SMALLER MUTE ON/OFF TIME C1 0.47µF INPUT DC DECOUPLING C2 22µF FEEDBACK DC DECOUPLING C3 10µF MUTE TIME CONSTANT C4 10µF ST-BY TIME CONSTANT C5 22µFXN (***) BOOTSTRAPPING C6, C8 1000µF CLOSED LOOP GAIN DECREASE OF GAIN INCREASE OF GAIN SET TO 30dB (**) INCREASE OF GAIN DECREASE OF GAIN ) s ( ct u d o C7, C9 0.1µF r P e (*) R1 = R3 for pop optimization ) s t( HIGHER LOW FREQUENCY CUTOFF c u d LARGER MUTE ON/OFF TIME SMALLER MUTE ON/OFF TIME LARGER ST-BY ON/OFF TIME SMALLER ST-BY ON/OFF TIME; POP NOISE e t le o s b O - o r P HIGHER LOW FREQUENCY CUTOFF SIGNAL DEGRADATION AT LOW FREQUENCY SUPPLY VOLTAGE BYPASS SUPPLY VOLTAGE BYPASS DANGER OF OSCILLATION (**) Closed Loop Gain has to be ≥ 26dB t e l o (***) Multiply this value for the number of modular part connected s b O Slave function: pin 4 (Ref to pin 8 -VS) -VS +3V -VS +1V -VS MASTER UNDEFINED Note: If in the application, the speakers are connected via long wires, it is a good rule to add between the output and GND, a Boucherot Cell, in order to avoid dangerous spurious oscillations when the speakers terminal are shorted. The suggested Boucherot Resistor is 3.9Ω/2W and the capacitor is 1µF. SLAVE D98AU821 5/13 TDA7295S INTRODUCTION In consumer electronics, an increasing demand has arisen for very high power monolithic audio amplifiers able to match, with a low cost, the performance obtained from the best discrete designs. The task of realizing this linear integrated circuit in conventional bipolar technology is made extremely difficult by the occurence of 2nd breakdown phoenomenon. It limits the safe operating area (SOA) of the power devices, and, as a consequence, the maximum attainable output power, especially in presence of highly reactive loads. Moreover, full exploitation of the SOA translates into a substantial increase in circuit and layout complexity due to the need of sophisticated protection circuits. To overcome these substantial drawbacks, the use of power MOS devices, which are immune from secondary breakdown is highly desirable. The device described has therefore been developed in a mixed bipolar-MOS high voltage technology called BCDII 100. 1) Output Stage The main design task in developping a power operational amplifier, independently of the technology used, is that of realization of the output stage. The solution shown as a principle shematic by Fig3 represents the DMOS unity - gain output buffer of the TDA7295S. This large-signal, high-power buffer must be capable of handling extremely high current and voltage levels while maintaining acceptably low harmonic distortion and good behaviour over ) s ( ct frequency response; moreover, an accurate control of quiescent current is required. A local linearizing feedback, provided by differential amplifier A, is used to fullfil the above requirements, allowing a simple and effective quiescent current setting. Proper biasing of the power output transistors alone is however not enough to guarantee the absence of crossover distortion. While a linearization of the DC transfer characteristic of the stage is obtained, the dynamic behaviour of the system must be taken into account. A significant aid in keeping the distortion contributed by the final stage as low as possible is provided by the compensation scheme, which exploits the direct connection of the Miller capacitor at the amplifier’s output to introduce a local AC feedback path enclosing the output stage itself. r P e t e l o s b O 6/13 c u d e t le o s b O - Figure 3: Principle Schematic of a DMOS unity-gain buffer. u d o ) s t( 2) Protections In designing a power IC, particular attention must be reserved to the circuits devoted to protection of the device from short circuit or overload conditions. Due to the absence of the 2nd breakdown phenomenon, the SOA of the power DMOS transistors is delimited only by a maximum dissipation curve dependent on the duration of the applied stimulus. In order to fully exploit the capabilities of the power transistors, the protection scheme implemented in this device combines a conventional SOA protection circuit with a novel local temperature sensing technique which " dynamically" controls the maximum dissipation. o r P TDA7295S Figure 4: Turn ON/OFF Suggested Sequence +Vs (V) +40 -40 -Vs VIN (mV) VST-BY PIN #9 (V) 5V VMUTE PIN #10 (V) 5V c u d IQ (mA) VOUT (V) e t le OFF ST-BY PLAY MUTE o s b O - In addition to the overload protection described above, the device features a thermal shutdown circuit which initially puts the device into a muting state (@ Tj = 150 oC) and then into stand-by (@ Tj = 160 oC). Full protection against electrostatic discharges on every pin is included. ) s ( ct u d o r P e Figure 5: Single Signal ST-BY/MUTE Control Circuit t e l o s b O MUTE MUTE/ ST-BY 30K 1N4148 MUTE o r P OFF D98AU817 mute functions, independently driven by two CMOS logic compatible input pins. The circuits dedicated to the switching on and off of the amplifier have been carefully optimized to avoid any kind of uncontrolled audible transient at the output. The sequence that we recommend during the ON/OFF transients is shown by Figure 4. The application of figure 5 shows the possibility of using only one command for both st-by and mute functions. On both the pins, the maximum applicable range corresponds to the operating supply voltage. STBY 20K 10K ST-BY ) s t( 10µF 10µF D93AU014 3) Other Features The device is provided with both stand-by and APPLICATION INFORMATION HIGH-EFFICIENCY Constraints of implementing high power solutions are the power dissipation and the size of the power supply. These are both due to the low efficiency of conventional AB class amplifier approaches. Here below (figure 6) is described a circuit proposal for a high efficiency amplifier which can be adopted for both HI-FI and CAR-RADIO applications. 7/13 TDA7295S The TDA7295S is a monolithic MOS power amplifier which can be operated at 76V supply voltage (80V with no signal applied) while delivering output currents up to ±6A. This allows the use of this device as a very high power amplifier (up to 80W as peak power with T.H.D.=10 % and Rl = 4 Ohm); the only drawback is the power dissipation, hardly manageable in the above power range. The typical junction-to-case thermal resistance of the TDA7295S is 1 oC/W (max= 1.5 oC/W). To avoid that, in worst case conditions, the chip temperature exceedes 150 oC, the thermal resistance of the heatsink must be 0.038 oC/W (@ max ambient temperature of 50 oC). As the above value is pratically unreachable; a high efficiency system is needed in those cases where the continuous RMS output power is higher than 50-60 W. The TDA7295S was designed to work also in higher efficiency way. For this reason there are four power supply pins: two intended for the signal part and two for the power part. T1 and T2 are two power transistors that only operate when the output power reaches a certain threshold (e.g. 20 W). If the output power increases, these transistors are switched on during the portion of the signal where more output voltage swing is needed, thus "bootstrapping" the power supply pins (#13 and #15). The current generators formed by T4, T7, zener diodes Z1, Z2 and resistors R7,R8 define the minimum drop across the power MOS transistors of the TDA7295S. L1, L2, L3 and the snubbers C9, R1 and C10, R2 stabilize the loops formed by the "bootstrap" circuits and the output stage of the TDA7295S. By considering again a maximum average output power (music signal) of 20W, in case of the high efficiency application, the thermal resistance value needed from the heatsink is 2.2 oC/W (Vs =±40V and Rl= 8 Ohm). All components (TDA7295S and power transistors T1 and T2) can be placed on a 1.5 oC/W heatsink, with the power darlingtons electrically insulated from the heatsink. Since the total power dissipation is less than that of a usual class AB amplifier, additional cost savings can be obtained while optimizing the power supply, even with a high heatsink . ) s ( ct A suitable field of application includes HI-FI/TV subwoofers realizations. The main advantages offered by this solution are: - High power performances with limited supply voltage level. - Considerably high output power even with high load values (i.e. 16 Ohm). With Rl = 8 Ohm, VS = ±25V the maximum output power obtainable is 150W (Music Power) APPLICATION NOTE: (ref. fig. 7) Modular Application (more Devices in Parallel) The use of the modular application lets very high power be delivered to very low impedance loads. The modular application implies one device to act as a master and the others as slaves. The slave power stages are driven by the master device and work in parallel all together, while the input and the gain stages of the slave device are disabled, the figure below shows the connections required to configure two devices to work together. c u d e t le ) s t( o r P o s b O - u d o r P e t e l o s b O BRIDGE APPLICATION Another application suggestion is the BRIDGE configuration, where two TDA7295S are used. 8/13 In this application, the value of the load must not be lower than 8 Ohm for dissipation and current capability reasons. The master chip connections are the same as the normal single ones. The outputs can be connected together without the need of any ballast resistance. The slave SGND pin must be tied to the negative supply. The slave ST-BY pin must be connected to ST-BY pin. The bootstrap lines must be connected together and the bootstrap capacitor must be increased: for N devices the boostrap capacitor must be 22µF times N. The slave Mute and IN-pins must be grounded. THE BOOTSTRAP CAPACITOR For compatibility purpose with the previous devices of the family, the boostrap capacitor can be connected both between the bootstrap pin (6) and the output pin (14) or between the boostrap pin (6) and the bootstrap loader pin (12). TDA7295S Figure 6: High Efficiency Application Circuit +50V D6 1N4001 T1 BDX53A T3 BC394 R4 270 D1 BYW98100 +25V T4 BC393 R17 270 L1 1µH C1 1000µF 63V C3 100nF C5 1000µF 35V C7 100nF R22 10K C9 330nF IN 13 2 4 C2 1000µF 63V C4 100nF C6 1000µF 35V R2 2 C10 330nF 6 R13 20K R14 30K D5 1N4148 C11 22µF 1 R15 10K 10 OUT C15 22µF R8 3.3K C17 1.8nF Pot 15 Z2 3.9V D2 BYW98100 L2 1µH D4 1N4148 T7 BC394 R19 270 -25V T2 BDX54A D7 1N4001 T6 BC393 -50V ) s ( ct C16 1.8nF R18 270 12 8 C14 10µF Figure 6a: PCB and Component Layout of the fig. 6 R7 3.3K L3 5µH 14 9 R23 10K C8 100nF R3 680 R16 13K C13 10µF ST-BY R21 20K 7 R12 13K PLAY GND R6 20K Z1 3.9V 3 R1 2 T5 BC393 D3 1N4148 C12 330nF R20 20K R5 270 r P e t le ) s t( T8 BC394 uc R9 270 od R10 270 R11 20K D97AU807C o s b O - u d o r P e t e l o s b O 9/13 TDA7295S Figure 6b: PCB - Solder Side of the fig. 6. c u d Figure 7: Modular Application Circuit +Vs C7 100nF R3 22K MASTER R2 680Ω C1 470nF IN- 2 IN+ 3 ) s ( ct R1 22K SGND R5 10K VMUTE STBY VSTBY o r P e R4 22K t e l o bs O + +PWVs 13 11 10 OUT 12 BOOT LOADER 9 C4 10µF 6 MUTE THERMAL SHUTDOWN STBY S/C PROTECTION 1 8 15 STBY-GND -Vs -PWVs C9 100nF C3 10µF 5 C10 100nF R7 2Ω C5 47µF BOOTSTRAP CLIP DET C8 1000µF -Vs +Vs C7 100nF C6 1000µF BUFFER DRIVER +Vs IN- 2 IN+ 3 SGND 4 MUTE 10 7 +PWVs 13 11 - 9 STBY 14 OUT 12 BOOT LOADER + SLAVE 6 MUTE THERMAL SHUTDOWN STBY S/C PROTECTION 1 8 15 STBY-GND -Vs -PWVs C9 100nF C8 1000µF -Vs 10/13 14 4 du MUTE 7 - C6 1000µF o s b O BUFFER DRIVER +Vs C2 22µF e t le o r P 5 BOOTSTRAP D97AU808C ) s t( TDA7295S Figure 8a: Modular Application P.C. Board and Component Layout (scale 1:1) (Component SIDE) c u d e t le ) s t( o r P o s b O - Figure 8b: Modular Application P.C. Board and Component Layout (scale 1:1) (Solder SIDE) ) s ( ct u d o r P e t e l o s b O 11/13 TDA7295S mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 5 0.197 B 2.65 0.104 C 1.6 D 0.063 1 0.039 E 0.49 0.55 0.019 0.022 F 0.66 0.75 0.026 0.030 G 1.02 1.27 1.52 0.040 0.050 0.060 G1 17.53 17.78 18.03 0.690 0.700 0.710 H1 19.6 0.862 0.874 0.886 0.870 0.886 0.772 H2 20.2 L 0.795 21.9 22.2 22.5 L1 21.7 22.1 22.5 0.854 L2 17.65 18.1 0.695 L3 17.25 17.5 17.75 0.679 0.689 0.699 L4 10.3 10.7 10.9 0.406 0.421 0.429 L7 2.65 2.9 0.104 M 4.25 4.55 4.85 0.167 0.179 0.191 M1 4.63 5.08 5.53 0.182 0.200 0.218 S 1.9 2.6 0.075 0.102 S1 1.9 2.6 0.075 0.102 Dia1 3.65 3.85 0.144 0.152 0.713 u d o r P e t e l o 12/13 c u d 0.114 ) s ( ct s b O OUTLINE AND MECHANICAL DATA o r P Multiwatt15 V o s b O - e t le ) s t( TDA7295S c u d e t le ) s ( ct ) s t( o r P o s b O - u d o r P e t e l o s b O Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics © 2003 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com 13/13