TSH110-111-112-113-114
WIDE BAND, LOW NOISE OPERATIONAL AMPLIFIERS
s s s s s s s s s
LOW NOISE: 3nV/√Hz LOW SUPPLY CURRENT: 3.2mA 47mA OUTPUT CURRENT BANDWIDTH: 100MHz 5V to 12V SUPPLY VOLTAGE SLEW-RATE: 450V/µs SPECIFIED FOR 100Ω Load VERY LOW DISTORTION TINY: SOT23-5, TSSOP and SO PACKAGES PIN CONNECTIONS (top view)
TSH110 : SOT23-5
Output 1 VCC - 2 Non Inverting Input 3 5 VCC +
+4 Inverting Input
TSH111 : SO8/TSSOP8
NC 1 Inverting Input 2 _ + 8 STANDBY 7 VCC + 6 Output 5 NC
DESCRIPTION The singles TSH110 and TSH111, the dual TSH112, the triple TSH113 and the quad TSH114 are current feedback operational amplifiers featuring a very high slew rate of 450V/µs and a large bandwidth of 100MHz, with only a 3.2mA quiescent supply current. The TSH111 and TSH113 feature a Standby function for each operator. This function is a power down mode with a high output impedance. These devices operate from ±2.5V to ±6V dual supply voltage or from 5V to 12V single supply voltage. They are able to drive a 100Ω load with a swing of 9V minimum (for a 12V power supply). The harmonic and intermodulation distortions of these devices are very low, making this circuit a good choice for applications requiring wide bandwidth with multiple carriers. For board space and weight saving, the TSH110 comes in miniature SOT23-5 package, the TSH111 comes in SO8 and TSSOP8 packages, the TSH112 comes in SO8 and TSSOP8 packages, the TSH113 and TSH114 comes in SO14 and TSSOP14 packages. APPLICATIONS
Non Inverting Input 3 VCC - 4
TSH112 : SO8/TSSOP8
Output1 1 Inverting Input1 2 Non Inverting Input1 3 VCC - 4 _ + _ + 8 VCC + 7 Output2 6 Inverting Input2 5 Non Inverting Input2
TSH113 : SO14/TSSOP14
STANDBY1 1 STANDBY2 2 STANDBY3 3 VCC + 4 Non Inverting Input1 5 Inverting Input1 6 Output1 7 + _ + _ _ + 14 Output3 13 Inverting Input3 12 Non Inverting Input3 11 VCC 10 Non Inverting Input2 9 Inverting Input2 8 Output2
TSH114 : SO14/TSSOP14
Output1 1 Inverting Input1 2 Non Inverting Input1 3 VCC + 4 Non Inverting Input2 5 + _ + _ _ + _ + 14 Output4 13 Inverting Input4 12 Non Inverting Input4 11 VCC 10 Non Inverting Input3 9 Inverting Input3 8 Output3
s s s s
High End Video Drivers Receiver for xDSL A/D Converter Driver High End Audio Applications
Inverting Input2 6 Output2 7
February 2002
1/19
TSH110-TSH111-TSH112-TSH113-TSH114
ABSOLUTE MAXIMUM RATINGS
Symbol VCC Vid Vi Toper Tstg Tj Supply Voltage
1)
Parameter Differential Input Voltage 2) Input Voltage 3) Operating Free Air Temperature Range Storage Temperature Maximum Junction Temperature Thermal resistance junction to case SOT23-5 SO8 SO14 TSSOP8 TSSOP14 Thermal resistance junction to ambiante area SOT23-5 SO8 SO14 TSSOP8 TSSOP14 Human Body Model Machine Model Charged Device Model ouput short circuit duration 4)
Value 14 ±1 ±6 -40 to +85 -65 to +150 150 80 28 22 37 32 250 157 125 130 110 2.0 0.2 1.5
Unit V V V °C °C °C
Rthjc
°C/W
Rthja
°C/W
ESD
kV
1. 2. 3. 4.
All voltages values, except differential voltage are with respect to network ground terminal Differential voltages are non-inverting input terminal with respect to the inverting terminal The magnitude of input and output must never exceed V CC +0.3V Short-circuits can cause excessive heating. Destructive dissipation can result.
OPERATING CONDITIONS
Symbol VCC Vicm Supply Voltage Common Mode Input Voltage Range Parameter Value 5 to 12 VCC-+1.5 to VCC+-1.5 Unit V V
ORDER CODES
Type
TSH110ILT (code K302) TSH111ID TSH111IDT TSH111IPT TSH112ID TSH112IDT TSH112IPT TSH113ID TSH113IDT TSH113IPT TSH114ID TSH114IDT TSH114IPT
Temperature
Package
SOT23-5 SO8 SO8 TSSOP8 SO8 SO8 TSSOP8 SO14 SO14 TSSOP14 SO14 SO14 TSSOP14
-40° to +85°C
D = Small Outline Package (SO) - also available in Tape & Reel (DT) P = T hin Shrink Small Outline Package (TSSOP) - only available in Tape & Reel (PT) L = T iny Package (SOT23-5) - only available in Tape & Reel (LT)
2/19
TSH110-TSH111-TSH112-TSH113-TSH114
ELECTRICAL CHARACTERISTICS (pages 3 and 4) Dual Supply Voltage, VCC= ±2.5Volts, R*fb = 680Ω, Tamb = 25°C (unless otherwise specified)
Symbol DC PERFORMANCE Vio ∆Vio Iib+ IibROL ICC CMR SVR PSR Input Offset Voltage Tamb Tmin. < Tamb < Tmax. Tamb Tmin. < Tamb < Tmax. Tamb Tmin. < Tamb < Tmax. RL=100Ω Tamb Tmin. < Tamb < Tmax. 56 70 Gain=1, Rload=3.9kΩ 500 -3 -10 -1.5 0.3 1 5 1.4 2.5 1.9 2.5 750 3.2 3.5 60 80 48 4 7 13 2.0 mV mV µV/°C µA µA µA µA kΩ mA mA dB dB dB Parameter Test Condition Min. Typ. Max. Unit
Input Offset Voltage Drift vs. Temperature Tmin. < Tamb < Tmax. Non Inverting Input Bias Current Inverting Input Bias Current Transimpedance Supply Current per Operator Common Mode Rejection Ratio (∆Vic/∆Vio) Supply Voltage Rejection Ratio (∆VCC/∆Vio) Power Supply Rejection Ratio (∆VCC/∆Vout)
DYNAMIC PERFORMANCE and OUTPUT CHARACTERISTICS Tamb RL = 100Ω Tmin. < Tamb < Tmax. RL = 100Ω GND Tamb RL = 100Ω Tmin. < Tamb < Tmax. RL = 100Ω Tmin. < Tamb < Tmax. Tmin. < Tamb < Tmax. Vout=1Vpk, Rfb*=820Ω//2pF BW -3dB Bandwidth Load=100Ω AVCL =+2 AVCL =+2, 2V step Load=100Ω for 200mV step AVCL =+2, Rfb*=820Ω//2pF Load=100Ω AVCL =+2, RL=100Ω F=4.5MHz, Vout=1Vpeak 160 81 230 9 9 16 60 0.05 0.05 MHz V/µs ns ns % ns % ° 1.4 2 1.9 -1.8 -1.7 20 18 -1.3 V V V V mA mA
Voh
High Level Output Voltage
Vol
Low Level Output Voltage
| Isink | Isource
Output Sink current Output Source current
SR Tr Tf Ov St ∆G ∆φ
Slew Rate Rise Time Fall Time Overshoot Settling Time @ 0.05% Differential gain Differential phase
3/19
TSH110-TSH111-TSH112-TSH113-TSH114
Symbol
Parameter
Test Condition
Min.
Typ. 3 8.5 64.4
Max.
Unit nV/√Hz pA/√Hz dB
NOISE AND HARMONIC PERFORMANCE en Equivalent Input Voltage Noise in THD Equivalent Input Current Noise Total Harmonic Distortion
Frequency : 1MHz AVCL =+2, F=2MHz RL=100Ω Vout=2Vpeak AVCL =+2, Vout=2Vpp RL=100Ω F1=1MHz, F2=1.1MHz
IM3
Third order inter modulation product
@900kHz @1.2MHz @3.1MHz @3.2MHz
90 90 86 83
dBc
MATCHING CHARACTERISTICS Gf Gain Flatness F=(DC) to 6MHz AVCL =+2, Vout=2Vpp F=1MHz to 10MHz 0.1 65 dB dB
Vo1/Vo2 Channel Separation
(*) Rfb is the feedback resistance between the output and the inverting input of the amplifier.
4/19
TSH110-TSH111-TSH112-TSH113-TSH114
ELECTRICAL CHARACTERISTICS (pages 5 and 6) Dual Supply Voltage, VCC=±6Volts, R*fb = 680Ω, Tamb = 25°C (unless otherwise specified)
Symbol DC PERFORMANCE Vio ∆Vio Iib+ Iib ROL ICC CMR SVR PSR Input Offset Voltage Input Offset Voltage Drift vs Temperature Non Inverting Input Bias Current Inverting Input Bias Current Transimpedance Supply Current per Operator Common Mode Rejection Ratio (∆Vic/∆Vio) Supply Voltage Rejection Ratio (∆Vcc/∆Vio) Power Supply Rejection Ratio (∆Vcc/∆Vout) Gain=1, Rload=3.9kΩ Tamb Tmin. < Tamb < Tmax. Tmin. < Tamb < Tmax. Tamb Tmin. < Tamb < Tmax. Tamb Tmin. < Tamb < Tmax. RL=100Ω Tamb Tmin. < Tamb < Tmax. 58 72 600 -4 -12 -1.0 0.9 1.3 5 1 1.7 3 3.4 900 4 4.1 63 80 49 5 10 14 3.0 mV mV µV/°C µA µA µA µA kΩ mA mA dB dB dB Parameter TestCondition Min. Typ. Max. Unit
DYNAMIC PERFORMANCE and OUTPUT CHARACTERISTICS Tamb RL = 100Ω Tmin. < Tamb < Tmax. RL = 100Ω Tamb RL = 100Ω Tmin. < Tamb < Tmax. RL = 100Ω Tmin. < Tamb < Tmax. Tmin. < Tamb < Tmax. Vout=1Vpk, Rfb*=680Ω//2pF Bw -3dB Bandwidth Load=100Ω AVCL =+2 AVCL =+2, 6V step Load=100Ω for 200mV step AVCL =+2, Rfb*=680Ω//2pF Load=100Ω AVCL =+2, RL=100Ω F=4.5MHz, Vout=2Vpeak 240 100 450 10.4 12.2 17 40 0.05 0.05 MHz V/µs ns ns % ns % ° 4.5 4.7 4.6 -4.7 -4.6 47 46 -4.3 V V V V mA mA
Voh
High Level Output Voltage
Vol
Low Level Output Voltage
| Isink | Isource
Output Sink current Output Source current
SR Tr Tf Ov St ∆G ∆φ
Slew Rate Rise Time Fall Time Overshoot Settling Time @ 0.05% Differential gain Differential phase
5/19
TSH110-TSH111-TSH112-TSH113-TSH114
Symbol
Parameter
TestCondition
Min.
Typ. 3 8.6 67.7
Max.
Unit nV/√Hz pA/√Hz dB
NOISE AND HARMONIC PERFORMANCE en Equivalent Input Voltage Noise in THD Equivalent Input Current Noise Total Harmonic Distortion
Frequency : 1MHz AVCL =+2, F=2MHz RL=100Ω Vout=4Vpp AVCL =+2, Vout=4Vpp RL=100Ω F1=1MHz, F2=1.1MHz
IM3
Third order inter modulation product
@900kHz @1.2MHz @3.1MHz @3.2MHz
82 84 77 73
dBc
MATCHING CHARACTERISTICS Gf Gain Flatness F=(DC) to 6MHz AVCL =+2, Vout=4Vpp F=1MHz to 10MHz 0.1 65 dB dB
Vo1/Vo2 Channel Separation
(*) Rfb is the feedback resistance between the output and the inverting input of the amplifier.
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TSH110-TSH111-TSH112-TSH113-TSH114
STANDBY MODE Tamb = 25°C (unless otherwise specified), VCC=±6Volts
Symbol Vlow Vhigh ICC SBY Isol Zout Ton Toff Parameter Standby Low Level Standby High Level Current Consumption per Operator in Standby mode Input/Output Isolation Output Impedance (Rout // Cout) Time from Standby Mode to Active Mode Time from Active Mode to Standby Mode Down to ICC SBY = 40µA F=1MHz Rout Cout Test Condition Min. VCC(VCC- +2) 26 -90 31 25 2 13 OPERATOR STATUS Standby Active OPERATOR STATUS OP1 Standby Active x x Vlow Vhigh x x OP1 x x Standby Active x x OP3 x x x x Standby Active Typ. Max. (VCC+0.8) (VCC+) 40 Unit V V µA dB MΩ pF µs µs
TSH111 STANDBY CONTROL pin 8 (SBY) Vlow Vhigh TSH113 STANDBY CONTROL pin 1 (SBY OP1) Vlow Vhigh x x x x pin 2 (SBY OP2) x x Vlow Vhigh x x pin 3 (SBY OP) x x x
7/19
TSH110-TSH111-TSH112-TSH113-TSH114
(fig.1) Closed Loop Gain vs. Frequency
AV=+1, Rfb=2.2kΩ, Cfb=2pF, RL=100Ω, Vin=100mVp
(fig.2) Closed Loop Gain vs. Frequency
AV=-1, Rfb=2.2kΩ, Cfb=2pF, RL=100Ω, Vin=100mVp
2
Vcc=±6V
40
2
Vcc=±2.5V
-140 -160
gain
0
20 0 0
Vcc=±6V
-180
gain(dB)- AV
-2
Vcc=±2.5V
-2
Phase (°)
gain(dB)
Vcc=±2.5V
-4
Vcc=±2.5V Vcc=±6V
-40 -60
-4
Vcc=±6V
-220 -240
-6 -80 -8 -100 -10 1 10 100 -120
-6 -260 -8 -280 -10 1 10 100 -300
Frequency (MHz)
Frequency (MHz)
(fig.3) Closed Loop Gain vs. Frequency
AV=+2, Rfb=680Ω, Cfb=2pF, RL=100Ω, Vin=100mVp
(fig.4) Closed Loop Gain vs. Frequency
AV=-2, Rfb=680kΩ, Cfb=2pF, RL=100Ω, Vin=100mVp
40 6
-140 6
Vcc=±2.5V
gain
Vcc=±2.5V
Vcc=±6V
20 0
gain
Vcc=±6V
-160 -180
4
4
gain(dB)- AV
gain(dB)- AV
Phase (°)
2
2
Vcc=±2.5V Vcc=±6V
Vcc=±2.5V
0
-40 -60 -80 -100
-220 -240 -260 -280
0
Vcc=±6V
-2
-2
-4 -120 1 10 100
-4 -300 1 10 100
Frequency (MHz)
Frequency (MHz)
(fig.5) Closed Loop Gain vs. Frequency
AV=+10, Rfb=510Ω, RL=100Ω, Vin=30mVp
(fig.6) Closed Loop Gain vs. Frequency
AV=-10, Rfb=510Ω, RL=100Ω, Vin=30mVp
22
40
22
-140
20
gain
Vcc=±6V
20
20
0
gain
Vcc=±2.5V
-160 -180 -200 -220 -240 -260
gain(dB)- AV
Phase (°)
Vcc=±2.5V Vcc=±6V
16
Vcc=±2.5V Vcc=±6V
-40 -60 -80
16
14
14
12 -100 10 1 10 100 -120
12 -280 10 1 10 100 -300
Frequency (MHz)
Frequency (MHz)
8/19
Phase (°)
phase
Vcc=±2.5V
gain(dB)- AV
18
18
-20
phase
Vcc=±6V
Phase (°)
phase
-20
phase
-200
Phase (°)
phase
-20
-200
TSH110-TSH111-TSH112-TSH113-TSH114
(fig.7): Positive Slew Rate
AV=+2, Rfb=680Ω, Cfb=2pF, RL=100Ω, Vcc=±6V
1V /div.
(fig.8): Negative Slew Rate
AV=+2, Rfb=680Ω, Cfb=2pF, RL=100Ω, Vcc=±6V
1V /div. 0V 5ns 5ns /div.
0V
5ns /div.
(fig.9): Positive Slew Rate
AV=+2, Rfb=680Ω, Cfb=2pF, RL=100Ω, Vcc=±2.5V
0.4V /div.
(fig.10): Negative Slew Rate
AV=+2, Rfb=680Ω, Cfb=2pF, RL=100Ω, Vcc=±2.5V
0.4V /div. 0V
5ns /div.
0V
5ns /div.
(fig.11): Input Voltage Noise Level
AV=+100, Rfb=1kΩ, Input+ connected to Gnd via 10Ω
(fig.12): Vio vs. Power Supply
Open loop, no load
10 9
1000 900 800
Voltage Noise (nV/√Hz)
8 7
Vio (µV)
6 5 4 3
700 600 500 400
2
300
1 0 100
200 5 6 7 8 9 10 11 12
1k
10k
100k
1M
Frequency (Hz)
Vcc ( V)
9/19
TSH110-TSH111-TSH112-TSH113-TSH114
(fig.13): Icc(-) vs. Power Supply
Open loop, no load
(fig.14): Icc(+) vs. Power Supply
Open loop, no load
-3.3
3.9
-3.4
3.8
-3.5
3.7
-3.6
Icc(+) (mA)
5 6 7 8 9 10 11 12
Icc(-) (mA)
3.6
-3.7
3.5
-3.8
3.4
-3.9
3.3 5 6 7 8 9 10 11 12
V cc ( V)
V cc (V)
(fig.15): Iib(-) vs. Power Supply
Open loop, no load
(fig.16): Iib(+) vs. Power Supply
Open loop, no load
3.2
1.0
3.0
0.8
2.8
Iib(-) (mA)
2.6
2.4
Iib(+) (mA)
0.6
0.4
2.2
0.2
2.0
1.8 5 6 7 8 9 10 11 12
0.0 5 6 7 8 9 10 11 12
V cc (V)
V cc (V)
(fig.17): Vol vs. Power Supply
Open loop, RL=100Ω
(fig.18): Voh vs. Power Supply
Open loop, RL=100Ω
-2.0
5.0
-2.5
4.5
-3.0
4.0
-3.5
Voh (V)
5 6 7 8 9 10 11 12
Vol (V)
3.5
-4.0
3.0
-4.5
2.5
-5.0
2.0 5 6 7 8 9 10 11 12
Vcc (V)
V cc ( V)
10/19
TSH110-TSH111-TSH112-TSH113-TSH114
(fig.19): Icc vs. Temperature
Open loop, no load
(fig.20): Icc (Standby) vs. Temperaure
Open loop, no load
5 4 3 2 1
30
Icc(+) for Vcc=±6V
20
0 -1 -2 -3
IccStand-By (µA)
100
Icc(+) for Vcc=±2.5V
10
Icc (mA)
0
-10
Icc(-) for Vcc=±2.5V
-20
-4
Icc(-) for Vcc=±6V
-5 -40 -20 0 20 40 60 80
-30 -40 -20 0 20 40 60 80 100
Temperature (°C)
Temperature (°C)
(fig.21): ROL vs. Temperature
Open loop, no load
(fig.22): CMR vs. Temperature
Open loop, no load
68
1000
Vcc=±6V
950
66
Vcc=±6V
CMR (dB)
ROL (kΩ)
64
900
62
850
60
Vcc=±2.5V
Vcc=±2.5V
800
58 -40 -20 0 20 40 60 80 100
-40
-20
0
20
40
60
80
100
Temperature (°C)
Temperature (°C)
(fig.23): VOH
&
VOL vs. Temperature
(fig.24): Slew Rate vs. Temperature
AV=+2, RL=100Ω
Open loop, RL=100Ω
6 5 4 3
VOH f or Vcc=±6V
600
pos. SR for Vcc=±6V
550 500
Slew Rate (V/µs)
V OH for Vcc=±2.5V
VOH and VOL (V)
2 1 0 -1 -2 -3 -4 -5 -6 -40 -20 0 20 40 60 80 100
450 400 350 300 250
neg. SR for Vcc=±6V
V OL for Vcc=±2.5V
pos. SR for Vcc=±2.5V neg. SR for Vcc=±2.5V
V OL for Vcc=±6V
200 150 100 -40
-20
0
20
40
60
80
100
Temperature (°C)
Temperature (°C)
11/19
TSH110-TSH111-TSH112-TSH113-TSH114
(fig.25): Group Delay
AV=+2, Rfb=680Ω, Cfb=2pF, RL=100Ω
(fig.26): Gain Flatness
AV=+2, Rfb=680Ω, Cfb=2pF, RL=100Ω
8
6.30 6.25
Vcc=±2.5V
7
Delay Time (ns)
6
Vcc=±2.5V
Gain Flatness (dB)
6.20 6.15 6.10 6.05 6.00
5
4
V cc=±6V
3
5.95
Vcc=±6V
2 0 .1
5.90
1
10
100
1k
10k
100k
1M
10M
100M
Frequency (MHz)
Frequency (Hz)
(fig.27): Frequency Response vs. Load
AV=+2, Rfb=680Ω, Cfb=2pF, VCC=±2.5V, (fig.29)
(fig.28): Frequency Response vs. Load
AV=+2, Rfb=680Ω, Cfb=2pF, VCC=±6V, (fig.29)
7
7
C=30pF Rs=39
6
6
C=30pF Rs=30
5
5
Gain(dB) - AV
Gain(dB) - AV
C=100pF Rs=12
4
4
C=100pF Rs=12
3
3
C=1nF Rs=6
2
C=1nF Rs=5
2
1
1
0 1 10 100
0 1 10 100
Frequency (MHz)
Frequency (MHz)
(fig.29): Capacitive Load Schematic.
measurements on (fig.27) and (fig.28)
+
TSH11x OUT Rs(Ω) 1kΩ C
_
RG 680Ω
Rfb, 680Ω
Cfb 2pF
12/19
TSH110-TSH111-TSH112-TSH113-TSH114
Intermodulation Distortion A non-ideal output of the amplifier can be described by the following development : Vout=C0+C1(V in)+C2(Vin)2+C 3(Vin)3+...+C n(Vin)n due to a non-linearity in the input-output amplitude transfert. In the case of Vin=Asinωt, CO is the DC component, C1(Vin) is the fundamental, C nAn is the amplitude of the harmonics. A one-frequency or one-tone input signal contributes to a harmonic distortion. A two-tones input signal contributes to a harmonic distortion and intermodulation product. This intermodulation product or intermodulation distortion of a two-tones input signal is the first step of the amplifier study for driving capability in the case of a multitone signal. In this case Vin=Asinω1t+Bsinω2t, and : Vout= CO+C1(Asinω1t+Bsinω2t) + C2(Asinω1t+Bsinω2t)2+C3(Asinω1t+Bsinω2t)3 + ...Cn(Vin)n Vout= CO+C1(Asinω1t+Bsinω2t) + C2(A2+B2)/2-(C2/2)(A2cos2ω1t+B2cos2ω2t) + 2C2AB(cos(ω1-ω2)t-cos(ω1+ω2)t) + (3C3/4) (A3sinω1t+B 3sinω2t+2A2Bsinω2t+2B2Asinω1t) + (C3A3sin3ω1t+B3sin3ω2t) + (3C3A2B/2)(sin(2ω1-ω2)t-1/2sin(2ω1+ω2)t) + (3C3B2A/2)(sin(−ω1+2 ω2)t- 1/2sin(ω1+2ω2)t) + ...Cn(Vin)n In this expression, we can recognize the second order intermodulation IM2 by the frequencies (ω1-ω2) and (ω1+ω 2) and the third order intermodulation IM3 by the frequencies (2ω1-ω2), (2ω1+ω2), (−ω1+2ω2) and ( ω1+2ω2). The following graphs show the IM3 of the amplifier in two cases as a function of the output amplitude. The two-tones input signal is achieved by the multisource generator Marconi 2026. Each tone has the same amplitude. The measurement is achieved by the spectrum analyser HP 3585A. Both instruments are phase locked to enhance measurement precision. (fig.30): 3rd Order Intermodulation (180kHz &
280kHz) AV=+4, Rfb=680Ω, no Cfb, RL=100Ω, Vcc=±6V
-60 -65 -70 -75 -80 -85 -90 -95 -100 0 1 2 3 4 5
IM3 (dBc)
740kHz 380kHz
8 0kHz 640kHz
Output Amplitude (V peak )
(fig.31): 3rd Order Intermodulation (1MHz &
1.1MHz) AV=+2, Rfb=680Ω, Cfb=2pF, RL=100Ω, Vcc=±2.5V
-60 -65 -70 -75
IM3 (dBc)
3.2MHz
-80
3.1MHz
-85
1.2MHz
-90
900kHz
-95 -100 0.0
0.5
1.0
1.5
2.0
Output Amplitude (V peak)
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TSH110-TSH111-TSH112-TSH113-TSH114
Printed Circuit Board Layout Considerations In this range of frequency, printed circuit board parasitics can affect the closed-loop performance. The implementation of a proper ground plane in both sides of the PCB is mandatory to provide low inductance and low resistance common return. Most important for controlling the gain flatness and the bandwidth are stray capacitances at the output and inverting input. For minimizing the coupling, the space between signal lines and ground plane will be increased. Connections of the feedback components must be as short as possible on order to decrease the associated inductance which affect high frequency gain errors. It is very important to choose external components as small as possible such as surface mounted devices, SMD, in order to minimize the size of all the dc and ac connections. Power Supply Bypassing A proper power supply bypassing comes very important for optimizing the performance in high frequency range. Bypass capacitors must be placed as close as possible to the IC pins to improve high frequency bypassing. A capacitor greater than 1µF is necessary to minimize the distortion. For a better quality bypassing a capacitor of 0.1µF will be added following the same condition of implementation. These bypass capacitors must be incorporated for the negative and the positive supplies. (fig.32): Circuit for power supply bypassing.
+VCC 1µF 0.1µF
Nevertheless, the PCB layout has also an effect on the crosstalk level. Capacitive coupling between signal wires, distance between critical signal nodes, power supply bypassing, are the most significant points. (fig.33): Crosstalk vs. Frequency. AV=+2, Rfb=680Ω, Cfb=2pF, RL=100Ω, Vcc=±6V, ±2.5V
0
-20
X-Talk (dB)
-40
-60
-80
-100 10k
100k
1M
10M
100M
Frequency (Hz)
+
TSH11x
Single Power Supply The TSH11x operates from 12V down to 5V power supplies. This is achieved with a dual power supply of ±6V and ±2.5V or a single power supply of 12V and 5V referenced to the ground. In the case of this asymmetrical supplying, a biasing is necessary to assume a positive output dynamic range between 0V and +Vcc supply rails. Considering the values of VOH and VOL, the amplifier will provide an ouput dynamic from +1.35V to 10.75V for a 12V supplying, from 0.6V to 4.5V for a 5V supplying. The following figure show the case of a 5V single power supply configuration. (fig.34): Circuit for +5V single supply.
+5V
_
0.1µF
1µF
IN
10µF
+
Rin 1kΩ TSH11x
100µF 50Ω
-VCC
OUT 50Ω
+5V R1 5kΩ
_
Channel Separation or Crosstalk The following figure show the crosstalk from an amplifier to a second amplifier. This phenomenon, accented in high frequencies, is unavoidable and intrinsic of the circuit.
R1 5kΩ
+ 1µ F
10nF +
RG 680Ω CG
Rfb, 680Ω
Cfb 2pF
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TSH110-TSH111-TSH112-TSH113-TSH114
The amplifier must be biased with a mid supply (nominaly +Vcc/2), in order to maintain the DC component of the signal at this value. Several options are possible to provide this bias supply (such as a virtual ground using an operational amplifier), or a two-resistance divider which is the cheapest solution. A high resistance value is required to limit the current consumption. On the other hand, the current must be high enough to bias the non-inverting input of the amplifier. If we consider this bias current (5µA) as the 1% of the current through the resistance divider (500µA) to keep a stable mid supply, two 5kΩ resistances can be used. The input provides a high pass filter with a break frequency below 10Hz which is necessary to remove the original 0 volt DC component of the input signal, and to hold it at 2.5V. Video Multiplexing using the TSH113 (fig.35): Circuit for switching 3 video signals with the triple TSH113.
-2.4V
Assuming a low level active onto the disable pins (1,2,3) as described on page 7 of the datasheet, any operator can be disable/enable independently. The two disabled operators will be in standby mode featuring a high ouput impedance with a high input/output isolation and a low quiescent current.
(fig.36): Typical output response in standby mode on/off
0.4V /div.
Enabled Output
Disabled Output
+2.4V
Standby Signal
100ns 100ns /div.
IN1
+
TSH113
(fig.37): Typical output response in standby mode off/on
0.4V /div.
Enabled Output
_
ENABLE1 Rfb, 680Ω
RG 680Ω
Cfb, 2pF
IN2
+
75Ω TSH113
75Ω cable
Common OUT 75Ω
+2.4V
Disabled Output
_
ENABLE2 Rfb, 680Ω
Standby Signal
-2.4V
RG 680Ω
10µs /div.
Cfb, 2pF
IN3
+
TSH113
_
ENABLE3 Rfb, 680Ω
RG 680Ω
Cfb, 2pF
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TSH110-TSH111-TSH112-TSH113-TSH114
(fig.38): Input / Output Isolation vs. Frequency..
0
(tab.1): Closed-loop Gain and Feedback Components.
VCC (V) Gain +10 Rfb (Ω) 510 510 680 680 2.2k 2.2k 510 510 680 680 2.2k 2.2k Cfb (pF) 2 2 2 2 2 2 2 2 -3dB Bw (MHz) 46 42 105 90 170 110 37 36 93 86 130 100 0.1dB Bw (MHz) 14 13 50 40 30 20 13 12 25 30 50 18
-20
Input/output Isolation (dB)
-40
-10 +2 ±6 -2
Standby mode
-60
-80
-100
+1 -1
-120 0.01 0.1 1 10 100
+10 -10 +2 ±2.5
Frequency (MHz)
Choice of the Feedback Circuit The TSH11x is a serie of current feedback amplifiers. For a current feedback structure the bandwidth depends on the value of the feedback components and the value of supply voltage. A good choice of these components is necessary to achieve the gain flatness and the stability. The following table shows the typical -3dB bandwidth and 0.1dB bandwidth assuming different gains and power supply on 100Ω load. Please see also the Closed Loop Gain vs. Frequency curves on page 8 of the datasheet. (fig.39): Non-inverting and Inverting Implementation..
Input Non-Inverting Gain = 1+ Rfb / RG Output
-2 +1 -1
Inverting Amplifier Biasing In this case a resistance (R on fig.40) is necessary to achieve a good input biasing. This resistance is calculated by assuming the negative and positive input bias current. The aim is to make the compensation of the offset bias current which could affect the input offset voltage and the output DC component. Assuming Ib-, Ib+, Rin, Rfb and a zero volt output, the resistance R comes : R = Rin // Rfb . (fig.40): Compensation of the Input Bias Current..
+
_
Rfb
49.9Ω
50Ω
Rfb
RG Cfb
IbRfb Inverting Gain = - Rfb / Rin
Rin
_
Vcc+ Output
Input
Rin
_
Cfb
+
Ib+ VccR
Load
Output
+
R
49.9Ω
50Ω
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TSH110-TSH111-TSH112-TSH113-TSH114
PACKAGE MECHANICAL DATA 8 PINS - PLASTIC MICROPACKAGE (SO) PACKAGE MECHANICAL DATA 8 PINS - THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP)
k
c
0,25 mm .010 inch GAGE PLANE
L E1 SEATING PLANE
A A2 A1
5 4
C
E
D
L1
b
C
8
aaa
PIN 1 IDENTIFICATION
Millimeters Dim. Min. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 0.1 0.65 0.35 0.19 0.25 4.8 5.8 1.27 3.81 3.8 0.4 4.0 0.150 1.27 0.016 0.6 8° (max.) Typ. Max. Min.
Inches Dim. Typ. Max. 0.069 0.010 0.065 0.033 0.019 0.010 0.020 0.197 0.244 0.050 0.150 0.157 0.050 0.024 A A1 A2 b c D E E1 e k l Min. 0.05 0.80 0.19 0.09 2.90 4.30 0° 0.50
Millimeters Typ. Max. 1.20 0.15 1.05 0.30 0.20 3.10 4.50 8° 0.75 Min. 0.01 0.031 0.007 0.003 0.114 0.169 0° 0.09
Inches Typ. Max. 0.05 0.006 0.041 0.15 0.012 0.122 0.177
1.75 0.25 0.004 1.65 0.85 0.026 0.48 0.014 0.25 0.007 0.5 0.010 45° (typ.) 5.0 0.189 6.2 0.228
1.00
0.039
3.00 6.40 4.40 0.65 0.60
0.118 0.252 0.173 0.025
8° 0.0236 0.030
1
17/19
e
TSH110-TSH111-TSH112-TSH113-TSH114
PACKAGE MECHANICAL DATA 14 PINS - PLASTIC MICROPACKAGE (SO) PACKAGE MECHANICAL DATA 14 PINS - THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP)
c
0,25 mm .010 inch GAGE PLANE
k
L C
G c1
E1
L SEATING PLANE
a2
a1
b1
b e3 D
e
A
s E M
C
A A2 A1
E
14 1
8 F 7
D
b
8
7
aaa C
14
1
PIN 1 IDENTIFICATION
Millimeters Dim. Min. A a1 a2 b b1 C c1 D (1) E e e3 F (1) G L M S 0.1 0.35 0.19 0.5 8.55 5.8 1.27 7.62 3.8 4.6 0.5 4.0 0.150 5.3 0.181 1.27 0.020 0.68 8° (max.) 45° (typ.) 8.75 0.336 6.2 0.228 Typ. Max. 1.75 0.2 1.6 0.46 0.25 Min. 0.004 0.014 0.007
Inches Dim. Typ. Max. 0.069 0.008 0.063 0.018 0.010 0.020 0.344 0.244 0.050 0.300 0.157 0.208 0.050 0.027 A A1 A2 b c D E E1 e k l Min. 0.05 0.80 0.19 0.09 4.90 4.30 0° 0.50
Millimeters Typ. Max. 1.20 0.15 1.05 0.30 0.20 5.10 4.50 8° 0.75 Min. 0.01 0.031 0.007 0.003 0.192 0.169 0° 0.09
Inches Typ. Max. 0.05 0.006 0.041 0.15 0.012 0.20 0.177
1.00
0.039
5.00 6.40 4.40 0.65 0.60
0.196 0.252 0.173 0.025
8° 0.0236 0.030
Note : (1) D and F do not include mold flash or protrusions - Mold flash or protrusions shall not exceed 0.15mm (.066 inc) ONLY FOR DATA BOOK.
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e
L1
TSH110-TSH111-TSH112-TSH113-TSH114
PACKAGE MECHANICAL DATA 5 PINS - TINY PACKAGE (SOT23) 2
A
E
A2
D
b
A1
L C
E1
Millimeters Dim. Min. A A1 A2 B C D D1 e E F L K 0.90 0 0.90 0.35 0.09 2.80 Typ. 1.20 1.05 0.40 0.15 2.90 1.90 0.95 2.80 1.60 0.5 Max. 1.45 0.15 1.30 0.50 0.20 3.00 Min. 0.035 0.035 0.014 0.004 0.110
Inches Typ. 0.047 0.041 0.016 0.006 0.114 0.075 0.037 0.110 0.063 0.014 Max. 0.057 0.006 0.051 0.020 0.008 0.118
2.60 1.50 0.10 0d
3.00 1.75 0.60 10d
0.102 0.059 0.004 0d
0.0118 0.069 0.024 10d
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States © http://www.st.com
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