TSU111, TSU112, TSU114
Datasheet
Nanopower (900 nA), high accuracy (150 µV) 5 V CMOS operational amplifier
Features
•
•
•
•
•
•
•
•
•
•
•
Sub-micro ampere current consumption: Icc = 900 nA typ. at 25 °C
Low offset voltage: 150 µV max. at 25 °C, 235 µV max. over full temperature
range (-40 to 85 °C)
Low noise over 0.1 to 10 Hz bandwidth: 3.6 µVpp
Low supply voltage: 1.5 V to 5.5 V
Rail-to-rail input and output
Gain bandwidth product: 11.5 kHz typ.
Low input bias current: 10 pA max. at 25 °C
High tolerance to ESD: 4 kV HBM
More than 25 years of typical equivalent lifetime supplied by a 220 mA.h
CR2032 coin type Lithium battery
High accuracy without calibration
Tolerance to power supply transient drops
Applications
Product status link
•
Gas sensors: CO, O2, and H2S
•
•
•
•
•
Alarms: PIR sensors
Signal conditioning for energy harvesting and wearable products
Ultra long-life battery-powered applications
Battery current sensing
Active RFID tags
TSU111, TSU112, TSU114
Related products
See TSU101, TSU102,
and TSU104
for further
power savings
See TSZ121, TSZ122,
TSZ124
for increased
accuracy
Description
The TSU111, TSU112 and the TSU114 operational amplifiers (op-amp) offer an ultra
low-power consumption per channel of 900 nA typical and 1.2 µA maximum when
supplied by 3.3 V. Combined with a supply voltage range of 1.5 V to 5.5 V, these
features allow the TSU11x to be efficiently supplied by a coin type Lithium battery or
a regulated voltage in low-power applications.
The high accuracy of 150 µV max. and 11.5 kHz gain bandwidth make the TSU11x
ideal for sensor signal conditioning, battery supplied, and portable applications.
DS11846 - Rev 6 - February 2019
For further information contact your local STMicroelectronics sales office.
www.st.com
TSU111, TSU112, TSU114
Package pin connections
1
Package pin connections
Figure 2. Pin connections for each package (top view)
OUT 1
6 VCC+
VCC- 2
5 NC
IN- 3
4 IN+
DFN6 1.2x1.3
IN+
1
VCC-
2
IN-
3
DFN8 2x2
5
VCC+
4
OUT
MiniSO8
TSU112
SC70-5
TSU111
+
VCC -
+
TSU114
TSU114
1. The exposed pad of the DFN8 2x2 can be connected to VCC- or left floating.
DS11846 - Rev 6
page 2/35
TSU111, TSU112, TSU114
Absolute maximum ratings and operating conditions
2
Absolute maximum ratings and operating conditions
Table 1. Absolute maximum ratings (AMR)
Symbol
Parameter
Value
VCC
Supply voltage
Vid
Differential input voltage (2)
±VCC
Vin
Input voltage (3)
(VCC -) - 0.2 to (VCC +) + 0.2
Iin
Input current (4)
10
Tstg
Storage temperature
-65 to 150
Tj
Maximum junction temperature
150
Rthja
ESD
(1)
Unit
6
Thermal resistance junction-to-ambient (5) (6)
DFN6 1.2x1.3
232
SC70-5
205
DFN8 2x2
57
MiniSO8
190
QFN16 3x3
45
TSSOP14
100
HBM: human body model (7)
4000
CDM: charged device model (8)
1500
Latch-up immunity (9)
200
V
mA
°C
°C/W
V
mA
1. All voltage values, except the differential voltage are with respect to the network ground terminal.
2. The differential voltage is the non-inverting input terminal with respect to the inverting input terminal.
3. (VCC+) - Vin must not exceed 6 V, Vin - (VCC-) must not exceed 6 V.
4. The input current must be limited by a resistor in-series with the inputs.
5. Rth are typical values.
6. Short-circuits can cause excessive heating and destructive dissipation.
7. Related to ESDA/JEDEC JS-001 Apr. 2010.
8. Related to JEDEC JESD22-C101-E Dec. 2009.
9. Related to JEDEC JESD78C Sep. 2010.
Table 2. Operating conditions
Symbol
DS11846 - Rev 6
Parameter
Value
VCC
Supply voltage
1.5 to 5.5
Vicm
Common-mode input voltage range
(VCC-) - 0.1 to (VCC+) + 0.1
Toper
Operating free-air temperature range
-40 to 85
Unit
V
°C
page 3/35
TSU111, TSU112, TSU114
Electrical characteristics
3
Electrical characteristics
Table 3. Electrical characteristics at (V CC +) = 1.8 V with (V CC -) = 0 V, Vicm = V CC /2, Tamb = 25 °C, and RL = 1 MΩ
connected to V CC /2 (unless otherwise specified)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
DC performance
Vio
Input offset voltage
ΔVio/ΔT
Input offset voltage drift
Iio
Input offset current (1)
Iib
Input bias current (1)
Common mode rejection
ratio,
CMR
20 log (ΔVicm/ΔVio),
T = 25 °C
150
-40 °C < T< 85 °C
235
-40 °C < T< 85 °C
1.4
T = 25 °C
1
-40 °C < T< 85 °C
1
-40 °C < T< 85 °C
10
T = 25 °C
76
-40 °C < T< 85 °C
71
107
dB
RL = 100 kΩ, T = 25 °C
Large signal voltage gain,
Vout = 0.2 V to (VCC+) - 0.2 V
RL = 100 kΩ,
-40 °C < T< 85 °C
95
High-level output voltage,
(drop from VCC+)
120
90
RL = 10 kΩ, T = 25 °C
VOH
10
RL = 10 kΩ,
RL = 10 kΩ, T = 25°C
Low-level output voltage
8
RL = 10 kΩ,
Vout = VCC ,
Iout
VΙD = -200 mV
Output source current,
Vout = 0 V,
VΙD = 200 mV
ICC
T = 25 °C
2.8
-40 °C < T< 85 °C
1.5
T = 25 °C
2
-40 °C < T< 85 °C
1.5
Supply current (per channel),
no load,
T = 25 °C
Vout = VCC/2
-40 °C < T< 85 °C
25
mV
40
-40 °C < T< 85 °C
Output sink current,
25
40
-40 °C < T< 85 °C
VOL
pA
50
Vicm = 0 to 1.8 V
Avd
μV/°C
10
50
T = 25 °C
µV
5
mA
4
900
1200
1480
nA
AC performance
GBP
Gain bandwidth product
10
Fu
Unity gain frequency
8
Φm
Phase margin
Gm
Gain margin
DS11846 - Rev 6
RL = 1 MΩ, CL = 60 pF
kHz
60
degrees
10
dB
page 4/35
TSU111, TSU112, TSU114
Electrical characteristics
Symbol
Parameter
Conditions
SR
Slew rate (10 % to 90 %)
en
Equivalent input noise voltage
ʃen
Low-frequency, peak-to-peak
input noise
trec
Overload recovery time
Min.
RL = 1 MΩ, CL = 60 pF,
Typ.
Max.
Unit
2.5
V/ms
f = 100 Hz
220
nV/√Hz
Bandwidth: f = 0.1 to 10 Hz
3.8
µVpp
100 mV from rail in
comparator, RL = 100 kΩ,
325
µs
Vout = 0.3 V to (VCC+) - 0.3 V
VΙD = ±1 V, -40 °C < T< 85 °C
1. Guaranteed by design
Table 4. Electrical characteristics at (V CC +) = 3.3 V with (V CC -) = 0 V, Vicm = V CC /2, Tamb = 25 °C, and RL = 1 MΩ
connected to V CC /2 (unless otherwise specified)
Symbol
Parameter
Conditions
Min. Typ. Max.
Unit
DC performance
Vio
Input offset voltage
ΔVio/ΔT
Input offset voltage drift
Iio
Input offset current (1)
Iib
Input bias current
CMR
Avd
VOH
-40 °C < T< 85 °C
235
-40 °C < T< 85 °C
1.4
T = 25 °C
1
-40 °C < T< 85 °C
T = 25 °C
1
-40 °C < T< 85 °C
81
20 log (ΔVicm/ΔVio), Vicm = 0 to 3.3 V
-40 °C < T< 85 °C
76
Large signal voltage gain, Vout = 0.2 V to
RL = 100 kΩ, T = 25 °C
105
(VCC+) - 0.2 V
RL = 100 kΩ, -40 °C < T< 85 °C
105
Iout
Output source current, Vout = 0 V, VΙD = 200 mV
RL = 10 kΩ, T = 25 °C
7
25
mV
40
T = 25 °C
12
-40 °C < T< 85 °C
6
T = 25 °C
9
-40 °C < T< 85 °C
5
-40 °C < T< 85 °C
25
40
RL = 10 kΩ, -40 °C < T< 85 °C
Vout = VCC/2
pA
dB
130
10
RL = 10 kΩ, T = 25°C
T = 25 °C
10
110
RL = 10 kΩ, -40 °C < T< 85 °C
Supply current (per channel), no load,
μV/°C
50
T = 25 °C
Output sink current, Vout = VCC , VΙD = -200 mV
µV
10
50
Common mode rejection ratio,
Low-level output voltage
ICC
150
(1)
High-level output voltage, (drop from VCC+)
VOL
T = 25 °C
22
mA
18
900
1200
1480
nA
AC performance
GBP
Gain bandwidth product
11
Fu
Unity gain frequency
10
Φm
Phase margin
Gm
Gain margin
DS11846 - Rev 6
RL = 1 MΩ, CL = 60 pF
kHz
60
degrees
7
dB
page 5/35
TSU111, TSU112, TSU114
Electrical characteristics
Symbol
Parameter
SR
Slew rate (10 % to 90 %)
en
Equivalent input noise voltage
ʃen
Low-frequency, peak-to-peak input noise
trec
Overload recovery time
Conditions
Min. Typ. Max.
Unit
2.5
V/ms
f = 100 Hz
220
nV/√Hz
Bandwidth: f = 0.1 to 10 Hz
3.7
µVpp
630
µs
RL = 1 MΩ, CL = 60 pF,
Vout = 0.3 V to (VCC+) - 0.3 V
100 mV from rail in comparator, RL = 100 kΩ,
VΙD = ±1 V, -40 °C < T< 85 °C
1. Guaranteed by design
Table 5. Electrical characteristics at (V CC +) = 5 V with (V CC -) = 0 V, Vicm = V CC /2, Tamb = 25 °C, and RL = 1 MΩ
connected to V CC /2 (unless otherwise specified)
Symbol
Parameter
Conditions
Min. Typ. Max.
Unit
DC performance
Vio
Input offset voltage
ΔVio/ΔT
Input offset voltage drift
Iio
Input offset current (1)
Iib
-40 °C < T< 85 °C
235
-40 °C < T< 85 °C
1.4
1
-40 °C < T< 85 °C
Input bias current (1)
1
-40 °C < T< 85 °C
T = 25 °C
90
-40 °C < T< 85 °C
90
T = 25 °C
85
-40 °C < T< 85 °C
80
Supply voltage rejection ratio, VCC = 1.5 to 5.5 V,
T = 25 °C
92
Vicm = 0 V
-40 °C < T< 85 °C
84
RL = 100 kΩ, T = 25 °C
105
RL = 100 kΩ, -40 °C < T< 85 °C
101
Large signal voltage gain, Vout = 0.2 V to (VCC+) - 0.2 V
VOH
High-level output voltage, (drop from VCC+)
VOL
RL = 10 kΩ, T = 25 °C
Output source current, Vout = 0 V, VΙD = 200 mV
Supply current (per channel), no load, Vout = VCC/2
135
7
25
mV
40
30
-40 °C < T< 85 °C
15
T = 25 °C
25
-40 °C < T< 85 °C
18
-40 °C < T< 85 °C
25
40
T = 25 °C
T = 25 °C
dB
116
RL = 10 kΩ, -40 °C < T< 85 °C
Iout
pA
112
10
RL = 10 kΩ, T = 25°C
Output sink current, Vout = VCC , VΙD = -200 mV
10
121
RL = 10 kΩ, -40 °C < T< 85 °C
Low-level output voltage
μV/°C
50
Common mode rejection ratio, 20 log (ΔVicm/ΔVio), Vicm
= 0 to 5 V
Avd
µV
10
50
T = 25 °C
CMR
ICC
150
T = 25 °C
Common mode rejection ratio, 20 log (ΔVicm/ΔVio), Vicm
= 0 to 3.9 V
SVR
T = 25 °C
45
mA
41
950 1350
1620
nA
AC performance
DS11846 - Rev 6
page 6/35
TSU111, TSU112, TSU114
Electrical characteristics
Symbol
Parameter
Conditions
GBP
Gain bandwidth product
11.5
Fu
Unity gain frequency
10
Φm
Phase margin
Gm
Gain margin
SR
Slew rate (10 % to 90 %)
en
RL = 1 MΩ, CL = 60 pF
Min. Typ. Max.
Unit
kHz
60
degrees
7
dB
RL = 1 MΩ, CL = 60 pF, Vout = 0.3 V to (VCC
+) - 0.3 V
2.7
V/ms
Equivalent input noise voltage
f = 100 Hz
200
nV/√Hz
ʃen
Low-frequency, peak-to-peak input noise
Bandwidth: f = 0.1 to 10 Hz
3.6
µVpp
trec
Overload recovery time
100 mV from rail in comparator,
RL = 100 kΩ, VΙD = ±1 V,
940
µs
-40 °C < T< 85 °C
EMIRR
Electromagnetic interference rejection ratio (2)
Vin = -10 dBm, f = 400 MHz
54
Vin = -10 dBm, f = 900 MHz
79
Vin = -10 dBm, f = 1.8 GHz
65
Vin = -10 dBm, f = 2.4 GHz
65
dB
1. Guaranteed by design
2. Based on evaluations performed only in conductive mode on the TSU111ICT.
DS11846 - Rev 6
page 7/35
TSU111, TSU112, TSU114
Electrical characteristic curves
4
Electrical characteristic curves
Figure 4. Supply current vs. input common-mode voltage
Figure 5. Input offset voltage vs. input common-mode
voltage
Figure 6. Input offset voltage distribution
Input offset voltage (µV)
Figure 3. Supply current vs. supply voltage
Common-mode input voltage (V)
Figure 7. Input offset voltage vs. temperature at 3.3 V
supply voltage
DS11846 - Rev 6
Figure 8. Input offset voltage temperature coefficient
distribution from -40 °C to 25 °C
page 8/35
TSU111, TSU112, TSU114
Electrical characteristic curves
Figure 9. Input offset voltage temperature coefficient
distribution from 25 °C to 85 °C
Figure 10. Input bias current vs. temperature at mid VICM
Figure 11. Input bias current vs. temperature at low VICM
Figure 12. Input bias current vs. temperature at high VICM
Figure 13. Output characteristics at 1.8 V supply voltage
Figure 14. Output characteristics at 3.3 V supply voltage
DS11846 - Rev 6
page 9/35
TSU111, TSU112, TSU114
Electrical characteristic curves
Figure 15. Output characteristics at 5 V supply voltage
Figure 16. Output saturation with a sinewave on the input
Figure 17. Output saturation with a square wave on the
input
Figure 18. Phase reversal free
Figure 19. Slew rate vs. supply voltage
Figure 20. Output swing vs. input signal frequency
DS11846 - Rev 6
page 10/35
TSU111, TSU112, TSU114
Electrical characteristic curves
Figure 21. Triangulation of a sine wave
Figure 22. Large signal response at 3.3 V supply voltage
Figure 23. Small signal response at 3.3 V supply voltage
Figure 24. Overshoot vs. capacitive load at 3.3 V supply
voltage
Figure 25. Open loop output impedance vs. frequency
Figure 26. Bode diagram at 1.8 V supply voltage
DS11846 - Rev 6
page 11/35
TSU111, TSU112, TSU114
Electrical characteristic curves
Figure 27. Bode diagram at 3.3 V supply voltage
Figure 28. Bode diagram at 5 V supply voltage
Figure 29. Gain bandwidth product vs. input commonmode voltage
Figure 30. In-series resistor (Riso) vs. capacitive load
Figure 31. Noise vs. frequency for different power supply
voltages
Figure 32. Noise vs. frequency for different commonmode input voltages
DS11846 - Rev 6
page 12/35
TSU111, TSU112, TSU114
Electrical characteristic curves
Figure 33. Noise amplitude on a 0.1 Hz to 10 Hz frequency range
DS11846 - Rev 6
page 13/35
TSU111, TSU112, TSU114
Application information
5
Application information
5.1
Nanopower applications
The TSU11x can operate from 1.5 V to 5.5 V. The parameters are fully specified at 1.8 V, 3.3 V, and 5 V supply
voltages and are very stable in the full VCC range. Additionally, the main specifications are guaranteed on the
industrial temperature range from -40 to 85 °C. The estimated lifetime of the TSU11x exceeds 25 years if supplied
by a CR2032 battery (see Figure 34. CR2032 battery).
Figure 34. CR2032 battery
5.1.1
Schematic optimization aiming for nanopower
To benefit from the full performance of the TSU11x, the impedances must be maximized so that current
consumption is not lost where it is not required.
For example, an aluminum electrolytic capacitance can have significantly high leakage. This leakage may be
greater than the current consumption of the op-amp. For this reason, ceramic type capacitors are preferred.
For the same reason, big resistor values should be used in the feedback loop. However, there are two main
limitations to be considered when choosing a resistor.
1.
Noise generated: a 100 kΩ resistor generates 40 nV/√Hz, a bigger resistor value generates even more
noise.
2.
Leakage on the PCB: leakage can be generated by moisture. This can be improved by using a specific
coating process on the PCB.
DS11846 - Rev 6
page 14/35
TSU111, TSU112, TSU114
Rail-to-rail input
5.1.2
PCB layout considerations
For correct operation, it is advised to add 10 nF decoupling capacitors as close as possible to the power supply
pins.
Minimizing the leakage from sensitive high impedance nodes on the inputs of the TSU11x can be performed with
a guarding technique. The technique consists of surrounding high impedance tracks by a low impedance track
(the ring). The ring is at the same electrical potential as the high impedance node.
Therefore, even if some parasitic impedance exists between the tracks, no leakage current can flow through them
as they are at the same potential (see Figure 35. Guarding on the PCB).
Figure 35. Guarding on the PCB
5.2
Rail-to-rail input
The TSU11x is built with two complementary PMOS and NMOS input differential pairs. Thus, the device has a
rail-to-rail input, and the input common mode range is extended from (VCC-) - 0.1 V to (VCC+) + 0.1 V.
The TSU11x has been designed to prevent phase reversal behavior.
5.3
Input offset voltage drift overtemperature
The maximum input voltage drift variation overtemperature is defined as the offset variation related to the offset
value measured at 25 °C. The operational amplifier is one of the main circuits of the signal conditioning chain, and
the amplifier input offset is a major contributor to the chain accuracy. The signal chain accuracy at 25 °C can be
compensated during production at application level. The maximum input voltage drift over temperature enables
the system designer to anticipate the effect of temperature variations.
The maximum input voltage drift over temperature is computed using Equation 1.
Equation 1
∆V io
V ( T ) – V io ( 25 °C)
= ma x io
∆T
T – 25 °C
Where T = -40 °C and 85 °C.
The TSU11x datasheet maximum values are guaranteed by measurements on a representative sample size
ensuring a Cpk (process capability index) greater than 1.3.
DS11846 - Rev 6
page 15/35
TSU111, TSU112, TSU114
Long term input offset voltage drift
5.4
Long term input offset voltage drift
To evaluate product reliability, two types of stress acceleration are used:
•
Voltage acceleration, by changing the applied voltage
•
Temperature acceleration, by changing the die temperature (below the maximum junction temperature
allowed by the technology) with the ambient temperature.
The voltage acceleration has been defined based on JEDEC results, and is defined using Equation 2.
Equation 2
A FV = e
β . ( VS – VU )
Where:
AFV is the voltage acceleration factor
β is the voltage acceleration constant in 1/V, constant technology parameter (β = 1)
VS is the stress voltage used for the accelerated test
VU is the voltage used for the application
The temperature acceleration is driven by the Arrhenius model, and is defined in Equation 3.
Equation 3
A FT = e
E
1
1
-----a- .
–
k
TU TS
Where:
AFT is the temperature acceleration factor
Ea is the activation energy of the technology based on the failure rate
k is the Boltzmann constant (8.6173 x 10-5 eV.K-1)
TU is the temperature of the die when VU is used (°K)
TS is the temperature of the die under temperature stress (°K)
The final acceleration factor, AF, is the multiplication of the voltage acceleration factor and the temperature
acceleration factor (Equation 4).
Equation 4
A F = A FT × A FV
AF is calculated using the temperature and voltage defined in the mission profile of the product. The AF value can
then be used in Equation 5 to calculate the number of months of use equivalent to 1000 hours of reliable stress
duration.
Equation 5
Months = A F × 1000 h × 12 months / ( 24 h × 365.25 days )
To evaluate the op amp reliability, a follower stress condition is used where VCC is defined as a function of the
maximum operating voltage and the absolute maximum rating (as recommended by JEDEC rules).
The Vio drift (in µV) of the product after 1000 h of stress is tracked with parameters at different measurement
conditions (see Equation 6).
Equation 6
V CC = maxV op with V icm = V CC / 2
The long term drift parameter (ΔVio), estimating the reliability performance of the product, is obtained using the
ratio of the Vio (input offset voltage value) drift over the square root of the calculated number of months (Equation
7).
Equation 7
∆V io =
DS11846 - Rev 6
V io dr ift
( month s )
page 16/35
TSU111, TSU112, TSU114
Using the TSU11x with sensors
Where Vio drift is the measured drift value in the specified test conditions after 1000 h stress duration.
5.5
Using the TSU11x with sensors
The TSU11x has MOS inputs, thus input bias currents can be guaranteed down to 10 pA maximum at ambient
temperature. This is an important parameter when the operational amplifier is used in combination with high
impedance sensors.
The TSU11x is perfectly suited for trans-impedance configuration. This configuration allows a current to be
converted into a voltage value with a gain set by the user. It is an ideal choice for portable electrochemical gas
sensing or photo/UV sensing applications. The TSU11x, using trans-impedance configuration, is able to provide a
voltage value based on the physical parameter sensed by the sensor.
5.5.1
Electrochemical gas sensors
The output current of electrochemical gas sensors is generally in the range of tens of nA to hundreds of µA. As
the input bias current of the TSU11x is very low (see Figure 10. Figure 8, Figure 11. Figure 9, and
Figure 12. Figure 10) compared to these current values, the TSU11x is well adapted for use with the
electrochemical sensors of two or three electrodes. Figure 37. Potentiostat schematic using the TSU111 shows a
potentiostat (electronic hardware required to control a three electrode cell) schematic using the TSU11x. In such a
configuration, the devices minimize leakage in the reference electrode compared to the current being measured
on the working electrode.
Another great advantage of TSU11x versus the competition is its low noise for low frequencies (3.6 µVpp over 0.1
to 10 Hz), and low input offset voltage of 150 µV max. These improved parameters for the same power
consumption allow a better accuracy.
Figure 36. Trans-impedance amplifier schematic
R
I
TSU111
Sensor:
electrochemical
photodiode/UV
Vref + RI
+
Vref
Figure 37. Potentiostat schematic using the TSU111
TSU111
TSU111
+
+
Vref1
Vref2
DS11846 - Rev 6
page 17/35
TSU111, TSU112, TSU114
Fast desaturation
5.6
Fast desaturation
When the TSU11x goes into saturation mode, it takes a short period of time to recover, typically 630 µs. When
recovering after saturation, the TSU11x does not exhibit any voltage peaks that could generate issues (such as
false alarms) in the application (see Figure 16. Figure 14).
We can observe that this circuit still exhibits good gain even close to the rails i.e. Avd greater than 105 dB for Vcc
= 3.3 V with Vout varying from 200 mV up to a supply voltage minus 200 mV. With a trans-impedance schematic,
a voltage reference can be used to keep the signal away from the supply rails.
5.7
Using the TSU11x in comparator mode
The TSU11x can be used as a comparator. In this case, the output stage of the device always operates in
saturation mode. In addition, Figure 4. Figure 3 shows that the current consumption is not higher and even
decreases smoothly close to the rails. The TSU11x is obviously an operational amplifier and is therefore
optimized for use in linear mode. We recommend using the TS88 series of nanopower comparators if the primary
function is to perform a signal comparison only.
5.8
ESD structure of the TSU11x
The TSU11x is protected against electrostatic discharge (ESD) with dedicated diodes (see Figure 38. ESD
structure). These diodes must be considered at application level especially when signals applied on the input pins
go beyond the power supply rails (VCC+) or (VCC-).
Figure 38. ESD structure
TSU111
+
Current through the diodes must be limited to a maximum of 10 mA as stated in Table 1. Absolute maximum
ratings (AMR). A serial resistor on the inputs can be used to limit this current.
5.9
EMI robustness of nanopower devices
Nanopower devices exhibit higher impedance nodes and consequently they are more sensitive to EMI. To
improve the natural robustness of the TSU11x device, we recommend to add three capacitors of around 22 pF
each between the two inputs, and between each input and ground. These capacitors lower the impedance of the
input at high frequencies and therefore reduce the impact of the radiation.
DS11846 - Rev 6
page 18/35
TSU111, TSU112, TSU114
Package information
6
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK®
packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions
and product status are available at: www.st.com. ECOPACK® is an ST trademark.
DS11846 - Rev 6
page 19/35
TSU111, TSU112, TSU114
SC70-5 (or SOT323-5) package information (TSU111)
6.1
SC70-5 (or SOT323-5) package information (TSU111)
Figure 39. SC70-5 (or SOT323-5) package outline
SIDE VIEW
DIMENSIONS IN MM
GAUGE PLANE
COPLANAR LEADS
SEATING PLANE
TOP VIEW
Table 6. SC70-5 (or SOT323-5) package mechanical data
Dimensions
Ref.
Millimeters
Min.
A
Typ.
0.80
Max.
1.10
A1
DS11846 - Rev 6
Inches
Min.
Typ.
0.032
0.043
0.10
A2
0.80
b
0.90
Max.
0.004
1.00
0.032
0.035
0.15
0.30
0.006
0.012
c
0.10
0.22
0.004
0.009
D
1.80
2.00
2.20
0.071
0.079
0.087
E
1.80
2.10
2.40
0.071
0.083
0.094
E1
1.15
1.25
1.35
0.045
0.049
0.053
e
0.65
0.025
e1
1.30
0.051
L
0.26
<
0°
0.36
0.46
0.010
8°
0°
0.014
0.039
0.018
8°
page 20/35
TSU111, TSU112, TSU114
DFN6 1.2x1.3 package information ( TSU111)
6.2
DFN6 1.2x1.3 package information ( TSU111)
Figure 40. DFN6 1.2x1.3 package outline
BOTTOM VIEW
e
b
PIN#1 ID
L3
L
SIDE VIEW
A1
A
SEATING
PLANE
C
8
0.05 C
TOP VIEW
D
E
PIN 1
Table 7. DFN6 1.2x1.3 mechanical data
Dimensions
Ref
Millimeters
Min.
DS11846 - Rev 6
Inches
Typ.
Max.
Min.
Typ.
Max.
A
0.31
0.38
0.40
0.012
0.015
0.016
A1
0.00
0.02
0.05
0.000
0.001
0.002
b
0.15
0.18
0.25
0.006
0.007
0.010
c
0.05
0.002
D
1.20
0.047
E
1.30
0.051
e
0.40
0.016
L
0.475
0.525
0.575
0.019
0.021
0.023
L3
0.375
0.425
0.475
0.015
0.017
0.019
page 21/35
TSU111, TSU112, TSU114
DFN6 1.2x1.3 package information ( TSU111)
Figure 41. DFN6 1.2x1.3 recommended footprint
0.40
0.25
3
1
1.20
0.475
4
6
Table 8. DFN6 1.2x1.3 recommended footprint data
Dimensions
Ref.
A
Inches
4.00
0.158
C
0.50
0.020
D
0.30
0.012
E
1.00
0.039
F
0.70
0.028
G
0.66
0.026
B
DS11846 - Rev 6
Millimeters
page 22/35
TSU111, TSU112, TSU114
MiniSO8 package information (TSU112)
6.3
MiniSO8 package information (TSU112)
Figure 42. MiniSO8 package outline
Table 9. MiniSO8 mechanical data
Dim.
Millimeters
Min.
Inches
Typ.
A
Min.
Typ.
1.1
A1
0
A2
0.75
b
Max.
0.043
0.15
0
0.95
0.03
0.22
0.4
0.009
0.016
c
0.08
0.23
0.003
0.009
D
2.8
3
3.2
0.11
0.118
0.126
E
4.65
4.9
5.15
0.183
0.193
0.203
E1
2.8
3
3.1
0.11
0.118
0.122
e
L
0.85
0.65
0.4
0.6
0.006
0.033
0.8
0.016
0.024
0.95
0.037
L2
0.25
0.01
ccc
0°
0.037
0.026
L1
k
DS11846 - Rev 6
Max.
8°
0.1
0°
0.031
8°
0.004
page 23/35
TSU111, TSU112, TSU114
DFN8 2x2 package information (TSU112)
6.4
DFN8 2x2 package information (TSU112)
Figure 43. DFN8 2x2 package outline
Table 10. DFN8 2x2 package mechanical data
Dimensions
Ref.
Millimeters
Min.
A
0.51
Typ.
0.55
A1
Max.
0.60
Min.
0.020
Typ.
0.022
0.05
A3
Max.
0.024
0.002
0.15
0.006
b
0.18
0.25
0.30
0.007
0.010
0.012
D
1.85
2.00
2.15
0.073
0.079
0.085
D2
1.45
1.60
1.70
0.057
0.063
0.067
E
1.85
2.00
2.15
0.073
0.079
0.085
E2
0.75
0.90
1.00
0.030
0.035
0.039
e
L
ddd
DS11846 - Rev 6
Inches
0.50
0.225
0.325
0.020
0.425
0.08
0.009
0.013
0.017
0.003
page 24/35
TSU111, TSU112, TSU114
DFN8 2x2 package information (TSU112)
Figure 44. DFN8 2x2 recommended footprint
DS11846 - Rev 6
page 25/35
TSU111, TSU112, TSU114
TSSOP14 package information (TSU114)
6.5
TSSOP14 package information (TSU114)
Figure 45. TSSOP14 package outline
DS11846 - Rev 6
page 26/35
TSU111, TSU112, TSU114
TSSOP14 package information (TSU114)
Table 11. TSSOP14 mechanical data
Symbol
mm
Min.
Typ.
A
1.20
A1
0.05
A2
0.80
b
0.19
0.30
c
0.09
0.20
D
4.90
5.00
5.10
E
6.20
6.40
6.60
E1
4.30
4.40
4.50
e
L
k
aaa
0.15
1.00
1.05
0.65
0.45
L1
DS11846 - Rev 6
Max.
0.60
0.75
1.00
0
8
0.10
page 27/35
TSU111, TSU112, TSU114
QFN16 (3x3x0.9) package information (TSU114)
6.6
QFN16 (3x3x0.9) package information (TSU114)
Figure 46. QFN16 (3x3x0.9) package outline
DS11846 - Rev 6
page 28/35
TSU111, TSU112, TSU114
QFN16 (3x3x0.9) package information (TSU114)
Table 12. QFN16 (3x3x0.9) mechanical data
mm
Symbol
Min.
A
0.80
A1
0
A3
0.90
Max.
1
0.05
0.20
b
0.18
D
2.90
D2
1.50
E
2.90
E2
1.50
e
L(1)
Typ.
0.30
3.00
3.10
1.80
3.00
3.10
1.80
0.50
0.30
0.50
1. The value of “L” a JEDEC norm is min. 0.35 – max. 0.45
Figure 47. QFN16 (3x3x0.9) recommended footprint
DS11846 - Rev 6
page 29/35
TSU111, TSU112, TSU114
Ordering information
7
Ordering information
Table 13. Order code
Order code
Temperature range
Package (1)
TSU111IQ1T
DFΝ6 1.2x1.3
TSU111ICT
SC70-5
TSU112IQ2T
TSU112IST
-40 °C to 85 °C
DFN8 2x2
MiniSO8
Marking
K8
K37
TSU114IPT
TSSOP14
TSU114IPT
TSU114IQ4T
QFN16 3x3x0.9
K164
1. All devices are delivered in tape and reel packing.
DS11846 - Rev 6
page 30/35
TSU111, TSU112, TSU114
Revision history
Table 14. Document revision history
Date
Revision
17-Oct-2016
1
Changes
Initial release
Features: added "rail-to-rail input and output".
Description: updated the maximum ultra low-power consumption of TSU111 op-amp.
14-Nov-2016
2
Applications: updated
Table 5: added EMIRR typ. values
Added Section 5.9: "EMI robustness of nanopower devices".
DS11846 - Rev 6
04-Dec-2017
3
Added the part number TSU112 and the relative package information MiniSO8 and DFN8 2x2.
08-May-2018
4
Updated Section 3 Electrical characteristics.
21-Jan-2019
5
Added the part number TSU114, therefore the document has been updated accordingly.
06-Feb-2019
6
Updated Section 3 Electrical characteristics.
Added Figure 5. Input offset voltage vs. input common-mode voltage.
page 31/35
TSU111, TSU112, TSU114
Contents
Contents
1
Package pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2
Absolute maximum ratings and operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
4
Electrical characteristic curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
5.1
Nanopower applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.1.1
Schematic optimization aiming at nanopower . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.1.2
PCB layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.2
Rail-to-rail input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.3
Input offset voltage drift overtemperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.4
Long term input offset voltage drift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.5
Using the TSU11x with sensors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.5.1
6
7
Electrochemical gas sensors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.6
Fast desaturation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.7
Using the TSU11x in comparator mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.8
ESD structure of the TSU11x. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.9
EMI robustness of nanopower devices. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
6.1
SC70-5 (or SOT323-5) package information (TSU111) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.2
DFN6 1.2x1.3 package information ( TSU111) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.3
MiniSO8 package information (TSU112) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.4
DFN8 2x2 package information (TSU112) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.5
TSSOP14 package information (TSU114) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.6
QFN16 (3x3x0.9) package information (TSU114) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
DS11846 - Rev 6
page 32/35
TSU111, TSU112, TSU114
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Absolute maximum ratings (AMR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics at (V CC +) = 1.8 V with (V CC -) = 0 V, Vicm = V CC /2, Tamb = 25 °C, and RL = 1 MΩ
connected to V CC /2 (unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics at (V CC +) = 3.3 V with (V CC -) = 0 V, Vicm = V CC /2, Tamb = 25 °C, and RL = 1 MΩ
connected to V CC /2 (unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical characteristics at (V CC +) = 5 V with (V CC -) = 0 V, Vicm = V CC /2, Tamb = 25 °C, and RL = 1 MΩ
connected to V CC /2 (unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
SC70-5 (or SOT323-5) package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
DFN6 1.2x1.3 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
DFN6 1.2x1.3 recommended footprint data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
MiniSO8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
DFN8 2x2 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
TSSOP14 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
QFN16 (3x3x0.9) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Order code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
DS11846 - Rev 6
page 33/35
TSU111, TSU112, TSU114
List of figures
List of figures
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
Figure 42.
Figure 43.
Figure 44.
Figure 45.
Figure 46.
Figure 47.
DS11846 - Rev 6
Pin connections for each package (top view) . . . . . . . . . . . . . . . . . . . . . .
Supply current vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply current vs. input common-mode voltage . . . . . . . . . . . . . . . . . . . .
Input offset voltage vs. input common-mode voltage . . . . . . . . . . . . . . . . .
Input offset voltage distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input offset voltage vs. temperature at 3.3 V supply voltage . . . . . . . . . . . .
Input offset voltage temperature coefficient distribution from -40 °C to 25 °C .
Input offset voltage temperature coefficient distribution from 25 °C to 85 °C .
Input bias current vs. temperature at mid VICM . . . . . . . . . . . . . . . . . . . . .
Input bias current vs. temperature at low VICM . . . . . . . . . . . . . . . . . . . . .
Input bias current vs. temperature at high VICM . . . . . . . . . . . . . . . . . . . .
Output characteristics at 1.8 V supply voltage. . . . . . . . . . . . . . . . . . . . . .
Output characteristics at 3.3 V supply voltage. . . . . . . . . . . . . . . . . . . . . .
Output characteristics at 5 V supply voltage . . . . . . . . . . . . . . . . . . . . . . .
Output saturation with a sinewave on the input . . . . . . . . . . . . . . . . . . . . .
Output saturation with a square wave on the input. . . . . . . . . . . . . . . . . . .
Phase reversal free . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Slew rate vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output swing vs. input signal frequency . . . . . . . . . . . . . . . . . . . . . . . . . .
Triangulation of a sine wave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Large signal response at 3.3 V supply voltage . . . . . . . . . . . . . . . . . . . . .
Small signal response at 3.3 V supply voltage . . . . . . . . . . . . . . . . . . . . .
Overshoot vs. capacitive load at 3.3 V supply voltage . . . . . . . . . . . . . . . .
Open loop output impedance vs. frequency . . . . . . . . . . . . . . . . . . . . . . .
Bode diagram at 1.8 V supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bode diagram at 3.3 V supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bode diagram at 5 V supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gain bandwidth product vs. input common-mode voltage . . . . . . . . . . . . . .
In-series resistor (Riso) vs. capacitive load . . . . . . . . . . . . . . . . . . . . . . . .
Noise vs. frequency for different power supply voltages . . . . . . . . . . . . . . .
Noise vs. frequency for different common-mode input voltages . . . . . . . . . .
Noise amplitude on a 0.1 Hz to 10 Hz frequency range . . . . . . . . . . . . . . .
CR2032 battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Guarding on the PCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Trans-impedance amplifier schematic . . . . . . . . . . . . . . . . . . . . . . . . . . .
Potentiostat schematic using the TSU111. . . . . . . . . . . . . . . . . . . . . . . . .
ESD structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SC70-5 (or SOT323-5) package outline . . . . . . . . . . . . . . . . . . . . . . . . . .
DFN6 1.2x1.3 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DFN6 1.2x1.3 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . .
MiniSO8 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DFN8 2x2 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DFN8 2x2 recommended footprint. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TSSOP14 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
QFN16 (3x3x0.9) package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
QFN16 (3x3x0.9) recommended footprint. . . . . . . . . . . . . . . . . . . . . . . . .
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page 34/35
TSU111, TSU112, TSU114
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2019 STMicroelectronics – All rights reserved
DS11846 - Rev 6
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