VBG08H-E
Ignition coil driver power I.C.
Datasheet - production data
• Battery fault tolerant pins
• ESD protected
• TTL compatible
Description
VBG08H is a single channel driver, plus an IGBT
power stage internally assembled using Chip On
Chip (COC) hybrid technology.
The two chips are assembled together in the
OctaPAK® package.
Features
HVCL
INOM
VS
IS
360 V
8 A(1)
6 - 40 V
5 mA
1. Max operative current
• Smart electronic ignition with embedded IGBT
power stage
• Coil current limiter
The device comes with several built-in protections
like a coil current limiter, thermal monitoring
circuit, which triggers a Soft Shut Down (SSD) as
soon as the maximum allowable temperature is
reached (TSD). It avoids extra voltage on the
secondary side of the coil transformer.
The Slow Turn On circuit (STO), avoids unwanted
sparks during first negative dV/dt of HVC voltage
at turn on.
The current flag circuit provides an output logical
signal voltage when the coil current reaches a
fixed threshold.
• Current threshold flag diagnostic output
• Enable pin
• Slow turn-on
• Soft shut down (SSD) operated by low voltage
clamp circuit (LVC)
• SSD activated by
– Thermal intervention (Tj > 150°C)
– Enable pin
– Input overvoltage
– Battery overvoltage
Table 1. Device summary
Order codes
Package
OctaPAK
March 2015
This is information on a product in full production.
Tube
Tape and reel
VBG08H-E
VBG08HTR-E
DocID024413 Rev 3
1/34
www.st.com
Contents
VBG08H-E
Contents
1
Detailed description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.1
Slow turn-on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.2
Input over voltage (INP_OV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.3
Battery overvoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4
3.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
3.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.1
General setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5
PCB layout suggestions and PGND disconnection . . . . . . . . . . . . . . . 27
6
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
6.1
7
8
2/34
OctaPAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Package informations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
7.1
ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
7.2
OctaPAK package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
DocID024413 Rev 3
VBG08H-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin name and function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Suggested component values for the application circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Thermal data (estimated) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
PCB properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
OctaPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
DocID024413 Rev 3
3/34
3
List of figures
VBG08H-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
4/34
Block diagram schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
OctaPAK top view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Voltage and current conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Input control vs VHVC time definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Electrical characteristics timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Current limit without TSD activation Tj < TSD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Current limit followed by TSD activation (Tj = TSD) (case 1) . . . . . . . . . . . . . . . . . . . . . . . 16
Current limit followed by TSD activation (Tj = TSD) (case 2) . . . . . . . . . . . . . . . . . . . . . . . 17
Thermal cycling behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Switch on attempt at Tj > TSSD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Soft switch off caused by EN pin pulled high . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Coil current discharge completion after releasing of EN pin . . . . . . . . . . . . . . . . . . . . . . . . 20
Device behaviour when EN pin becomes high before low to high transition of Input
command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Device behaviour when EN pin is pulled up and down while Input command is still high . 22
Device behavior in case of Input over voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Device behavior in case of battery over voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Current flag threshold vs temperature for IFLAG = 6.5 A . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
HV self clamped energy capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
General ISO Pulse schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
ISO Pulse schematic for pulse type 5b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
OctaPAK on two-layers PCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
OctaPAK on four-layers PCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Rthj-amb vs PCB copper area in open box free air condition (one channel on) . . . . . . . . . . 29
OctaPAK thermal impedance junction ambient single pulse (one channel on) . . . . . . . . . 29
Thermal fitting model of a double-channel HSD in OctaPAK . . . . . . . . . . . . . . . . . . . . . . . 30
OctaPAK package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
DocID024413 Rev 3
VBG08H-E
1
Detailed description
Detailed description
VBG08H is a single channel driver, plus an IGBT power stage internally assembled using
Chip On Chip (COC) hybrid technology. The Power Stage integrates the current shunt
resistor for sensing the coil current, and the thermal diode for monitoring the temperature
which triggers the TSD intervention.
The two chips are assembled together in the OctaPAK® package. The device is intended for
driving huge inductive loads in harsh automotive environments (as electronic ignitions). The
functional block diagram is shown in Figure 1.
The IGBT is controlled by the input signals pin INP. In particular, when the device is enabled
(EN pin is at “0”), the transition low to high of INP pin turns-on the IGBT, while, the transition
high to low of the same input signal, turns-off the IGBT causing an extra voltage on the
secondary side of the coil transformer, generating a spark in the spark system plug.
The implemented features offer a specific design advantage that makes the VBG08H
particularly suitable for E.C.U. applications.
The device comes with several built-in protections like a coil current limiter, a thermal
monitoring circuit, which triggers a Soft Shut Down (SSD) as soon as the maximum
allowable temperature is reached (TSD), avoiding to generate an extra voltage on the
secondary side of the coil transformer.
Soft shut down is performed using a Low Voltage Clamp (LVC) circuit, which clamps the
primary coil winding at a fixed voltage, with respect to the battery value: LVC is activated as
the result of a logical OR combination among different fault conditions: thermal shutdown,
input overvoltage, internal wire bonding disconnection, supply overvoltage, device disabling
in ON-state (EN pin pulled high while INP pin is high).
All these fault events trigger the soft shut down operation and cause a slow discharge of the
coil current, avoiding generating any undesired sparks.
If SSD is activated by TSD, the complete slow coil current discharge depends on the
duration of input signal in the high state. If the input signal is high for a time longer than the
coil discharge time, the SSD stays activated until the coil is completely discharged (zero coil
current).
Anyway, if the input command signal arrives while the SSD is active, the LVC is immediately
disabled for allowing the spark generation with the residual energy.
SSD timing diagrams are shown in Figure 7, Figure 8 and Figure 9.
In case of thermal intervention, the IGBT remains switched off until the internal junction
temperature, decreasing, reaches a lower temperature threshold, which corresponds to the
fixed temperature hysteresis. In addition to the built-in protections above described, the chip
is equipped with a single current flag diagnostic output.
Current Flag circuit provides an output logical signal voltage, which goes low (after a filtering
time) when the input control pin goes high, and returns high when the coil current reaches a
fixed value threshold. An internal voltage regulator, connected to the battery pin VS supplies
all the internal circuitry.
The EN pin is intended as chip enable pin and it is used for enabling / disabling the device
(see Figure 6).
DocID024413 Rev 3
5/34
33
Detailed description
VBG08H-E
The event “EN pulled high” is stored inside internal register and causes the complete slow
discharge of coil current.
Device can restart when the EN pin is pulled low and after the first low to high transition of
the input pin. Figure 12, Figure 13, Figure 14 and Figure 15, show device behavior, with
different combinations of INP and EN signal pins. This pin is provided with an internal pullup current source, which disables the chip by default, in case the pin is left floating.
1.1
Slow turn-on
Device is internally equipped with a completely integrated Slow Turn On circuit (STO), that
helps avoiding unwanted sparks during first negative dV/dt of HVC voltage at turn on (see
Figure 5).
1.2
Input over voltage (INP_OV)
Device is internally equipped with a built in protection which is activated in case of command
input pin over voltage. If the input pin is shorted with a supply voltage (VBATT or VS), which is
above the internal fixed threshold “INP_OV_TH_H”, the device operates a soft shutdown
which slowly discharges the coil current. This event is managed by the device as a “real
time event”, so the completion of coil current discharge depends on the time duration of the
INP_OV detection. As soon as the INP_OV condition is removed (voltage at input pin
decreases below the second lower threshold voltage “INP_OV_TH_H - INP_OV_HYS”), the
device can be switched on, if a normal high state voltage is applied on the command input
pin. See Figure 16 for more details.
1.3
Battery overvoltage
When the supply voltage VS overcomes the "VS_OFF_TH" (battery load dump) for a time
longer than 220 µs (typ), the device operates a soft shutdown until the complete coil current
discharge. The device remains switched off until the battery voltage falls under the second
lower threshold voltage, which corresponds to the prefixed hysteresis parameter
“VS_OFF_HYS”.
Once this condition is verified, only a low to high transition of command input pin can turn on
the device. See Figure 17 for more details.
6/34
DocID024413 Rev 3
VBG08H-E
2
Block diagram
Block diagram
Figure 1. Block diagram schematic
96
+9&
96B2))
/9&
,13
96
,13B29
+9&ODPS
5()
325
/9&B(1
/9&B(1
,*%7B21
'ULYHU 672
-0(*$
(Q
6Z
9
(1
5+9
95(*
,*%7
7ULPP B&B)ODJ
)XVHV7ULPPLQJ
&HOOV520
&XUU/LPLWHU
7ULPP B&B/ LP
7ULPP B7+B'
&)
76'
7+'BIDXOW
7ULPP B&B/LP
7ULPP B7+B'
7KHUPDO
6KXW'RZQ
76
61
&XUU)ODJ
76
63
56
61
7ULPP B&)
26&0K]
3*1' 0' 1'
*1'
*$3*&)7
Figure 2. OctaPAK top view
)7$
1(/%
$'
(/%
&/
74
*/1
1(/%
("1($'5
DocID024413 Rev 3
7/34
33
Block diagram
VBG08H-E
Table 2. Pin name and function
8/34
Pin number
Pin name
Pin function
1
PGND1
2
INP
Input control pin / pulled down if left floating
3
VS
Battery supply voltage
4
EN
Chip enable control pin / pulled up if left floating
5
GND
Controller GND
6
C.F.
Current flag output / open drain
7
PGND2
TAB
HVC
Power GND
Power GND
IGBT HV collector
DocID024413 Rev 3
VBG08H-E
3
Electrical specifications
Electrical specifications
Figure 3. Voltage and current conventions
,6
,+9&
96
, ,1 3
+9&
96
,13
9,1 3
,(1
(1
9 (1
6 +9&
9%*+
,&)
&)
9&)
*1'
3*1' 3*1'
,*1'
,3*1'
,3*1'
*$3*&)7
Figure 4. Application circuit
9%$77
287
,1
99ROW5HJ
&
&
96
+9&
.
,13
X3
9%*+
(1
.
(1
&)
&)
*1' 3*1'3*1'
2
9
5
&
1$#1PXFS(/%TUSBDLTNVTUCFQFSGFDUMZTZNNFUSJDBMSFTQFDUUPUIFHMPCBM(/%OPEF
PUIFSXJTFBEJGGFSFODFJOCFUXFFO
*1(/%BOE*1(/%PDDVST
MFBEJOHUPBOFSSPSPOUIF* $0*-@-*.BOE*$'@5)QBSBNFUFST
*UJTTVHHFTUFEUPDPOOFDU(/%QJOUP1(/%QJOTBTTIPXOJOUIFGJHVSF
NJOJNJ[JOHBTNVDIBTQPTTJCMFUIFWPMUBHF
EJGGFSFODFCFUXFFOUIFUXPQJOT
DocID024413 Rev 3
9/34
33
Electrical specifications
VBG08H-E
Table 3. Suggested component values for the application circuit
Type
Description
Value
R1
CFlag filter resistor
1K
R2
CFlag filter resistor
≥4K
C1
VCC capacitor
100 nF
C2
VCC capacitor
10 µF
C3
CFlag filter capacitor
(1)
1. Application dependent.
3.1
Absolute maximum ratings
Stressing the device above the ratings listed in Table 4 may cause permanent damage to
the device itself. These are stress ratings only and operation of the device at these or any
other conditions above those indicated in the operating sections of this specification is not
implied. Exposure to the conditions reported in this section for extended periods may affect
device reliability.
Table 4. Absolute maximum ratings(1)
Symbol
Parameter
Value
Unit
VHVC
Collector voltage (internally limited)
-16 to Vclamp
V
IHVC
Collector current (internally limited)
Internally limited
A
I.C. supply voltage range
-0.3 to 40
V
VINP
Input voltage
-0.3 to 28
V
VCF
Current flag output voltage
-0.3 to 5.5
V
ICF
Flag output current
1.5
mA
VEN
Enable voltage
-0.3 to 28
V
Single pulse SCIS energy (Tj = 25°C; L = 6 mH)
265
mJ
Single pulse SCIS energy (Tj = 150°C; L = 6 mH)
175(2)
mJ
VS
ESCIS25
ESCIS150
VESD
ESD voltage (HVC pin) (HBM: R = 1.5 KΩ; C = 100 pF)
4
KV
VESD
ESD voltage (all pins) (HBM: R = 1.5 KΩ; C = 100 pF)
2
KV
Operating junction temperature
-40 to 175
°C
Storage temperature range
-55 to 175
°C
-6
A
No constrains
5
2
ms
ms
Tj
Tstg
I(HVC)_UNDGND Max underground collector current (t_app ≤ 100 µs)
tSC_MAX
Short circuit withstand time RSC = 0 Ω; IHVC = 10.5 A
(maximum current limitation)
– VS up to 16 V
– 16 V < VS ≤ 24 V
– 24 < VS ≤ 28V
1. Refer to Figure 3 for voltage or currents conventions.
2. In case of the device switch-off occurs in current limitation with open secondary condition, the energy limit
must not be exceeded. The double fault condition is not provided.
10/34
DocID024413 Rev 3
VBG08H-E
3.2
Electrical specifications
Thermal data
Table 5. Thermal data (estimated)
Symbol
3.3
Parameter
Rtj-case
Thermal resistance junction-case
Rtj-amb
Thermal resistance junction-ambient
Value
Unit
0.55
°C/W
see Figure 24
°C/W
Electrical characteristics
-40°C < Tj < 150°C; VS = 6 ÷ 28 V, unless otherwise specified.
6:
Table 6. Power section
Symbol
Parameter
Test condition
VHV_CLAMP
VHVC high voltage clamp IHVC = 6.5 A
VLV_CLAMP
VHVC low voltage clamp
IHVC = 6.5 A
Min.
Typ.
Max.
Unit
320
360
400
V
VS + 7 VS + 10 VS + 13
V
VCE_SAT1
VHVC: collector to emitter
VS = 13.5 V; IHVC = 4 A
saturation voltage
1.5
V
VCE_SAT2
VHVC: collector to emitter VS = 13.5 V;
saturation voltage
IHVC = 6.5 A
1.8
V
6
mA
28
V
35
V
IS_STBY
Standby supply current
IN = 0; EN = 0; IN = X;
EN = 1; VS = 13.5 V
5
Operative DC supply
voltage
5.4
VS_OFF_TH
VS overvoltage threshold
29
VS_OFF_HYS
VS overvoltage
hysteresis
0.5
3
V
0
8
A
10.5
A
10.5
A
1
mA
VS
ICOIL_NOM
ICOIL_LIM
ICES
Operative coil current
range
-40°C < Tj < 125°C;
VS = 6 V
Coil current limit
Collector current
(including the RHV
contribution)
VINP_H
High level input voltage
VINP_L
Low level input voltage
VINP_HYS
IIN_PDW
INP_OV_TH_H
32
-40°C < Tj < 125°C;
9 V ≤ VS ≤ 28 V
8.5
VCE = 28 V; VINP = 0 V;
Tj = 125°C
0.3
9.5
3
V
1.5
Input threshold
hysteresis
0.2
Input pull down current
VINP = 4 V
Input overvoltage
activation threshold
DocID024413 Rev 3
V
V
10
20
30
µA
8
9
10
V
11/34
33
Electrical specifications
VBG08H-E
Table 6. Power section (continued)
Symbol
INP_OV_HYS
VCF_L
ICF_leakage
ICF_TH_6.5
Parameter
Test condition
Input overvoltage
hysteresis
Min.
Typ.
Max.
Unit
0.8
1.4
2
V
Low level C.F. output
voltage
ICF = 1 mA
0.8
V
Leakage current on flag
output
VINP = 0; VCF = 4 V;
VS = 13.5 V
10
µA
Coil current level
threshold 6.5 A(1)
-40°C ≤ Tj < 25°C
5.85
7
25°C ≤ Tj < 100°C
6
6.85
100°C ≤ Tj < 125°C
6.2
6.8
125°C ≤ Tj ≤ 150°C
6.05
6.95
175
°C
33
°C
A
TSSD
Thermal shutdown
intervention
150
TSSD_HYS
Thermal hysteresis
17
VEN_H
High level enable
voltage
3
VEN_L
Low level enable voltage VOUT free to follow VINP
VEN_HYS
EN input hysteresis
-IEN_PU
Enable pin pull up
current
25
V
1.5
0.2
VEN = 0 V
V
V
10
20
30
µA
1. See Figure 18: Current flag threshold vs temperature for IFLAG = 6.5 A).
Table 7. Timing characteristics
Symbol
Parameter
Test condition
fCLK
12/34
Typ.
1.5
2
Max. Unit
2.5
MHz
tFT_CF
Current flag filtering time
16/fCLK
µs
tFT_EN
Enable filtering time
32/fCLK
µs
tFT_INP
Input filtering time
32/fCLK
µs
tdON
Delay time from INP rising
edge to VHVC = 0.9 VS
(see Figure 5)
EN = 0; Tj = 25°C
(ΔVHVC/Δt)ON
HVC slope during turn-on
(see Figure 5)
EN = 0; Tj = 25°C;
VS = 13.5 V
tdOFF
Delay time from INP falling
edge to VHVC = 100 V
(see Figure 5)
ICOIL = 6.5 A; EN = 0; Tj
= 25°C
HVC3V
STO deactivation threshold
Tj = 25°C; VS = 13.5 V
1.
Min.
Including tFT_INP.
DocID024413 Rev 3
0.1
0.3
3
30(1)
µs
1
V/µs
25
µs
5
V
VBG08H-E
Electrical specifications
Figure 5. Input control vs VHVC time definitions
9,13
9DOLG,13
7LPH
W )7B,13
9+9&
9
96
672
9
WG 21
WG 2))
7LPH
,&2,/
,)/B7+
7LPH
&)
W )7B&)
7LPH
'!0'#&4
DocID024413 Rev 3
13/34
33
Electrical specifications
VBG08H-E
Figure 6. Electrical characteristics timing
9(1
'LVDEOHG
(QDEOHG
7LPH
9,13
7LPH
,&2,/
,)/B7+
4IME
&)/$*
7LPH
+9&
96
7LPH
*$3*&)7
14/34
DocID024413 Rev 3
VBG08H-E
Electrical specifications
Figure 7. Current limit without TSD activation Tj < TSD
9(1
7LPH
9,13
7LPH
,&2,/
,&2,/B/,0
,)/B7+
7LPH
&)
7LPH
+9&
96
7LPH
*$3*&)7
DocID024413 Rev 3
15/34
33
Electrical specifications
VBG08H-E
Figure 8. Current limit followed by TSD activation (Tj = TSD) (case 1)
Input Switch OFF occurs after SSD completion
9(1
7LPH
9,13
7LPH
,&2,/
,&2,/B/,0
,)/B7+
7LPH
&)
7LPH
+9&
9/9&
96
7LPH
*$3*&)7
16/34
DocID024413 Rev 3
VBG08H-E
Electrical specifications
Figure 9. Current limit followed by TSD activation (Tj = TSD) (case 2)
Input switch OFF occurs during SSD
9(1
7LPH
9,13
7LPH
,&2,/
,&2,/B/,0
,)/B7+
7LPH
&)
7LPH
+9&
9/9&
96
7LPH
*$3*&)7
DocID024413 Rev 3
17/34
33
Electrical specifications
VBG08H-E
Figure 10. Thermal cycling behavior
9,13
/RQJ721 3XOVH
7KHUPDO6KXW'RZQ6ZLWFK2II
7LPH
,&2,/
, &2,/B/,0
,&)B7+
4IME
9&)
5HVWDUWDIWHUWKHUPDO+\VWHUHVLV
7LPH
("1($'5
Figure 11. Switch on attempt at Tj > TSSD
6 ,13
7LPH
,&2,/
7- !766'
7LPH
9&)
V W\S
7LPH
("1($'5
18/34
DocID024413 Rev 3
VBG08H-E
Electrical specifications
Figure 12. Soft switch off caused by EN pin pulled high
9(1
9DOLG(1
9,13
W )7B(1
7LPH
7LPH
,&2,/
,)/B7+
7LPH
&)
+9&
9/9&
96
'!0'#&4
DocID024413 Rev 3
19/34
33
Electrical specifications
VBG08H-E
Figure 13. Coil current discharge completion after releasing of EN pin
9(1
7LPH
9,13
4IME
,&2,/
,)/B7+
7LPH
&)
7LPH
+9&
9/9&
96
7LPH
("1($'5
20/34
DocID024413 Rev 3
VBG08H-E
Electrical specifications
Figure 14. Device behaviour when EN pin becomes high before low to high transition
of Input command
9(1
7LPH
9,13
7LPH
,&2,/
7LPH
&)
7LPH
+9&
96
7LPH
("1($'5
DocID024413 Rev 3
21/34
33
Electrical specifications
VBG08H-E
Figure 15. Device behaviour when EN pin is pulled up and down while Input
command is still high
9(1
7LPH
9,13
7LPH
,&2,/
,)/B7+
7LPH
&)
7LPH
+9&
9/9&
96
7LPH
("1($'5
22/34
DocID024413 Rev 3
VBG08H-E
Electrical specifications
Figure 16. Device behavior in case of Input over voltage
9(1
7LPH
9,13
9 ,13B29B7+B+
9 ,13B29B7+B/
7LPH
,&2,/
7LPH
+9&
9/9&
96
7LPH
("1($'5
Figure 17. Device behavior in case of battery over voltage
9(1
7LPH
9,13
7LPH
96
96B2))B7+
96B2))B7+ 96B2))B+
工商网监
湘ICP备2023018690号
