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VND5N07TR-E

VND5N07TR-E

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    TO252

  • 描述:

    IC PWR DRIVER N-CHANNEL 1:1 DPAK

  • 数据手册
  • 价格&库存
VND5N07TR-E 数据手册
VND5N07-E OMNIFET II fully autoprotected Power MOSFET Datasheet - production data Description 3 DPAK TO-252 The VND5N07-E is a monolithic device designed using STMicroelectronics® VIPower® M0 technology, intended for replacement of standard Power MOSFETs from DC to 50 KHz applications. Built-in thermal shutdown, linear current limitation and overvoltage clamp protect the chip in harsh environments. 3 2 1 1 IPAK TO-251 Features Max. on-state resistance (per ch.) RDS (on) 0.2Ω ILIMH 5A VCLAMP 70V Current limitation (typ) Drain-Source clamp voltage Fault feedback can be detected by monitoring the voltage at the input pin. • Linear current limitation • Thermal shutdown • Short circuit protection • Integrated clamp • Low current drawn from input pin • Diagnostic feedback through input pin • ESD protection • Direct access to the gate of the power mosfet (analog driving) • Compatible with standard Power MOSFET Table 1. Device summary Order codes Package Tube Tape and reel DPAK VND5N07-E VND5N07TR-E IPAK VND5N07-1-E September 2013 This is information on a product in full production. DocID025077 Rev 2 1/22 www.st.com Contents VND5N07-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 4 5 2/22 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.1 Overvoltage clamp protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.2 Linear current limiter circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.3 Overtemperature and short circuit protection . . . . . . . . . . . . . . . . . . . . . . 17 3.4 Status feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.2 DPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.3 IPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 DocID025077 Rev 2 VND5N07-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 On . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Dynamic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Protections (-40°C < Tj < 150°C, unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . 8 DPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 IPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 DocID025077 Rev 2 3/22 3 List of figures VND5N07-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. 4/22 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Switching waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Thermal impedance for DPAK / IPAK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Static drain-source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Static drain-source on resistance vs. input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Normalized on resistance Vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Static drain-source on resistance Vs. Id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Switching time resistive load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Turn-on current slope (VIN = 10 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Turn-on current slope (VIN = 5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Input voltage vs. input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Turn-off drain source voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Turn-off drain-source voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Switching time resistive load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Normalized on resistance vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Normalized input threshold voltage vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Normalized current limit vs. junction temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 DPAK package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 IPAK mechanical data and package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 DocID025077 Rev 2 VND5N07-E 1 Block diagram and pin description Block diagram and pin description Figure 1. Block diagram DocID025077 Rev 2 5/22 21 Electrical specifications VND5N07-E 2 Electrical specifications 2.1 Absolute maximum ratings Stressing the device above the rating listed in Table 2 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to Absolute maximum rating conditions for extended periods may affect device reliability. Table 2. Absolute maximum ratings Symbol Value Unit Internally clamped V VDSn Drain-Source voltage (VINn = 0 V) VINn Input voltage 18 V IDn Drain current Internally limited A IRn Reverse DC output current -7 A 2000 V 60 W VESD Ptot Electrostatic discharge (R = 1.5 KΩ, C = 100 pF) Total dissipation at Tc = 25°C Tj Operating junction temperature Internally limited °C Tc Case operating temperature Internally limited °C -55 to 150 °C Tstg 2.2 Parameter Storage temperature Thermal data Table 3. Thermal data Symbol 6/22 Parameter Max. value Unit Rthj-case Thermal resistance junction-case 3.75 °C/W Rthj-amb Thermal resistance junction-ambient 100 °C/W DocID025077 Rev 2 VND5N07-E 2.3 Electrical specifications Electrical characteristics Tcase = 25 °C unless otherwise stated. Table 4. Off Symbol Parameter Test conditions Min. Typ. Max. Unit 70 80 V Drain-Source clamp voltage VIN = 0 V; ID = 200 mA 60 Drain-Source threshold voltage VIN = 0 V; ID = 2 mA 55 Supply current from input pin VDS = 0 V; VIN = 10 V VINCL Input-Source reverse clamp voltage IIN = 1 mA IDSS Zero input voltage drain current (VIN = 0 V) VCLAMP VCLTH IISS V 250 500 µA -0.3 V VDS = 13 V; VIN = 0 V 50 µA VDS = 25 V; VIN = 0 V 200 µA Max. Unit -1.0 Table 5. On(1) Symbol Parameter Test conditions Min. Typ. Static drain-source on resistance VIN =10 V; ID = 2.5 A 200 mΩ RDS(on) VIN = 5 V; ID = 2.5 A 280 mΩ VIN(th) Input threshold voltage VDS = Vin; ID + Iin = 1 mA 3 V Max. Unit 0.8 1. Pulsed: pulse duration = 300 µs, duty cycle 1.5%. Table 6. Dynamic Symbol Parameter Test conditions gfs (1) Forward transconductance VDS = 13 V; ID = 2.5 A COSS Output capacitance VDS = 13 V; f = 1 MHz; VIN = 0 V Min. Typ. 3 4 S 200 300 pF Typ. Max. Unit 50 100 ns 60 100 ns 150 300 ns 40 80 ns 1. Pulsed: pulse duration = 300µs, duty cycle 1.5%. Table 7. Switching(1) Symbol td(on) tr td(off) tf Parameter Test conditions Turn-on delay time Rise time Turn-off delay time VDD = 15 V; ID = 2.5 A; Vgen = 10 V; Rgen = 10 Ω Fall time DocID025077 Rev 2 Min. 7/22 21 Electrical specifications VND5N07-E Table 7. Switching(1) Symbol td(on) tr td(off) tf Parameter Test conditions Turn-on delay time Rise time VDD = 15 V; ID = 2.5 A; Vgen = 10 V; Rgen = 1 kΩ Turn-off delay time Fall time (dI/dt)on Turn-on current slope Qi Min. Total input charge Typ. Max. Unit 150 250 ns 400 600 ns 3900 5000 ns 1100 1600 ns VDD = 15 V; ID = 2.5 A; Vin = 10 V; Rgen = 10 Ω 80 A/µS VDD = 12 V; ID = 2.5 A; VIN = 10 V 18 nC 1. Parameters guaranteed by design / characterization. Table 8. Source drain diode Symbol VSD(1) trr(2) Parameter Test conditions Forward on voltage Min. ISD = 2.5 A; VIN = 0 V Reverse recovery time Qrr (2) Reverse recovery charge IRRM(2) Reverse recovery current Typ. ISD = 2.5 A; dI/dt = 100 A/µs; VDD = 30 V Max. Unit 1.6 V 150 ns 0.3 µC 5.7 A 1. Pulsed: pulse duration = 300µs, duty cycle 1.5%. 2. Parameters guaranteed by design / characterization. Table 9. Protections (-40°C < Tj < 150°C, unless otherwise specified) Symbol Ilim Parameter Test conditions Drain current limit Min. Typ. Max. Unit VIN = 10 V; VDS = 13 V 3.5 5 7 A VIN = 5 V; VDS = 13 V 3.5 5 7 A VIN = 10 V 15 20 µS VIN = 5 V 40 60 µS tdlim (1) Step response current limit Tjsh (1) Overtemperature shutdown 150 °C Tjrs(1) Overtemperature reset 135 °C Igf(1) Fault sink current Eas (1) Single pulse avalanche energy VIN = 10 V; VDS = 13 V 50 mA VIN = 5 V; VDS = 13 V 20 mA Starting Tj = 25°C; VDD = 20 V; VIN = 10 V; Rgen = 1 kΩ; L = 10 mH 1. Parameters guaranteed by design / characterization. 8/22 DocID025077 Rev 2 0.2 J VND5N07-E Electrical specifications Figure 2. Switching time test circuit for resistive load Figure 3. Test circuit for diode recovery times A A D I FAST DIODE OMNIFET S L=100uH B B 330Ω D Rgen VDD I Vgen OMNIFET S 8.5 Ω DocID025077 Rev 2 9/22 21 Electrical specifications VND5N07-E Figure 4. Unclamped inductive load test circuits Figure 5. Input charge test circuit VIN GEN ND8003 10/22 DocID025077 Rev 2 VND5N07-E Electrical specifications Figure 6. Unclamped inductive waveforms Figure 7. Switching waveforms DocID025077 Rev 2 11/22 21 Electrical specifications VND5N07-E Figure 8. Thermal impedance for DPAK / IPAK 12/22 DocID025077 Rev 2 VND5N07-E 2.4 Electrical specifications Electrical characteristics curves Figure 9. Source-drain diode forward characteristics Figure 10. Static drain-source on resistance Figure 11. Derating curve Figure 12. Static drain-source on resistance vs. input voltage Figure 13. Normalized on resistance Vs temperature Figure 14. Transconductance DocID025077 Rev 2 13/22 21 Electrical specifications 14/22 VND5N07-E Figure 15. Static drain-source on resistance Vs. Id Figure 16. Switching time resistive load Figure 17. Turn-on current slope (VIN = 10 V) Figure 18. Turn-on current slope (VIN = 5 V) Figure 19. Input voltage vs. input charge Figure 20. Turn-off drain source voltage slope DocID025077 Rev 2 VND5N07-E Electrical specifications Figure 21. Turn-off drain-source voltage slope Figure 22. Capacitance variations Figure 23. Switching time resistive load Figure 24. Step response current limit Figure 25. Output characteristics Figure 26. Normalized on resistance vs. temperature DocID025077 Rev 2 15/22 21 Electrical specifications VND5N07-E Figure 27. Normalized input threshold voltage vs. temperature 16/22 Figure 28. Normalized current limit vs. junction temperature DocID025077 Rev 2 VND5N07-E 3 Protection features Protection features During normal operation, the INPUT pin is electrically connected to the gate of the internal Power MOSFET. The device then behaves like a standard Power MOSFET and can be used as a switch from DC to 50KHz. The only difference from the user’s standpoint is that a small DC current IISS flows into the INPUT pin in order to supply the internal circuitry. The device integrates: 3.1 Overvoltage clamp protection Internally set at 70 V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivaled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads. 3.2 Linear current limiter circuit Limits the drain current ID to Ilim whatever the INPUT pin voltages. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold Tjsh. 3.3 Overtemperature and short circuit protection These are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout occurs at minimum 150 °C. The device is automatically restarted when the chip temperature falls below 135 °C. 3.4 Status feedback In case of an overtemperature fault condition, a Status Feedback is provided through the Input pin. The internal protection circuit disconnects the input from the gate and connects it instead to ground via an equivalent resistance of 100 Ω. The failure can be detected by monitoring the voltage at the Input pin, which will be close to ground potential. Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit (with a small increase in RDS(on)). DocID025077 Rev 2 17/22 21 Package and packing information VND5N07-E 4 Package and packing information 4.1 ECOPACK® packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.2 DPAK mechanical data Figure 29. DPAK package dimensions P032P 18/22 DocID025077 Rev 2 VND5N07-E Package and packing information Table 10. DPAK mechanical data mm Dim. Min. Typ. Max. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 B 0.64 0.90 B2 5.20 5.40 C 0.45 0.60 C2 0.48 0.60 D 6.00 6.20 D1 E 5.1 6.40 6.60 E1 4.7 e 2.28 G 4.40 4.60 H 9.35 10.10 L2 L4 0.8 0.60 R V2 1.00 0.2 0° Package weight 8° Gr. 0.29 DocID025077 Rev 2 19/22 21 Package and packing information 4.3 VND5N07-E IPAK mechanical data Figure 30. IPAK mechanical data and package outline Table 11. IPAK mechanical data mm Symbol Min. Typ. A 2.2 2.4 A1 0.9 1.1 A3 0.7 1.3 B 0.64 0.9 B2 5.2 5.4 B3 0.85 B5 0.3 B6 0.95 C 0.45 0.6 C2 0.48 0.6 D 6 6.2 E 6.4 6.6 G 4.4 4.6 H 15.9 16.3 L 9 9.4 L1 0.8 1.2 L2 20/22 Max. 0.8 DocID025077 Rev 2 1 VND5N07-E 5 Revision history Revision history Table 12. Document revision history Date Revision Changes 01-Aug-2013 1 Initial release. 16-Sep-2013 2 Updated disclaimer. DocID025077 Rev 2 21/22 21 VND5N07-E Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. ST PRODUCTS ARE NOT DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B) AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT PURCHASER’S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR “AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL” INDUSTRY DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2013 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 22/22 DocID025077 Rev 2
VND5N07TR-E 价格&库存

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VND5N07TR-E
    •  国内价格 香港价格
    • 1+20.434501+2.46880
    • 10+17.0806010+2.06360
    • 100+13.53510100+1.63520
    • 500+11.47490500+1.38630
    • 1000+9.750101000+1.17800
    • 2500+9.223102500+1.11430
    • 5000+8.887705000+1.07380

    库存:27320