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VNP5N07

VNP5N07

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    TO-220-3

  • 描述:

    IC PWR DRIVER N-CHAN 1:1 TO220AB

  • 数据手册
  • 价格&库存
VNP5N07 数据手册
VNP5N07 ”OMNIFET”: FULLY AUTOPROTECTED POWER MOSFET TYPE VNP5N07 s s s s s s V clamp 70 V R DS(on) 0.2 Ω I l im 5A s s s s LINEAR CURRENT LIMITATION THERMAL SHUT DOWN SHORT CIRCUIT PROTECTION INTEGRATED CLAMP LOW CURRENT DRAWN FROM INPUT PIN DIAGNOSTIC FEEDBACK THROUGH INPUT PIN ESD PROTECTION DIRECT ACCESS TO THE GATE OF THE POWER MOSFET (ANALOG DRIVING) COMPATIBLE WITH STANDARD POWER MOSFET STANDARD TO-220 PACKAGE 1 2 3 TO-220 DESCRIPTION The VNP5N07 is a monolithic device made using SGS-THOMSON Vertical Intelligent Power M0 Technology, intended for replacement of standard power MOSFETS in DC to 50 KHz applications. Built in thermal shut-down, linear BLOCK DIAGRAM current limitation and overvoltage clamp protect the chip in harsh enviroments. Fault feedback can be detected by monitoring the voltage at the input pin. April 1996 1/11 VNP5N07 ABSOLUTE MAXIMUM RATING Symbol V DS V in ID IR V esd P to t Tj Tc T st g Parameter Drain-source Voltage (V in = 0) Input Voltage Drain Current Reverse DC O utput Current Electrostatic Discharge (C= 100 pF , R=1.5 KΩ ) Total Dissipation at T c = 25 o C Operating Junction T emperature Case Operating T emperature Storage Temperature Value Internally Clamped 18 Internally Limited -7 2000 31 Internally Limited Internally Limited -55 to 150 Unit V V A A V W o o o C C C THERMAL DATA R t hj-ca se R t hj- amb Thermal Resistance Junction-case Thermal Resistance Junction-ambient Max Max 4 62.5 o o C/W C/W ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symb ol V CLAMP V CL TH V I NCL I DSS I I SS Parameter Drain-source Clamp Voltage Drain-source Clamp Threshold Voltage Input-Source Reverse Clamp Voltage Zero Input Voltage Drain Current (V in = 0) Supply Current from Input Pin Test Cond ition s I D = 200 mA I D = 2 mA I in = -1 mA V DS = 13 V V DS = 25 V V DS = 0 V V in = 0 V in = 0 V in = 10 V 250 V in = 0 V in = 0 Min. 60 55 -1 -0.3 50 200 500 Typ . 70 Max. 80 Un it V V V µA µA µA ON (∗) Symb ol V IS( th) R DS( on) Parameter Input Threshold Voltage Static Drain-source On Resistance V DS = Vin V i n = 10 V Vi n = 5 V Test Cond ition s ID + I in = 1 mA I D = 2.5 A ID = 2.5 A Min. 0.8 Typ . Max. 3 0.200 0.280 Un it V Ω Ω DYNAMIC Symb ol g fs ( ∗ ) C oss Parameter Forward Transconductance Output Capacitance Test Cond ition s V DS = 13 V V DS = 13 V I D = 2.5 A f = 1 MHz Vin = 0 Min. 3 Typ . 4 200 300 Max. Un it S pF 2/11 VNP5N07 ELECTRICAL CHARACTERISTICS (continued) SWITCHING (∗∗) Symb ol t d(on) tr t d(of f) tf t d(on) tr t d(of f) tf (di/dt) on Qi Parameter Turn-on Delay Time Rise Time Turn-off Delay Time Fall T ime Turn-on Delay Time Rise Time Turn-off Delay Time Fall T ime Turn-on Current Slope Total Input Charge Test Cond ition s V DD = 15 V V gen = 10 V (see figure 3) V DD = 15 V V gen = 10 V (see figure 3) V DD = 15 V V i n = 10 V V DD = 12 V Id = 2.5 A R gen = 10 Ω Min. Typ . 50 60 150 40 150 400 3900 1100 35 18 Max. 100 100 300 80 250 600 5000 1600 Un it ns ns ns ns ns ns ns ns A/ µ s nC Id = 2.5 A R gen = 1000 Ω ID = 2.5 A R ge n = 10 Ω ID = 2.5 A V i n = 10 V SOURCE DRAIN DIODE Symb ol V SD ( ∗ ) t r r (∗∗ ) Q rr ( ∗∗ ) I RRM ( ∗∗ ) Parameter Forward O n Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Test Cond ition s I SD = 2.5 A V IN =0 150 0.3 5.7 I SD = 2.5 A di/dt = 100 A/µ s V DD = 30 V Tj = 25 o C (see test circuit, figure 5) Min. Typ . Max. 1.6 Un it V ns µC A PROTECTION Symb ol I lim t dl im (∗∗ ) T jsh (∗∗ ) T j rs (∗∗ ) I gf ( ∗∗ ) E as ( ∗∗ ) Parameter Drain Current Limit Step Response Current Limit Overtemperature Shutdown Overtemperature Reset Fault Sink Current Single Pulse Avalanche Energy V i n = 10 V Vi n = 5 V VDS = 13 V V DS = 13 V 0.2 V i n = 10 V Vi n = 5 V V i n = 10 V Vi n = 5 V 150 135 50 20 Test Cond ition s VDS = 13 V V DS = 13 V Min. 3.5 3.5 Typ . 5 5 15 40 Max. 7 7 20 60 Un it A A µs o C C o mA J starting T j = 25 o C V DD = 20 V V i n = 10 V R gen = 1 K Ω L = 30 mH ( ∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % ( ∗∗) Parametes guaranteed by design/characterization 3/11 VNP5N07 PROTECTION FEATURES During normal operation, the Input pin is electrically connected to the gate of the internal power MOSFET. The device then behaves like a standard power MOSFET and can be used as a switch from DC to 50 KHz. The only difference from the user’s standpoint is that a small DC current (Iiss) flows into the Input pin in order to supply the internal circuitry. The device integrates: - OVERTEMPERATURE AND SHORT CIRCUIT PROTECTION: these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout occurs at minimum 150oC. The device is automatically restarted when the chip temperature falls below 135oC. - OVERVOLTAGE CLAMP PROTECTION: internally set at 70V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads. the drain current Id to Ilim whatever the Input pin voltage. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold Tjsh. - STATUS FEEDBACK: In the case of an overtemperature fault condition, a Status Feedback is provided through the Input pin. The internal protection circuit disconnects the input from the gate and connects it instead to ground via an equivalent resistance of 100 Ω. The failure can be detected by monitoring the voltage at the Input pin, which will be close to ground potential. Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit (with a small increase in RDS(on)). - LINEAR CURRENT LIMITER CIRCUIT: limits 4/11 VNP5N07 Thermal Impedance Derating Curve Output Characteristics Transconductance Static Drain-Source On Resistance vs Input Voltage Static Drain-Source On Resistance 5/11 VNP5N07 Static Drain-Source On Resistance Input Charge vs Input Voltage Capacitance Variations Normalized Input Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Normalized On Resistance vs Temperature 6/11 VNP5N07 Turn-on Current Slope Turn-on Current Slope Turn-off Drain-Source Voltage Slope Turn-off Drain-Source Voltage Slope Switching Time Resistive Load Switching Time Resistive Load 7/11 VNP5N07 Switching Time Resistive Load Current Limit vs Junction Temperature Step Response Current Limit Source Drain Diode Forward Characteristics 8/11 VNP5N07 Fig. 1: Unclamped Inductive Load Test Circuits Fig. 2: Unclamped Inductive Waveforms Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Input Charge Test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 6: Waveforms 9/11 VNP5N07 TO-220 MECHANICAL DATA DIM. MIN. A C D D1 E F F1 F2 G G1 H2 L2 L4 L5 L6 L7 L9 DIA. 13.0 2.65 15.25 6.2 3.5 3.75 0.49 0.61 1.14 1.14 4.95 2.4 10.0 16.4 14.0 2.95 15.75 6.6 3.93 3.85 0.511 0.104 0.600 0.244 0.137 0.147 E mm TYP. MAX. 4.60 1.32 2.72 1.27 0.70 0.88 1.70 1.70 5.15 2.7 10.40 0.019 0.024 0.044 0.044 0.194 0.094 0.393 MIN. 0.173 0.048 0.094 4.40 1.23 2.40 inch TYP. MAX. 0.181 0.051 0.107 0.050 0.027 0.034 0.067 0.067 0.203 0.106 0.409 0.645 0.551 0.116 0.620 0.260 0.154 0.151 A C D1 L2 F1 D G1 Dia. F2 F L5 L7 L6 L9 L4 G 10/11 H2 P011C VNP5N07 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersede and replaces all information previously supplied. s SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectonics. © 1996 SGS-THOMSON Microelectronics - Printed in Italy - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A . 11/11
VNP5N07 价格&库存

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