VNQ7040AY-E

VNQ7040AY-E Quad channel high-side driver with MultiSense analog feedback for automotive applications Datasheet - production data – Self limiting of fast thermal transients – Configurable latch-off on overtemperature or power limitation with dedicated fault reset pin – Loss of ground and loss of VCC – Reverse battery through self turn-on – Electrostatic discharge protection PowerSSO-36 Features Max transient supply voltage VCC 41 V Operating voltage range VCC 4 to 28 V Typ. on-state resistance (per ch) RON 40 mΩ Current limitation (typ) ILIMH 34 A Standby current (max) ISTBY 0.5 µA • General – Quad channel smart high-side driver with MultiSense analog feedback – LED Mode for channel 0 and 1 – Very low standby current – Compatible with 3 V and 5 V CMOS outputs • MultiSense diagnostic functions – Multiplexed analog feedback of: Load current with high precision proportional current mirror; VCC supply voltage; TCHIP device temperature – Overload and short to ground (power limitation) indication – Thermal shutdown indication – OFF-state open load detection – Output short to VCC detection – Sense enable/disable • Protections – Undervoltage shutdown – Overvoltage clamp – Load current limitation September 2014 This is information on a product in full production. Applications • All types of Automotive resistive, inductive and capacitive loads • Specially intended for Automotive Turn Indicators (up to P27W or SAE1156 and R5W paralleled or LED Rear Combinations) Description The VNQ7040AY-E is a quad channel high-side driver manufactured using the latest ST proprietary VIPower® technology and housed in PowerSSO-36 package. The device is designed to drive 12 V automotive grounded loads through a 3 V and 5 V CMOS-compatible interface, and to provide protection and diagnostics. The device integrates advanced protective functions such as load current limitation, overload active management by power limitation and overtemperature shutdown with configurable latch-off. A FaultRST pin unlatches the output in case of fault or disables the latch-off functionality. A dedicated multifunction multiplexed analog output pin delivers sophisticated diagnostic functions such as high precision proportional load current sense, supply voltage feedback and chip temperature sense, in addition to the detection of overload and short circuit to ground, short to VCC and OFF-state open-load. The device features a dedicated LED Mode. DocID022412 Rev 8 1/55 www.st.com Contents VNQ7040AY-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2 Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 2.4 2.3.1 General electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.3.2 Bulb mode (default) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Electrical characteristics curves - Bulb Mode . . . . . . . . . . . . . . . . . . . . . . 21 2.4.1 2.5 3 4 2.5.1 Truth tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 2.5.2 Immunity to electrical transient disturbances on VCC (ISO 7637-2) . . . 34 3.1 Power limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 3.2 Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 3.3 Current limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 3.4 Negative voltage clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 4.1 Protection against reverse battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 4.2 Immunity against transient electrical disturbances . . . . . . . . . . . . . . . . . . 37 4.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 4.4 Multisense - analog current sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 4.4.1 Principle of Multisense signal generation . . . . . . . . . . . . . . . . . . . . . . . 40 4.4.2 TCASE and VCC monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 4.4.3 Short to VCC and OFF-state open-load detection . . . . . . . . . . . . . . . . . 43 Maximum demagnetization energy (VCC = 16 V) . . . . . . . . . . . . . . . . . . . 44 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 5.1 2/55 Electrical characteristics curves - LED mode . . . . . . . . . . . . . . . . . . . . . . 28 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 4.5 5 LED Mode (Channel 0 and 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 PowerSSO-36 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 DocID022412 Rev 8 VNQ7040AY-E 6 Contents Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 6.1 ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 6.2 PowerSSO-36 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 6.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 7 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 DocID022412 Rev 8 3/55 3 List of tables VNQ7040AY-E List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. 4/55 Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 8 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Logic Inputs (7 V < VCC < 28 V; -40 °C < Tj < 150 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Protections (7 V < VCC < 18 V; -40 °C < Tj < 150 °C). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 MultiSense (7 V < VCC < 18 V; -40 °C < Tj < 150 °C). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Power section in Bulb Mode (7 V < VCC < 28 V; -40 °C < Tj < 150 °C, unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Switching in Bulb Mode (VCC = 13 V; -40 °C < Tj < 150 °C, unless otherwise specified). . 17 MultiSense in Bulb Mode (7 V < VCC < 18 V; -40 °C < Tj < 150 °C). . . . . . . . . . . . . . . . . . 18 Switching in LED Mode (VCC = 13 V; -40 °C < Tj < 150 °C, unless otherwise specified) . . 24 Power section in LED Mode (7 V < VCC < 28 V; -40 °C < Tj < 150 °C, unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 MultiSense in LED Mode (7 V < VCC < 18 V; -40 °C < Tj < 150 °C) . . . . . . . . . . . . . . . . . . 25 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 MultiSense multiplexer addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Bulb/LED Mode Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 ISO 7637-2 - electrical transient conduction along supply line . . . . . . . . . . . . . . . . . . . . . . 37 MultiSense pin levels in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 PCB properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 PowerSSO-36 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 DocID022412 Rev 8 VNQ7040AY-E List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42. Figure 43. Figure 44. Figure 45. Figure 46. Figure 47. Figure 48. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Bulb Mode - IOUT/ISENSE versus IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Bulb Mode - current sense precision vs. IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 OFF-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Standby current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 IGND(ON) vs. Iout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Logic Input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Logic Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 High level logic input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Low level logic input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Logic Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 FaultRST Input clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 On-state resistance vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 On-state resistance vs. VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Won vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Woff vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 ILIMH vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 OFF-state open-load voltage detection threshold. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Vsense clamp vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Vsenseh vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 LED Mode - IOUT/ISENSE versus IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 LED Mode - current sense precision vs. IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 On-state resistance vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 On-state resistance vs. VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Won vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Woff vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 ILIMH vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Switching times and Pulse skew. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 MultiSense timings (current sense mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Multisense timings (chip temperature and VCC sense mode) . . . . . . . . . . . . . . . . . . . . . . 31 TDSKON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Simplified internal structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Multisense and diagnostic – block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Multisense block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Analogue HSD – open-load detection in off-state. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Open-load / short to VCC condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 GND voltage shift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Maximum turn off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 PowerSSO-36 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 46 DocID022412 Rev 8 5/55 6 List of figures Figure 49. Figure 50. Figure 51. Figure 52. Figure 53. 6/55 VNQ7040AY-E PowerSSO-36 thermal impedance junction ambient . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Thermal fitting model of a HSD in PowerSSO-36 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 PowerSSO-36 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 PowerSSO-36 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 PowerSSO-36 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 DocID022412 Rev 8 VNQ7040AY-E Block diagram and pin description Figure 1. Block diagram 9&& ,QWHUQDOVXSSO\ 9&&±*1' &ODPS 8QGHUYROWDJH VKXWGRZQ &KDQQHO &KDQQHO &+ &KDQQHO &+ &RQWURO 'LDJQRVWLF &KDQQHO &+ )DXOW567 ,1387 9&&±287 &ODPS ,1387 &+ ,1387 *DWH'ULYHU 6(/ 7 9&& 287387 921 /LPLWDWLRQ 6(/ 6(/ &XUUHQW /LPLWDWLRQ 6(Q 0XOWLVHQVH 287387 287387 ,1387 08; 1 Block diagram and pin description 3RZHU/LPLWDWLRQ 2YHUWHPSHUDWXUH 7 6KRUWWR9&& 2SHQ/RDGLQ2)) /(' /('  &XUUHQW 6HQVH )DXOW 96(16(+ *1' 287387 ("1($'5 Table 1. Pin functions Name VCC OUTPUT0,1,2,3 GND Function Battery connection. Power output. Ground connection. INPUT0,1,2,3 Voltage controlled input pin with hysteresis, compatible with 3 V and 5 V CMOS outputs. They control output switch state. MultiSense Multiplexed analog sense output pin; it delivers a current proportional to the selected diagnostic: load current, supply voltage or chip temperature. SEn Active high compatible with 3 V and 5 V CMOS outputs pin; it enables the MultiSense diagnostic pin LED0,1 Active high compatible with 3 V and 5 V CMOS outputs pin; they enable the LED mode on logic high level (see Table 15: Truth table). SEL0,1,2 Active high compatible with 3 V and 5 V CMOS outputs pin; they address the MultiSense multiplexer (see Table 15: Truth table). FaultRST Active low compatible with 3 V and 5 V CMOS outputs pin; it unlatches the output in case of fault; If kept low, sets the outputs in auto-restart mode. DocID022412 Rev 8 7/55 54 Block diagram and pin description VNQ7040AY-E Figure 2. Configuration diagram (top view) 287387 287387 287387 287387 1& 1& 287387 287387 287387 287387 1& /(' /(' 6(Q 6(/ 6(/ 6(/ 1&                                     7$%9FF 28 7387  28 7387  28 7387  28 7387  1& 1& 28 7387  28 7387  28 7387  28 7387  1& ,1387 ,1387 ,1387 ,1387 0XOWL6HQVH *1 ' )DXOW567 3RZHU6623$&.$*( ("1($'5 Table 2. Suggested connections for unused and not connected pins MultiSense N.C. Output Input Floating Not allowed X(1) X X X To ground Through 1 kΩ resistor X Not allowed Through 15 kΩ resistor Through 15 kΩ resistor 1. X: do not care. 8/55 SEn, SELx, LEDx, Connection / pin DocID022412 Rev 8 FaultRST VNQ7040AY-E 2 Electrical specification Electrical specification Figure 3. Current and voltage conventions IS VCC IFR FaultRST VFR ISEn MultiSense SEL0,1,2 ILED VSENSE LED0,1 IIN INPUT0,1,2,3 VIN VLED VOUT ISENSE ISEL VSEL VCC OUTPUT0,1,2,3 SEn VSEn VFn IOUT IGND 1. VFn = VOUTn - VCC 2.1 Absolute maximum ratings Stressing the device above the rating listed in Table 3 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to the conditions in table below for extended periods may affect device reliability. Table 3. Absolute maximum ratings Symbol Parameter Value VCC DC supply voltage 38 -VCC Reverse DC supply voltage 16 VCCPK Maximum transient supply voltage (ISO7637-2:2004 Pulse 5b level IV clamped to 40 V; RL = 4 Ω) 40 VCCJS Maximum jump start voltage for single pulse short circuit protection 28 -IGND DC reverse ground pin current 200 IOUT OUTPUT0,1,2,3 DC output current V mA Internally limited -IOUT_0,1 OUTPUT0,1 Reverse DC output current 10 -IOUT_2,3 OUTPUT2,3 Reverse DC output current 10 IIN Unit A INPUT0,1,2,3 DC input current ILED LED0,1 DC input current ISEn SEn DC input current ISEL SEL0,1,2 DC input current IFR FaultRST DC input current DocID022412 Rev 8 -1 to 10 mA -1 to 10 mA 9/55 54 Electrical specification VNQ7040AY-E Table 3. Absolute maximum ratings (continued) Symbol Value Unit FaultRST DC input voltage 7.5 V MultiSense pin DC output current (VGND = VCC and VSENSE < 0 V) -10 mA MultiSense pin DC output current in reverse (VCC < 0 V) 20 mA EMAX Maximum switching energy (single pulse) (TDEMAG = 0.4 ms; Tjstart = 150 °C) 36 mJ VESD Electrostatic discharge (JEDEC 22A-114F) – INPUT0,1,2,3 – MultiSense – LED0,1, SEn, SEL0,1,2, FaultRST – OUTPUT0,1,2,3 – VCC 4000 2000 4000 4000 4000 V V V V V VESD Charge device model (CDM-AEC-Q100-011) 750 V VFR ISENSE Tj Tstg 2.2 Parameter Junction operating temperature -40 to 150 Storage temperature -55 to 150 °C Thermal data Table 4. Thermal data Symbol Parameter Typ. value Rthj-board Thermal resistance junction-board (JEDEC JESD 51-5 / 51-8)(1)(2) 51-5)(1)(3) Rthj-amb Thermal resistance junction-ambient (JEDEC JESD Rthj-amb Thermal resistance junction-ambient (JEDEC JESD 51-7)(1)(2) 1. One channel ON. 2. Device mounted on four-layers 2s2p PCB 3. Device mounted on two-layers 2s0p PCB with 2 cm2 heatsink copper trace 10/55 DocID022412 Rev 8 Unit 4.9 52.5 18 °C/W VNQ7040AY-E 2.3 Electrical specification Electrical characteristics 7 V < VCC < 28 V; -40 °C < Tj < 150 °C, unless otherwise specified. All typical values refer to VCC = 13 V; Tj = 25 °C, unless otherwise specified. 2.3.1 General electrical specification Table 5. Power section Symbol Parameter Test conditions Min. Typ. Max. Unit VCC Operating supply voltage VUSD Undervoltage shutdown 4 VUSDReset Undervoltage shutdown reset 5 V VUSDhyst Undervoltage shutdown hysteresis 52 V Vclamp ISTBY Clamp voltage 4 13 0.3 IS = 20 mA; 25 °C < Tj < 150 °C 41 IS = 20 mA; Tj = -40 °C 38 46 V VCC = 13 V; VINx = VOUTx = VFR = VSEn = 0 V; VSEL0,1,2 = 0 V; VLED0,1 = 0 V; Tj = 25 °C 0.5 µA VCC = 13 V; Supply current in standby at VINx = VOUTx = VFR = VSEn = 0 V; VCC = 13 V(1) VSEL0,1,2 = 0 V; VLED0,1 = 0 V; Tj = 85 °C(2) 0.5 µA 3 µA 300 550 µs 10 16 mA 18.5 mA VCC = 13 V; VINx = VOUTx = VFR = VSEn = 0 V; VSEL0,1,2 = 0 V; VLED0,1 = 0 V; Tj = 125 °C; tD_STBY IS(ON) IGND(ON) IL(off) VF 28 VCC = 13 V; V = VOUTx = VFR = 0 V; Standby mode blanking time INx VSEL0,1,2 = 0 V; VLED0,1 = 0 V; VSEn = 5 V to 0 V 60 VCC = 13 V; VSEn = VFR = VSEL0,1 = 0 V; VINx = 5 V; IOUT0,1,2,3 = 0 A; Supply current Control stage current VCC = 13 V; VSEn = 5 V; consumption in ON state. All VFR = VSEL0,1 = 0 V; VINx = 5 V; IOUT0,1,2,3 = 2.5 A channels active. Off-state output current at VCC = 13 V(1) Output - VCC diode voltage(3) VINx = VOUTx = 0 V; VCC = 13 V; Tj = 25 °C 0 VINx = VOUTx = 0 V; VCC = 13 V; Tj = 125 °C 0 IOUT = -2.5 A; Tj = 150 °C 0.01 0.5 µA 3 0.7 V 1. PowerMOS leakage included. DocID022412 Rev 8 11/55 54 Electrical specification VNQ7040AY-E 2. Parameter specified by design; not subject to production test. 3. For each channel. Table 6. Logic Inputs (7 V < VCC < 28 V; -40 °C < Tj < 150 °C) Symbol Parameter Test conditions Min. Typ. Max. Unit 0.9 V INPUT0,1,2,3 characteristics VIL Input low level voltage IIL Low level input current VIH Input high level voltage IIH High level input current VI(hyst) Input hysteresis voltage VICL Input clamp voltage VIN = 0.9 V 1 µA 2.1 V VIN = 2.1 V 10 0.2 IIN = 1 mA µA V 5.3 7.2 V IIN = -1 mA -0.7 FaultRST characteristics VFRL Input low level voltage IFRL Low level input current VFRH Input high level voltage IFRH High level input current VFR(hyst) Input hysteresis voltage VFRCL Input clamp voltage 0.9 VIN = 0.9 V 1 µA 2.1 V VIN = 2.1 V 10 0.2 IIN = 1 mA V µA V 5.3 7.5 V IIN = -1 mA -0.7 SEL0,1,2 characteristics (7 V < VCC < 18 V) VSELL Input low level voltage ISELL Low level input current VSELH Input high level voltage ISELH High level input current VSEL(hyst) Input hysteresis voltage VSELCL Input clamp voltage 0.9 VIN = 0.9 V 1 µA 2.1 V VIN = 2.1 V 10 0.2 IIN = 1 mA V µA V 5.3 7.2 V IIN = -1 mA -0.7 LED0,1 characteristics (7 V < VCC < 18 V) 12/55 VLEDL Input low level voltage ILEDL Low level input current VLEDH Input high level voltage ILEDH High level input current VLED(hyst) Input hysteresis voltage 0.9 VIN = 0.9 V 1 µA 2.1 V VIN = 2.1 V DocID022412 Rev 8 V 10 0.2 µA V VNQ7040AY-E Electrical specification Table 6. Logic Inputs (7 V < VCC < 28 V; -40 °C < Tj < 150 °C) (continued) Symbol VLEDCL Parameter Test conditions Min. IIN = 1 mA Input clamp voltage Typ. Max. 5.3 Unit 7.2 V IIN = -1 mA -0.7 SEn characteristics (7 V < VCC < 18 V) VSEnL Input low level voltage ISEnL Low level input current VSEnH Input high level voltage ISEnH High level input current VSEn(hyst) Input hysteresis voltage VSEnCL Input clamp voltage 0.9 VIN = 0.9 V 1 µA 2.1 V VIN = 2.1 V 10 0.2 IIN = 1 mA V µA V 5.3 7.2 V IIN = -1 mA -0.7 Table 7. Protections (7 V < VCC < 18 V; -40 °C < Tj < 150 °C) Symbol TTSD Parameter Test conditions Shutdown temperature TR Reset temperature(1) TRS Thermal reset of fault diagnostic indication VFR = 0 V; VSEn =5 V Min. Typ. Max. 150 175 200 TRS + 1 TRS + 5 °C 135 THYST Thermal hysteresis (TTSD-TR)(1) 5 ΔTJ_SD Dynamic temperature 60 tLATCH_RST VDEMAG VON VFR = 5 V to 0 V; Fault reset time for output VSEn = 5 V; VINx = 5 V; (1) unlatch VSEL0,1,2 = 0 V Turn-off output voltage clamp Output voltage drop limitation 3 Unit 10 K 20 µs IOUT= 2 A; L = 6 mH; Tj = -40 °C VCC - 38 V IOUT= 2 A; L = 6 mH; Tj = 25 °C to 150 °C VCC - 41 VCC - 46 VCC - 52 V 20 mV IOUT= 0.25 A 1. Parameter guaranteed by design and characterization; not subject to production test. DocID022412 Rev 8 13/55 54 Electrical specification VNQ7040AY-E Table 8. MultiSense (7 V < VCC < 18 V; -40 °C < Tj < 150 °C) Symbol VSENSE_CL Parameter MultiSense clamp voltage Test conditions VSEn = 0 V; ISENSE = 1 mA Min. Typ. -17 VSEn = 0 V; ISENSE = -1 mA Max. Unit -12 V -0.7 V Current Sense characteristics MultiSense disabled: VSEn = 0 V; 0 0.5 -0.5 0.5 MultiSense enabled: VSEn = 5 V All channels ON; IOUTX = 0 A; ChX diagnostic selected; – E.G. Ch0: VIN0 = 5 V; VIN1,2,3 = 5 V; VSEL0,1,2 = 0 V; IOUT0 = 0 A; IOUT1,2,3 = 2.5 A 0 2 MultiSense enabled: VSEn = 5 V ChX OFF; ChX diagnostic selected: – E.G. Ch0: VIN0 = 0 V; VIN1,2,3 = 5 V; VSEL0,1,2 = 0 V; IOUT0 = 0 A; IOUT1,2,3 = 2.5 A 0 MultiSense disabled: -1 V < VSENSE < 5 V(1) ISENSE0 MultiSense leakage current µA 2 VOUT_MSD(1) Output Voltage for MultiSense shutdown VSEn = 5 V; RSENSE = 2.7 kΩ – E.g. Ch0: VIN0 = 5 V; VSEL0,1,2 = 0 V; IOUT0 = 2.5 A VSENSE_SAT Multisense saturation voltage VCC = 7 V; RSENSE = 2.7 K; VSEn = 5 V; VIN0 = 5 V; VSEL0,1,2 = 0 V; IOUT0 = 4.5 A; Tj = 150°C 5 V ISENSE_SAT(1) CS saturation current VCC = 7 V; VSENSE = 4 V; VIN0 = 5 V; VSEn = 5 V; VSEL0,1,2 = 0 V; Tj = 150°C 4 mA IOUT_SAT_BULB(1) Output saturation current in BULB mode VCC = 7 V; VSENSE = 4 V; VIN0 = 5 V; VSEn = 5 V; VSEL0,1,2 = 0 V; Tj = 150°C 8 A IOUT_SAT_LED(1) Output saturation current in LED mode VCC = 7 V; VSENSE = 4 V; VIN0 = 5 V; VSEn = 5 V; VSEL0,1,2 = 0 V; Tj = 150°C 2.3 A 5 V OFF-state diagnostic 14/55 VOL OFF state open load voltage detection threshold VSEn = 5V; ChX OFF; ChX diagnostic selected – E.G: Ch0 VIN0 = 0 V; VSEL0,1,2 = 0 V IL(off2) OFF state output sink current VIN = 0 V; VOUT = VOL; Tj = -40°C to 125°C DocID022412 Rev 8 2 -100 3 4 V -15 µA VNQ7040AY-E Electrical specification Table 8. MultiSense (7 V < VCC < 18 V; -40 °C < Tj < 150 °C) (continued) Symbol Parameter Test conditions Min. Typ. Max. Unit VSEn = 5 V; ChX ON to OFF transition; ChX diagnostic selected – E.G: Ch0 VIN0 = 5 V to 0 V; VSEL0,1,2 = 0 V; VOUT0 > 4 V 100 350 700 µs 60 µs 5 30 µs tDSTKON OFF state diagnostic delay time from falling edge of INPUT (see Figure 35) tD_OL_V Settling time for valid OFF-state open load VINx = 0 V; VFR = 0 V; VSEL0,1,2 = 0 V; diagnostic indication VOUT0 = 4 V; VSEn = 0 V to 5 V from rising edge of SEn tD_VOL OFF state diagnostic delay time from rising edge of VOUT VSEn = 5V; ChX OFF; ChX diagnostic selected – E.G: Ch0 VIN0 = 0 V; VSEL0,1,2 = 0 V; VOUT0 = 0 V to 4 V Chip temperature analog feedback VSENSE_TC MultiSense output voltage proportional to chip temperature VSEn = 5 V; VSEL0 = 0 V; VSEL1 = 0 V; VSEL2 = 5 V; RSENSE = 1 KΩ; VINx = 0 V; Tj = -40°C 2.325 2.41 2.495 V VSEn = 5 V; VSEL0 = 0 V; VSEL1 = 0 V; VSEL2 = 5 V; RSENSE = 1 KΩ; VINx = 0 V; Tj = 25°C 1.985 2.07 2.155 V VSEn = 5 V; VSEL0 = 0 V; VSEL1 = 0 V; VSEL2 = 5 V; RSENSE = 1 KΩ; VINx = 0 V; Tj = 125°C 1.435 1.52 1.605 V dVSENSE_TC/dT(2) Temperature coefficient Tj = -40°C to 150°C Transfer function VSENSE_TC (T) = VSENSE_TC (T0) + dVSENSE_TC/dT * (T-T0) -5.5 mV/K VCC supply voltage analog feedback VSENSE_VCC MultiSense output voltage proportional to VCC supply voltage Transfer function(2) VCC = 13 V; VSEn = 5 V; VSEL0,1,2 = 5 V; VINx = 0 V; RSENSE = 1 KΩ 3.16 3.23 3.3 V 6.6 V 30 mA 60 µs VSENSE_VCC = VCC / 4 Fault diagnostic feedback (see Table 15) VSENSEH MultiSense output voltage in fault condition( ISENSEH MultiSense output V = 13 V; VSENSE = 5 V current in fault condition CC VCC = 13 V; RSENSE = 1 kΩ 5 7 20 MultiSense timings (Chip Temperature Sense mode - see Figure 37) tDSENSE3H VSEn = 0 V to 5 V; VSENSE_TC settling time VSEL0 = VSEL1 = 0 V; VSEL2 = 5 V; from rising edge of SEn RSENSE = 1 kΩ DocID022412 Rev 8 15/55 54 Electrical specification VNQ7040AY-E Table 8. MultiSense (7 V < VCC < 18 V; -40 °C < Tj < 150 °C) (continued) Symbol tDSENSE3L Parameter VSENSE_TC disable delay time from falling edge of SEn Test conditions Min. VSEn = 5 V to 0 V; VSEL0 = VSEL1 = 0 V; VSEL2 = 5 V; RSENSE = 1 kΩ Typ. Max. Unit 20 µs MultiSense timings (VCC Voltage Sense mode - see Figure 37) tDSENSE4H VSENSE_VCC settling VSEn = 0 V to 5 V; time from rising edge of VSEL0 = VSEL1 = VSEL2 = 5 V; RSENSE = 1 kΩ SEn 60 µs tDSENSE4L VSENSE_VCC disable delay time from falling edge of SEn 20 µs VSEn = 5 V to 0 V; VSEL0 = VSEL1 = VSEL2 = 5 V; RSENSE = 1 kΩ MultiSense Timings (Multiplexer transition times)(3) MultiSense transition delay from ChX to ChY VIN2 = 5 V; VIN3 = 5 V; VSEn = 5 V; VSEL0 = 0 V to 5 V; VSEL1 = 5 V; VSEL2 = 0 V; IOUT2 = 0 A; IOUT3 = 2.5 A; RSENSE = 1 kΩ 20 µs tD_CStoTC MultiSense transition delay from current sense to TC sense VIN0 = 5 V; VSEn = 5 V; VSEL0 = 0 V; VSEL1 = VSEL2 = 0 V to 5 V; IOUT0 = 1.25 A; RSENSE = 1 kΩ 60 µs tD_TCtoCS MultiSense transition delay fromTC sense to current sense VIN0 = 5 V; VSEn = 5 V; VSEL0 = 0 V; VSEL1 = VSEL2 = 5 V to 0 V; IOUT0 = 1.25 A; RSENSE = 1 kΩ 20 µs tD_CStoVCC MultiSense transition delay from current sense to VCC sense VIN2 = 5 V; VSEn = 5 V; VSEL0 = 5 V; VSEL1 = 5 V; VSEL2 = 0 V to 5 V; IOUT2 = 1.25 A; RSENSE = 1 kΩ 60 µs tD_VCCtoCS MultiSense transition delay from VCC sense to current sense VIN2 = 5 V; VSEn = 5 V; VSEL1 = 5 V; VSEL0 = VSEL2 = 5 V to 0 V; IOUT2 = 1.25 A; RSENSE = 1 kΩ 20 µs tD_TCtoVCC MultiSense transition delay from TC sense to VCC sense VSEn = 5 V; VSEL1,2 = 5 V; VSEL0 = 0 V to 5 V; RSENSE = 1 kΩ 20 µs tD_VCCtoTC MultiSense transition delay from VCC sense to TC sense VSEn = 5 V; VSEL1,2 = 5 V; VSEL0 = 5 V to 0 V; RSENSE = 1 kΩ 20 µs MultiSense transition delay from stable current sense on ChX to VSENSEH on ChY VIN0 = 5 V; VIN1 = 0 V; VOUT1 > 4 V; VSEn = 5 V; VSEL2 = 0 V; VSEL1 = 0 V; VSEL0 = 0 V to 5 V; IOUT0 = 2.5 A; RSENSE = 1 kΩ 60 µs tD_XtoY tD_CStoVSENSEH 1. Parameter guaranteed by design and characterization; not subject to production test. 2. VCC sensing and TC sensing are referred to GND potential. 3. Transition delay are measured up to +/- 10% of final conditions. 16/55 DocID022412 Rev 8 VNQ7040AY-E 2.3.2 Electrical specification Bulb mode (default) Table 9. Power section in Bulb Mode (7 V < VCC < 28 V; -40 °C < Tj < 150 °C, unless otherwise specified) Symbol Parameter Test conditions Min. IOUT = 2.5 A; Tj = 25°C RON_0,1,2,3_BULB RON_REV_0,1,2,3 On-state resistance in Bulb Mode Ch0, Ch1, Ch2 and Ch3 On-state resistance in Reverse Battery Ch0, Ch1, Ch2 and Ch3 Typ. Max. Unit 40 IOUT = 2.5 A; Tj = 150°C 80 IOUT = 2.5 A; VCC = 4 V; Tj = 25°C 60 VCC = -13V; IOUT = -2.5A; Tj = 25°C DC short circuit current VCC = 13 V ILIMH_0,1,2,3_BULB(1) in Bulb Mode Ch0, 4 V < VCC < 18 V(2) Ch1, Ch2 and Ch3 40 24 mΩ mΩ 34 48 48 A ILIML_0,1,2,3_BULB Short circuit current during thermal cycling in Bulb Mode Ch0, Ch1, Ch2 and Ch3 VCC = 13 V; TR < Tj < TTSD 9 VON_0,1,2,3_BULB Output voltage drop limitation in Bulb Mode Ch0, Ch1, Ch2 and Ch3 IOUT = 0.25 A 20 mV 1. Parameter guaranteed by an indirect test sequence. 2. Parameter guaranteed by design and characterization; not subject to production test. Table 10. Switching in Bulb Mode (VCC = 13 V; -40 °C < Tj < 150 °C, unless otherwise specified) Symbol Parameter Test conditions Min. Typ. Max. Unit Channel 0, 1, 2 and 3 td(on)_0,1,2,3(1) Turn-on delay time at Tj = 25 °C RL = 5.2 Ω td(off)_0,1,2,3(1) Turn-off delay time at Tj = 25 °C RL = 5.2 Ω 10 50 100 (dVOUT/dt)on_0,1,2,3(1) Turn-on voltage slope at Tj = 25 °C RL = 5.2 Ω 0.1 0.5 0.7 (1) Turn-off voltage slope at Tj = 25 °C RL = 5.2 Ω 0.1 0.5 0.7 Switching energy losses at turn-on (twon) RL = 5.2 Ω — 0.2 0.52(2) (dVOUT/dt)off_0,1,2,3 WON_0,1,2,3 DocID022412 Rev 8 10 60 120 µs V/µs mJ 17/55 54 Electrical specification VNQ7040AY-E Table 10. Switching in Bulb Mode (VCC = 13 V; -40 °C < Tj < 150 °C, unless otherwise specified) (continued) Symbol Test conditions Parameter WOFF_0,1,2,3 tSKEW_0,1,2,3(1) Min. Typ. Max. Unit Switching energy losses at turn-off (twoff) RL = 5.2 Ω — 0.2 0.5(2) mJ Differential pulse skew (tPHL - tPLH) RL = 5.2 Ω -65 -15 35 µs 1. See Figure 35: Switching times and Pulse skew. 2. Parameter guaranteed by design and characterization, not subject to production test. Table 11. MultiSense in Bulb Mode (7 V < VCC < 18 V; -40 °C < Tj < 150 °C) Symbol Parameter Test conditions Min. Typ. Max. Unit Current sense characteristics Channel 0, 1, 2 and 3 KOL_CH0,1_B IOUT/ISENSE IOUT = 10 mA; VSENSE = 0.5 V; VSEn = 5 V 430 KOL_CH2,3_B IOUT/ISENSE IOUT = 10 mA; VSENSE = 0.5 V; VSEn = 5 V 430 Current sense ratio drift at calibration point ICAL = 30 mA; IOUT = 10 mA to 50 mA; VSENSE = 0.5 V; VSEn = 5 V -35 KLED_CH0,1_B IOUT/ISENSE IOUT = 0.05 A; VSENSE = 0.5 V; VSEn = 5 V 720 1440 2160 KLED_CH2,3_B IOUT/ISENSE IOUT = 0.05 A; VSENSE = 0.5 V; VSEn = 5 V 720 1440 2160 K0_CH0,1_B IOUT/ISENSE IOUT = 0.25 A; VSENSE = 0.5 V; VSEn = 5 V 930 1550 2170 K0_CH2,3_B IOUT/ISENSE IOUT = 0.25 A; VSENSE = 0.5 V; VSEn = 5 V 930 1550 2170 dK0/K0(1)(2) Current sense ratio drift IOUT = 0.25 A; VSENSE = 0.5 V; VSEn = 5 V -20 K1_CH0,1_B IOUT/ISENSE IOUT = 0.5 A; VSENSE = 4 V; VSEn = 5 V K1_CH2,3_B IOUT/ISENSE IOUT = 0.5 A; VSENSE = 4 V; 1085 1550 2015 VSEn = 5 V dK1/K1(1)(2) Current sense ratio drift IOUT = 0.5 A; VSENSE = 4V; VSEn = 5 V K2_CH0,1_B IOUT/ISENSE IOUT = 2 A; VSENSE = 4 V; VSEn = 5 V 1160 1450 1740 K2_CH2,3_B IOUT/ISENSE IOUT = 2 A; VSENSE = 4 V; VSEn = 5 V 1130 1410 1690 dKcal/Kcal(1)(2) 18/55 DocID022412 Rev 8 35 20 % % 1110 1590 2070 -15 15 % VNQ7040AY-E Electrical specification Table 11. MultiSense in Bulb Mode (7 V < VCC < 18 V; -40 °C < Tj < 150 °C) (continued) Symbol Parameter Test conditions Min. Typ. Max. Unit -10 10 dK2/K2(1)(2) Current sense ratio drift IOUT = 2 A; VSENSE = 4 V; VSEn = 5 V K3_CH0,1_B IOUT/ISENSE IOUT = 6 A; VSENSE = 4 V; VSEn = 5 V 1295 1440 1585 K3_CH2,3_B IOUT/ISENSE IOUT = 6 A; VSENSE = 4 V; VSEn = 5 V 1260 1400 1540 dK3/K3(1)(2) Current sense ratio drift IOUT = 6 A; VSENSE = 4 V; VSEn = 5 V -5 % 5 % 60 µs 5 20 µs 100 250 µs 100 µs 250 µs MultiSense timings (Current Sense mode see Figure 36) Channel 0, 1, 2 and 3 VIN = 5 V; VSEn = 0 V to 5 V; RSENSE = 1 kΩ; RL = 5.2 Ω tDSENSE1H Current sense settling time from rising edge of SEn tDSENSE1L Current sense disable VSEn = 5 V to 0 V; delay time from falling edge RSENSE = 1 kΩ; RL = 5.2 Ω of SEn tDSENSE2H Current sense settling time from rising edge of INPUT VIN = 0 V to 5 V; VSEn = 5 V; RSENSE = 1 kΩ; RL = 5.2 Ω ΔtDSENSE2H Current sense settling time from rising edge of IOUT (dynamic response to a step change of IOUT) VIN = 5 V; VSEn = 5 V; RSENSE = 1 kΩ; RL = 5.2 Ω tDSENSE2L Current sense turn-off VIN = 5 V to 0 V; delay time from falling edge VSEn = 5 V; RSENSE = 1 kΩ; RL = 5.2 Ω of INPUT 50 1. Parameter specified by design; not subject to production test. 2. All values refer to VCC = 13 V; Tj = 25 °C, unless otherwise specified. DocID022412 Rev 8 19/55 54 Electrical specification VNQ7040AY-E Figure 4. Bulb Mode - IOUT/ISENSE versus IOUT ϯϬϬϬ DĂdžͺ,Ϭ͕ϭ DŝŶͺ,Ϭ͕ϭ dLJƉͺ,Ϭ͕ϭ DĂdžͺ,Ϯ͕ϯ DŝŶͺ,Ϯ͕ϯ dLJƉͺ,Ϯ͕ϯ ϮϱϬϬ 9@ ,L+,)5+,6(/+,6(Q+>—$@                               7>ƒ&@           7>ƒ&@ ("1($'5 DocID022412 Rev 8 ("1($'5 21/55 54 Electrical specification VNQ7040AY-E Figure 12. Low level logic input current Figure 13. Logic Input hysteresis voltage 9LK\VW9)5K\VW96(/K\VW96(QK\VW>9@ ,L/,)5/,6(//,6(Q/>—$@                                   7>ƒ&@      7>ƒ&@ ("1($'5 ("1($'5 Figure 14. FaultRST Input clamp voltage Figure 15. Undervoltage shutdown 986'>9@ 9)5&/>9@     ,LQ P$            ,LQ P$                      ("1($'5 Figure 16. On-state resistance vs. Tcase   ("1($'5 Figure 17. On-state resistance vs. VCC 5RQ>P2KP@ 5RQ>P2KP@      7  ƒ&   7  ƒ&  ,RXW $ 9FF 9     7  ƒ&  7  ƒ&                  7>ƒ&@          9FF>9@ ("1($'5 22/55  7>ƒ&@ 7>ƒ&@ DocID022412 Rev 8 ("1($'5 VNQ7040AY-E Electrical specification Figure 18. Turn-on voltage slope Figure 19. Turn-off voltage slope G9RXWGW2II>9—V@ G9RXWGW2Q>9—V@       9FF 9 5O ȍ  9FF 9 5O ȍ                                    7>ƒ&@ 7>ƒ&@ ("1($'5 ("1($'5 Figure 21. Woff vs. Tcase Figure 20. Won vs. Tcase :RQ>P-@ :RII>P-@                                      7>ƒ&@      7>ƒ&@ ("1($'5 Figure 22. ILIMH vs. Tcase ("1($'5 Figure 23. OFF-state open-load voltage detection threshold 92/>9@ ,OLPK>$@        9FF 9                   7>ƒ&@            7>ƒ&@ ("1($'5 DocID022412 Rev 8 ("1($'5 23/55 54 Electrical specification VNQ7040AY-E Figure 24. Vsense clamp vs. Tcase Figure 25. Vsenseh vs. Tcase 96(16(B&/>9@ 96(16(+>9@        ,LQ P$             ,LQ P$                 7>ƒ&@      ("1($'5 2.4.1    7>ƒ&@ ("1($'5 LED Mode (Channel 0 and 1) Table 12. Switching in LED Mode (VCC = 13 V; -40 °C < Tj < 150 °C, unless otherwise specified) Symbol Parameter Test conditions Min. Typ. Max. 65 120 td(on)_0,1_LED(1) Turn-on delay time at Tj = 25 °C RL = 22.8 Ω (1) Turn-off delay time at Tj = 25 °C RL = 22.8 Ω 10 40 100 (dVOUT/dt)on_0,1_LED(1) Turn-on voltage slope at Tj = 25 °C RL = 22.8 Ω 0.2 0.5 0.8 (dVOUT/dt)off_0,1_LED(1) Turn-off voltage slope at Tj = 25 °C RL = 22.8 Ω 0.1 0.5 0.7 WON_0,1_LED Switching energy losses at turn-on (twon) RL = 22.8 Ω — 0.04 0.1(2) mJ WOFF_0,1_LED Switching energy losses at turn-off (twoff) RL = 22.8 Ω — 0.045 0.11(2) mJ Differential Pulse skew (tPHL - tPLH) RL = 22.8 Ω -75 -25 25 µs td(off)_0,1_LED tSKEW_0,1_LED(1) 10 µs V/µs 1. See Figure 35: Switching times and Pulse skew. 2. Parameter guaranteed by design and characterization, not subject to production test. 24/55 Unit DocID022412 Rev 8 VNQ7040AY-E Electrical specification Table 13. Power section in LED Mode (7 V < VCC < 28 V; -40 °C < Tj < 150 °C, unless otherwise specified) Symbol Parameter Test conditions Min. IOUT = 0.57 A; Tj = 25°C RON_0,1_LED On-state resistance in LED Mode Ch0 and Ch1 DC short circuit current ILIMH_0,1_LED(1) in Bulb Mode Ch0 and Ch1 Typ. Max. Unit 140 IOUT = 0.57 A; Tj = 150°C 280 IOUT = 0.57 A; VCC = 5 V; Tj = 25°C 210 VCC = 13 V 5.5 mΩ 8 11 4 V < VCC < 18 V(2) A ILIML_0,1_LED Short circuit current during thermal cycling in Bulb Mode Ch0 and Ch1 VCC = 13 V; TR < Tj < TTSD 2 VON_0,1_LED Output voltage drop limitation in LED Mode Ch0 and Ch1 IOUT = 0.07 A 20 mV 1. Parameter guaranteed by an indirect test sequence. 2. Parameter guaranteed by design and characterization; not subject to production test. Table 14. MultiSense in LED Mode (7 V < VCC < 18 V; -40 °C < Tj < 150 °C) Symbol KOL dKcal/Kcal(1)(2) KLED Parameter Test conditions Min. IOUT = 0.01 A; VSENSE = 0.5 V; VSEn = 5 V 120 I = 17.5 mA; Current sense ratio drift cal IOUT = 10 mA to 25 mA; at calibration point VSENSE = 0.5 V; VSEn = 5 V -30 IOUT/ISENSE IOUT/ISENSE IOUT = 0.025 A; VSENSE = 0.5 V; VSEn = 5 V = 0.025 A; I dKLED/KLED(1)(2) Current sense ratio drift OUT VSENSE = 0.5 V; VSEn = 5 V 150 30 380 -25 K0_CH0,1_L IOUT/ISENSE IOUT = 0.15 A; VSENSE = 4 V; VSEn = 5 V 240 dK0/K0(1)(2) = 0.15 A; VSENSE = 4 V; I Current sense ratio drift OUT VSEn = 5 V -15 K1_CH0,1_L IOUT/ISENSE dK1/K1(1)(2) = 0.7 A; VSENSE = 4 V; I Current sense ratio drift OUT VSEn = 5 V IOUT = 0.7 A; VSENSE = 4 V; VSEn = 5 V Typ. Max. Unit 300 -8 610 25 405 % 570 15 380 % % 460 8 % 60 µs MultiSense timings (Current Sense mode - see Figure 36) tDSENSE1H Current sense settling VIN = 5 V; time from rising edge of VSEn = 0 V to 5 V; RSENSE = 1 kΩ; RL = 22.8 Ω SEn DocID022412 Rev 8 25/55 54 Electrical specification VNQ7040AY-E Table 14. MultiSense in LED Mode (7 V < VCC < 18 V; -40 °C < Tj < 150 °C) (continued) Symbol Parameter tDSENSE1L Current sense disable delay time from falling edge of SEn tDSENSE2H ΔtDSENSE2H tDSENSE2L Test conditions Min. VSEn = 5 V to 0 V; RSENSE = 1 kΩ; RL = 22.8 Ω Typ. Max. Unit 20 µs Current sense settling VIN = 0 V to 5 V; VSEn = 5 V; time from rising edge of RSENSE = 1 kΩ; RL = 22.8 Ω INPUT 250 µs Current sense settling time from rising edge of VIN = 5 V; VSEn = 5 V; IOUT (dynamic RSENSE = 1 kΩ; RL = 22.8 Ω response to a step change of IOUT) 100 µs 250 µs Current sense turn-off delay time from falling edge of INPUT 5 VIN = 5 V to 0 V; VSEn = 5 V; RSENSE = 1 kΩ; RL = 22.8 Ω 50 1. Parameter specified by design; not subject to production test. 2. All values refer to VCC = 13 V; Tj = 25 °C, unless otherwise specified. Figure 26. LED Mode - IOUT/ISENSE versus IOUT ϴϬϬ DĂdžͺ,Ϭ͕ϭ ϳϬϬ DŝŶͺ,Ϭ͕ϭ ϲϬϬ dLJƉͺ,Ϭ͕ϭ P-@ :RQ>P-@                                           7>ƒ&@ 7>ƒ&@ ("1($'5 ("1($'5 Figure 34. ILIMH vs. Tcase ,OLPK>$@   9FF 9              7>ƒ&@ ("1($'5 DocID022412 Rev 8 29/55 54 Electrical specification VNQ7040AY-E Figure 35. Switching times and Pulse skew WZRQ 9287 WZRII 9FF 9FF 21 2)) G9287GW G9287GW 9FF W ,1387 WGRII WGRQ WS/+ WS+/ W ("1($'5 Figure 36. MultiSense timings (current sense mode) ,1 +LJK 6(Q /RZ +LJK 6(/ /RZ +LJK 6(/ /RZ +LJK 6(/ /RZ ,287 &XUUHQW6HQVH W'6(16(+ W'6(16(/ W'6(16(+ W'6(16(/ ("1($'5 30/55 DocID022412 Rev 8 VNQ7040AY-E Electrical specification Figure 37. Multisense timings (chip temperature and VCC sense mode) +LJK 6(Q /RZ +LJK 6(/ /RZ +LJK 6(/ /RZ +LJK 6(/ /RZ 9&& 96(16( 96(16(B9&& 96(16( 96(16(B7& -XOWL6HQVH W'6(16(+ W'6(16(/ 9&&92/7$*(6(16(02'( W'6(16(+ W'6(16(/ &+,37(03(5$785(6(16(02'( *$3*&)7 Figure 38. TDSKON 9,1387 9287 9287!92/ 0XOWL6HQVH 7'67.21 DocID022412 Rev 8 *$3*&)7 31/55 54 Electrical specification 2.5.1 VNQ7040AY-E Truth tables Table 15. Truth table Mode Standby Conditions INX FR All logic inputs low L L L X H L H H H L Nominal load connected; Tj < 150°C Normal Overload Under-voltage OFF-state diagnostics SEn SELX OUTX MultiSense L L Low quiescent current consumption Hi-Z L Refer to Table 16 Overload or short to GND causing: Tj > TTSD or ΔTj > ΔTj_SD L X H L H H VCC < VUSD (falling) X X X Short to VCC L X Open load L X Refer to Table 16 L X Negative Inductive loads output voltage turn off L Comments Refer to Table 16 H H Refer to Table 16 Outputs configured for auto-restart Outputs configured for Latch-off Refer to Table 16 Output cycles with temperature hysteresis L X Refer to Table 16 Output latches-off Re-start when VCC > VUSD + VUSDhyst (rising) L L Hi-Z Hi-Z H Refer to Table 16 H < 0V External pull-up Refer to Table 16 Table 16. MultiSense multiplexer addressing MultiSense output SEn SEL2 SEL1 SEL0 32/55 MUX channel Normal mode Overload OFF-state diag.(1) Negative output L X X X Hi-Z H L L L Channel 0 diagnostic ISENSE = 1/K * IOUT0 VSENSE = VSENSEH VSENSE = VSENSEH Hi-Z H L L H Channel 1 diagnostic ISENSE = 1/K * IOUT1 VSENSE = VSENSEH VSENSE = VSENSEH Hi-Z H L H L Channel 2 diagnostic ISENSE = 1/K * IOUT2 VSENSE = VSENSEH VSENSE = VSENSEH Hi-Z H L H H Channel 3 diagnostic ISENSE = 1/K * IOUT3 VSENSE = VSENSEH VSENSE = VSENSEH Hi-Z H H L L TCHIP Sense VSENSE = VSENSE_TC H H L H VCC Sense VSENSE = VSENSE_VCC DocID022412 Rev 8 VNQ7040AY-E Electrical specification Table 16. MultiSense multiplexer addressing (continued) MultiSense output MUX channel SEn SEL2 SEL1 SEL0 Normal mode Overload OFF-state diag.(1) H H H L TCHIP Sense VSENSE = VSENSE_TC H H H H VCC Sense VSENSE = VSENSE_VCC Negative output 1. In case the output channel corresponding to the selected MUX channel is latched off while the relevant input is low, Multisense pin delivers feedback according to OFF-State diagnostic. Example 1: FR = 1; IN0 = 0; OUT0 = L (latched); MUX channel = channel 0 diagnostic; Mutisense = 0 Example 2: FR = 1; IN0 = 0; OUT0 = latched, VOUT0 > VOL; MUX channel = channel 0 diagnostic; Mutisense = VSENSEH Table 17. Bulb/LED Mode Configuration Configuration LED1 LED0 Channel 1 Channel 0 L L Bulb Bulb L H Bulb LED H L LED Bulb H H LED LED DocID022412 Rev 8 33/55 54 Electrical specification 2.5.2 VNQ7040AY-E Immunity to electrical transient disturbances on VCC (ISO 7637-2) Table 18. Electrical transient requirements (part 1/3) ISO 7637-2: 2004(E) test pulse Test levels (1) III IV 1 -75V -100V 2a +37V 3a Number of pulses or test times Burst cycle / pulse repetition time Delays and Impedance Min. Max. 5000 pulses 0.5s 5s 2 ms, 10Ω +50V 5000 pulses 0.2s 5s 50µs, 2Ω -100V -150V 1h 90ms 100ms 0.1µs, 50Ω 3b +75V +100V 1h 90ms 100ms 0.1µs, 50Ω 4 -6V -7V 1 pulse 100ms, 0.01Ω 5b(2) +65V +87V 1 pulse 400ms, 2Ω 1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b. 2. Valid in case of external load dump clamp: 40V maximum referred to ground. Table 19. Electrical transient requirements (part 2/3) ISO 7637-2: 2004E test pulse III VI 1 C C 2a C C 3a C C 3b C C 4 C C 5b(1) C C Test level results 1. Valid in case of external load dump clamp: 40V maximum referred to ground. Table 20. Electrical transient requirements (part 3/3) Class 34/55 Contents C All functions of the device performed as designed after exposure to disturbance. E One or more functions of the device did not perform as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. DocID022412 Rev 8 VNQ7040AY-E 3 Protections 3.1 Power limitation Protections The basic working principle of this protection consists of an indirect measurement of the junction temperature swing ΔTj through the direct measurement of the spatial temperature gradient on the device surface in order to automatically shut off the output MOSFET as soon as ΔTj exceeds the safety level of ΔTj_SD. According to the voltage level on the FaultRST pin, the output MOSFET switches on and cycles with a thermal hysteresis according to the maximum instantaneous power which can be handled (FaultRST = Low) or remains off (FaultRST = High). The protection prevents fast thermal transient effects and, consequently, reduces thermo-mechanical fatigue. 3.2 Thermal shutdown In case the junction temperature of the device exceeds the maximum allowed threshold (typically 175°C), it automatically switches off and the diagnostic indication is triggered. According to the voltage level on the FaultRST pin, the device switches on again as soon as its junction temperature drops to TR (see Table 7, FaultRST = Low) or remains off (FaultRST = High). 3.3 Current limitation The device is equipped with an output current limiter in order to protect the silicon as well as the other components of the system (e.g. bonding wires, wiring harness, connectors, loads, etc.) from excessive current flow. Consequently, in case of short circuit, overload or during load power-up, the output current is clamped to a safety level, ILIMH, by operating the output power MOSFET in the active region. 3.4 Negative voltage clamp In case the device drives inductive load, the output voltage reaches negative value during turn off. A negative voltage clamp structure limits the maximum negative voltage to a certain value, VDEMAG (see Table 7), allowing the inductor energy to be dissipated without damaging the device. DocID022412 Rev 8 35/55 54 Application information 4 VNQ7040AY-E Application information Figure 39. Application diagram 9 9'' 287 9&& )5 287 5SURW ,1387 5SURW 287 /RJLF 'OG 6(Q 5SURW 287 6(/ 287 5SURW &6 $'&LQ &XUUHQWPLUURU 5SURW *1' &H[W 5VHQVH 287 *1' ("1($'5 4.1 Protection against reverse battery Figure 40. Simplified internal structure 9FF 9 5SURW 5SURW ,1387 6(Q 0&8 'OG 5SURW )DXOW567 287387 5SURW 0XOWLVHQVH *1' 5VHQVH *1' ("1($'5 36/55 DocID022412 Rev 8 VNQ7040AY-E Application information The device does not need any external components to protect the internal logic in case of a reverse battery condition. The protection is provided by internal structures. In addition, due to the fact that the output MOSFET turns on even in reverse battery mode, thus providing the same low ohmic path as in regular operating conditions, no additional power dissipation has to be considered. 4.2 Immunity against transient electrical disturbances The immunity of the device against transient electrical emissions, conducted along the supply lines and injected into the VCC pin, is tested in accordance with ISO7637-2:2011 (E) and ISO 16750-2:2010. The related function performance status classification is shown in Table 21. Test pulses are applied directly to DUT (Device Under Test) both in ON and OFF-state and in accordance to ISO 7637-2:2011(E), chapter 4. The DUT is intended as the present device only, without components and accessed through VCC and GND terminals. Status II is defined in ISO 7637-1 Function Performance Status Classification (FPSC) as follows: “The function does not perform as designed during the test but returns automatically to normal operation after the test”. Table 21. ISO 7637-2 - electrical transient conduction along supply line Test Pulse 2011(E) Test pulse severity level with Status II functional performance status Minimum number of pulses or test time Burst cycle / pulse repetition time Pulse duration and pulse generator internal impedance Level US(1) 1 III -112V 500 pulses 0,5 s 2a III +55V 500 pulses 0,2 s 5s 50μs, 2Ω 3a IV -220V 1h 90 ms 100 ms 0.1μs, 50Ω 3b IV +150V 1h 90 ms 100 ms 0.1μs, 50Ω 4(2) IV -7V 1 pulse min max 2ms, 10Ω 100ms, 0.01Ω Load dump according to ISO 16750-2:2010 Test B(3) 40V 5 pulse 1 min 400ms, 2Ω 1. US is the peak amplitude as defined for each test pulse in ISO 7637-2:2011(E), chapter 5.6. 2. Test pulse from ISO 7637-2:2004(E). 3. With 40 V external suppressor referred to ground (-40°C < Tj < 150°C). 4.3 MCU I/Os protection If a ground protection network is used and negative transients are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line both to prevent the microcontroller I/O pins from latching-up and to protect the HSD inputs. DocID022412 Rev 8 37/55 54 Application information VNQ7040AY-E The value of these resistors is a compromise between the leakage current of microcontroller and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of microcontroller I/Os. Equation 1 VCCpeak/Ilatchup ≤ Rprot ≤ (VOHμC-VIH-VGND) / IIHmax Calculation example: For VCCpeak = -150 V; Ilatchup ≥ 20mA; VOHμC ≥ 4.5V 7.5 kΩ ≤ Rprot ≤ 140 kΩ. Recommended values: Rprot = 15 kΩ 4.4 Multisense - analog current sense Diagnostic information on device and load status are provided by an analog output pin (Multisense) delivering the following signals: • Current monitor: current mirror of channel output current • VCC monitor: voltage propotional to VCC • TCASE: voltage propotional to chip temperature Those signals are routed through an analog multiplexer which is configured and controlled by means of SELx and SEn pins, according to the address map in Table 16. 38/55 DocID022412 Rev 8 VNQ7040AY-E Application information 9&& Figure 41. Multisense and diagnostic – block diagram 5HYHUVH %DWWHU\ ,QWHUQDO6XSSO\ 9&&±*1' &ODPS 8QGHUYROWDJH VKXWGRZQ &RQWURO 'LDJQRVWLF 9&&±287 &ODPS )DXOW567 ,1387 *DWH'ULYHU 9&& 7 6(/ 6(/ 921 /LPLWDWLRQ 9&& 6(Q &XUUHQW /LPLWDWLRQ 021,725 0XOWL6HQVH 08; ,6(16( 53527 7(03 3RZHU/LPLWDWLRQ 2YHUWHPSHUDWXUH )DXOW 'LDJQRVWLF 7HPS 021,725 6KRUWWR9&& 2SHQ/RDGLQ2)) 7RX&$'& .IDFWRU 56(16( &XUUHQW 6HQVH &855(17 021,725 )DXOW ,287 287 96(16(+ *1' ("1($'5 DocID022412 Rev 8 39/55 54 Application information 4.4.1 VNQ7040AY-E Principle of Multisense signal generation Figure 42. Multisense block diagram 9FF ).054 6HQVH026 0DLQ026 287 &XUUHQWVHQVH 9EDW0RQLWRU 7HPSHUDWXUHPRQLWRU 0XOWLVHQVH6ZLWFK%ORFN )DXOW 08/7,6(16( 7RX&$'& 53527 56(16( *$3*&)7 Current monitor When current mode is selected in the Multisense, this output is capable to provide: • Current mirror proportional to the load current in normal operation, delivering current proportional to the load according to known ratio named K • Diagnostics flag in fault conditions delivering fixed voltage VSENSEH The current delivered by the current sense circuit, ISENSE, can be easily converted to a voltage VSENSE by using an external sense resistor, RSENSE, allowing continuous load monitoring and abnormal condition detection. Normal operation (channel ON, no fault, SEn active) While device is operating in normal conditions (no fault intervention), VSENSE calculation can be done using simple equations Current provided by Multisense output: ISENSE = IOUT/K 40/55 DocID022412 Rev 8 VNQ7040AY-E Application information Voltage on RSENSE: VSENSE = RSENSE . ISENSE = RSENSE . IOUT/K Where : • VSENSE is voltage measurable on RSENSE resistor • ISENSE is current provided from Multisense pin in current output mode • IOUT is current flowing through output • K factor represent the ratio between PowerMOS cells and SenseMOS cells; its spread includes geometric factor spread, current sense amplifier offset and process parameters spread of overall circuitry specifying ratio between IOUT and ISENSE. Failure flag indication In case of power limitation/overtemperature, the fault is indicated by the Multisense pin which is switched to a “current limited” voltage source, VSENSEH (see Table 8). In any case, the current sourced by the Multisense in this condition is limited to ISENSEH (see Table 8). Figure 43. Analogue HSD – open-load detection in off-state 9 9EDW 9EDW Q)9 Q) N *1' 0LFURFRQWUROOHU *1' 9&& 9'' )5 287 N ,1387 ([WHUQDO 3XOO8S VZLWFK 287 /RJLF N 6(Q 287 6(/ N 287 287387 &6 287 &XUUHQWPLUURU N *1' $'&LQ N 5VHQVH Q)9 287 N *1' *1' Q) *1' *1' *1' *1' ("1($'5 DocID022412 Rev 8 41/55 54 Application information VNQ7040AY-E Figure 44. Open-load / short to VCC condition 9,1 96(16( 3XOOXSFRQQHFWHG 96(16(+ 2SHQORDG 96(16(  96(16( 3XOOXS GLVFRQQHFWHG W'67.21 6KRUWWR9&& 96(16(+ *$3*&)7 Table 22. MultiSense pin levels in off-state Condition Output VOUT > VOL Open-load VOUT < VOL 4.4.2 Short to VCC VOUT > VOL Nominal VOUT < VOL MultiSense SEn Hi-Z L VSENSEH H Hi-Z L 0 H Hi-Z L VSENSEH H Hi-Z L 0 H TCASE and VCC monitor In this case, MultiSense output operates in voltage mode and output level is referred to device GND. Care must be taken in case a GND network protection is used, because of a voltage shift is generated between device GND and the microcontroller input GND reference. Figure 45 shows link between VMEASURED and real VSENSE signal. 42/55 DocID022412 Rev 8 VNQ7040AY-E Application information Figure 45. GND voltage shift 9%$7 Q)9 0XOWLVHQVHYROWDJHPRGH 96(16(+ 9&&PRQLWRU 7&$6(PRQLWRU )DXOW567 9&& ,1 6(Q 287 6(/ 6(/ 53527 90($685(' 56(16( 93527 96(16( 0XOWLVHQVH 7RX&$'& 53527 N *1' '*1' '!0'#&4 VCC monitor Battery monitoring channel provides VSENSE = VCC / 4. Case temperature monitor Case temperature monitor is capable to provide information about actual device temperature. Since diode is used for temperature sensing, following equation describe link between temperature and output VSENSE level: VSENSE_TC (T) = VSENSE_TC (T0) + dVSENSE_TC / dT * (T - T0) where dVSENSE_TC / dT ~ typically -5.5 mV/K (for temperature range (-40oC to +150oC). 4.4.3 Short to VCC and OFF-state open-load detection Short to VCC A short circuit between VCC and output is indicated by the relevant current sense pin set to VSENSEH during the device off-state. Small or no current is delivered by the current sense during the on-state depending on the nature of the short circuit. OFF-state open-load with external circuitry Detection of an open-load in off mode requires an external pull-up resistor RPU connecting the output to a positive supply voltage VPU. It is preferable VPU to be switched off during the module standby mode in order to avoid the overall standby current consumption to increase in normal conditions, i.e. when load is connected. RPU must be selected in order to ensure VOUT > VOLmax in accordance with to following equation: DocID022412 Rev 8 43/55 54 Application information VNQ7040AY-E Equation 2 R 4.5 PU V –4 PU < -----------------------------------------------I L ( off2 )min @ 4V Maximum demagnetization energy (VCC = 16 V) Figure 46. Maximum turn off current versus inductance 914$