U842B-FP

U842B Wiper Control for Intermittent and Wipe/ Wash Mode Description The U842B circuit is designed as an interval and wipe/ wash timer for automotive wiper control. The interval pause can be set in a range from 3 s to 11 s by an external 1-kW potentiometer. Wipe/wash mode has priority over the interval mode. The U842B controls the wiper motor with/without park switch signal. The integrated relay driver is protected against short circuits and is switched to conductive condition in the case of a load-dump. With only a few external components, protection against RF interference and transients (ISO/TR 7637-1/3) can be achieved. Features D Interval input: low side D Wipe/ wash input: low side D Park input: high side (park position) D Output driver protected against short circuit D All time periods determined by RC oscillator D Fixed relay activation time of 500 ms D Adjustable interval pause from 3 s to 11 s D Fixed pre-wash delay of 400 ms D Dry wiping – With park switch signal: 3 cycles – Without park switch signal: 2.8 s D Inputs INT, WASH and PARK digitally debounced D All inputs with integrated RF protection D Load-dump protection and interference protection according to ISO 7637-1/3 (DIN 40839) Application Digital/ wipe-wash control for rear or front wiper Ordring Information Extended Type Number U842B U842B–FP Package DIP8 SO8 Remarks Pin Description Pin 1 2 3 4 5 6 7 8 Symbol INT WASH PARK PAUS OSC VS GND OUT Function Interval input Wipe/ wash input Park switch input Pause time adjust Oscillator input Supply voltage Ground Relay output INT 1 8 OUT WASH PARK PAUS 2 7 GND U842B 3 6 Vs OSC 13300 4 5 Figure 1. Pinning TELEFUNKEN Semiconductors Rev. A2, 03-Feb-97 1 (12) U842B Block Diagram VS 6 GND 7 21 V 1/2 VS Stabilization POR Load–dump – detection 28 V 8 OUT INT 1 + – 250 mV + – 25 pF 21 V WASH 2 + – Logic 0.5 Ω 25 pF 21 V PARK 3 + – VS + – 25 pF 4 PAUS Figure 2. Block diagram 21 V 5 OSC 13287 Oscillator 25 pF 21 V OUT Upper switching point 21 V Basic Circuit Power Supply For reasons of interference protection and surge immunity, a RC circuitry has to be provided to limit the current, and to supply the integrated circuit in the case of supply voltage drops. Suggested values: R1 = 180 W, C1 = 47 mF, (see figure 2) The supply (Pin 6) is clamped with a 21-V Zener diode. The operation voltage ranges between VBatt = 9 V to 16 V. The capacitor, C1, can be dimensioned smaller (typically: 10 mF) if a diode is used in the supply against polarity reversal. In this case of negative interference pulses, there, is only a small discharge current of the circuit. Oscillator All timing sequences in the circuit are derived from an RC oscillator which is charged by an external resistor, R9, and discharged by an integrated 2-k W resistor. The basic frequency, f0, is determined by the capacitor, C2, and an integrated voltage divider. The basic frequency is adjusted to 320 Hz ( 3.125 ms ) by C2 = 100 nF and R9 = 220 kW. The tolerances and the temperature coefficients of the external components determine the precision of the oscillator frequency. A 1% metallic-film resistor and a 5% capacitor are recommended.. The debouncing times of the inputs, the turn-on time of the relay (t5), the pre-wash delay (t1), the dry wiping time (t2) and the debouncing time (t7, short circuit detection) depend on the oscillator frequency (f0) as follows: 2 (12) TELEFUNKEN Semiconductors Rev. A2, 03-Feb-97 U842B VBatt R1 180 Ω R9 220 kΩ C1 47 µF 8 7 6 5 C2 100 nF U842B 1 R4 10 kΩ Switch INT Button WASH PARK Figure 3. Basic cicuitry 2 3 R6 10 kΩ R5 47 kΩ R11 360 Ω VR1 1 kΩ 4 R7 1.5 kΩ 13288 Variable Debouncing Times Debouncing is basically done by counting oscillator clocks starting with the occurance of any input signal. Caused by the asynchronism of input signal and IC-clock, the debouncing time may vary in a certain range. Figure 4 shows the short circuit debouncing as an example: During the relay activation, a comparator monitors the output current at each positive edge of the clock to load a 3-stage shift register in the case of a detected short circuit condition i.e., I > 500 mA. With the third edge, the output stage is disabled. Dependent on the short circuit occurence the delay time may range from 2 to 3 clock cycles. The timing can be adjusted by variation of the external frequency-determining components ( R/C). The potentiometer at Pin 4 determines the interval pause, which can be varied by adjusting the upper charging threshold of the oscillator. For all other time periods, an internal voltage divider determines the upper charging threshold of the oscillator (see figure 2). Timing Fixed: Relay activation time Dry wiping Interval pause Switch-on delay INT Variable: Debouncing time INT Debouncing time WASH 1. pre-wash delay 2. reverse debouncing Debouncing time PARK Debouncing time SC t5 t2 = = 160 1/f0 896 1/f0 or 3 cycles 872 1/f0 8 1/f0 24 to 32 1/f0 112 to 128 1/f0 16 to 32 1/f0 6 to 8 1/f0 2 to 3 1/f0 t6 = t4D = t4 = t1 = t1.R = t8 = t7 = TELEFUNKEN Semiconductors Rev. A2, 03-Feb-97 3 (12) U842B Wipe/ Wash Operation CL 0 ON 1 2 3 OUT OFF SC IC>500mA Relay Output The relay output is an open collector Darlington transistor with an integrated 28-V Z-diode for limitation of the inductive cut-out pulse of the relay coil. The maximum static collector current must not exceed 300 mA and the saturation voltage is typically 1.2 V for a current of 200 mA. The collector current is permanently measured by an integrated shunt, and in the case of a short circuit (IC > 500 mA) to Vbat, the relay output is stored disabled. The short circuit buffer is reset by opening the INT and WASH switches. As long as the short condition exists a further activation of these switches will disable the output stage again. Otherwise the normal wipe operation is performed. In order to avoid short-term disabling caused by current pulses of transients, a 10 ms debounce period (t7) is provided (see figure 4). During a load-dump pulse, the output transistor is switched to conductive condition to prevent destruction. The short circuit detection is suppressed during the loaddump. Interference Voltages and Load-dump The IC supply is protected by R1, C1 and an integrated 21-V Z-diode. The inputs are protected by a series resistor, integrated 21-V Z-diode and RF capacitor. The RC-configuration stabilizes the supply of the circuit during negative interference voltages to avoid power-on reset ( POR). 4 (12) ÉÉÉÉÉ ÉÉÉÉÉ t7 13301 Figure 4. The debouncing of the short circuit detection The relay output is protected against short interference peaks by an integrated 28-V Z-diode. During load-dump, the relay output is switched to conductive condition if the battery voltage exceeds approximately 30 V. The output transistor is dimensioned so that it can absorb the current produced by the load-dump pulse. Power-on Reset When the operating voltage is switched on, an internal power-on reset pulse ( POR) is generated which sets the logic of the circuits to defined initial condition. The relay output is disabled, the short circuit buffer is reset. Functional Description Interval Function The circuit is brought to its interval mode with the input switch INT operated for more than 625 ms ( t > t4 + t4D +t5 ). This time includes: – 100 ms debounce time t4 – 25 ms INT switch-on delay t4D – 500 ms relay activation time t5 If the INT input is toggled for 125 ms < t < 625 ms, the relay activation time t5 lapses anyway and the wiper performs one turn. To enable correct interval functioning, the INT input has to be activated afterwards as described. The beginning of the interval pause depends on the application with or without wiper motor park switch ( see figures 5, 6, 7 and 8 ). TELEFUNKEN Semiconductors Rev. A2, 03-Feb-97 U842B Interval Function with Park-Switch Feedback During the relay activation time the wiper motor leaves its park position and the park switch changes its potential from VBatt to GND. After the relay is switched off the wiper motor is supplied via the park switch until the park position is reached again. The park switch changes its potential from GND back to VBatt. With the park switch connected to the park input (Pin 3) the interval pause t6 starts after the 25 ms debounce time (t7) is over (see figures 5 and 6). Wiper motor Wash pump M R2 1.5 kΩ R3 1.5 kΩ R4 INT 10 kΩ R5 47 kΩ R6 10 kΩ R11 360 Ω 1 2 8 R1 180 Ω Park M Run WASH SETINT VR1 1 kΩ 7 U842B 3 6 5 R9 220 kΩ 4 R7 1.5 kΩ C1 47 µF C2 100 nF 13289 Figure 5. Application circuit with park switch feedback INT VBatt 0V t4 t 4D OUT VBatt 0V t5 t6 t 4D PARK VBatt 0V t8 ON MOTOR OFF 13302 Figure 6. Intermittent circuit function with park position feedback TELEFUNKEN Semiconductors Rev. A2, 03-Feb-97 5 (12) U842B Interval Function without Park-Switch Feedback If the park input of the circuit is not connected with the park switch of the wiper motor (see figure 7), the interval pause starts directly after the turn-on time of the relay is over (see figure 8). Wiper motor Wash pump M R2 1.5 kΩ R3 1.5 kΩ R4 INT 10 kΩ R5 47 kΩ 1 8 R1 180 Ω Park M Run WASH SETINT VR1 1 kΩ 2 7 U842B 3 6 R9 220 kΩ R11 5.1 kΩ 4 R7 20 kΩ 5 C1 47 µF C2 100 nF 13290 Figure 7. Application circuit without park position feedback V INT Batt 0V t4 t 4D V Batt 0V t5 OUT t6 t 4D V PARK Batt 0V ON MOTOR OFF 13303 Figure 8. Intermittent circuit function without park position feedback 6 (12) TELEFUNKEN Semiconductors Rev. A2, 03-Feb-97 U842B WASH V Batt 0V