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SIHG47N60E-GE3

SIHG47N60E-GE3

  • 厂商:

    TFUNK(威世)

  • 封装:

    TO247

  • 描述:

    MOSFET N-CH 600V 47A TO247AC

  • 数据手册
  • 价格&库存
SIHG47N60E-GE3 数据手册
SiHG47N60E www.vishay.com Vishay Siliconix E Series Power MOSFET FEATURES D TO-247AC • Low figure-of-merit (FOM) Ron x Qg • Low input capacitance (Ciss) • Reduced switching and conduction losses G • Ultra low gate charge (Qg) D • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 G S N-Channel MOSFET APPLICATIONS • Switch mode power supplies (SMPS) PRODUCT SUMMARY • Power factor correction power supplies (PFC) VDS (V) at TJ max. 650 RDS(on) max. (Ω) at 25 °C Available • Avalanche energy rated (UIS) S VGS = 10 V Qg max. (nC) • Lighting 0.064 - High-intensity discharge (HID) - Fluorescent ballast lighting 220 Qgs (nC) 29 Qgd (nC) 57 Configuration • Industrial - Welding - Induction heating - Motor drives - Battery chargers - Renewable energy - Solar (PV inverters) Single ORDERING INFORMATION Package TO-247AC Lead (Pb)-free SiHG47N60E-E3 Lead (Pb)-free and halogen-free SiHG47N60E-GE3 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-source voltage VDS 600 Gate-source voltage VGS ± 30 Continuous drain current (TJ = 150 °C) VGS at 10 V TC = 25 °C TC = 100 °C Pulsed drain current a ID IDM Linear derating factor Single pulse avalanche energy b Maximum power dissipation Operating junction and storage temperature range Drain-source voltage slope VDS = 0 V to 80 % VDS Reverse diode dV/dt d Soldering recommendations (peak temperature) c for 10 s UNIT V 47 30 A 145 3 W/°C EAS 1800 mJ PD 357 W TJ, Tstg -55 to +150 °C dV/dt 70 11 300 V/ns °C Notes a. Repetitive rating; pulse width limited by maximum junction temperature b. VDD = 50 V, starting TJ = 25 °C, L = 73.5 mH, Rg = 25 Ω, IAS = 7 A c. 1.6 mm from case d. ISD ≤ ID, dI/dt = 100 A/μs, starting TJ = 25 °C S17-1097-Rev. N, 24-Jul-17 Document Number: 91474 1 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHG47N60E www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum junction-to-ambient RthJA - 40 Maximum junction-to-case (drain) RthJC - 0.33 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-source breakdown voltage VDS temperature coefficient Gate-source threshold voltage (N) VDS VGS = 0 V, ID = 250 μA 600 - - V ΔVDS/TJ Reference to 25 °C, ID = 250 μA - 0.66 - V/°C VGS(th) VDS = VGS, ID = 250 μA 2 - 4 V VGS = ± 20 V - - ± 100 nA VGS = ± 30 V - - ±1 μA VDS = 600 V, VGS = 0 V - - 1 VDS = 480 V, VGS = 0 V, TJ = 125 °C - - 10 Gate-source leakage IGSS Zero gate voltage drain current IDSS μA - 0.053 0.064 Ω gfs VDS = 8 V, ID = 3 A - 6.8 - S Input capacitance Ciss 4810 9620 Coss 115 230 460 Reverse transfer capacitance Crss VGS = 0 V, VDS = 100 V, f = 1 MHz 2405 Output capacitance 1.7 5 10 Effective output capacitance, energy related a Co(er) - 170 - Effective output capacitance, time related b Co(tr) - 604 - Drain-source on-state resistance Forward transconductance RDS(on) VGS = 10 V ID = 24 A Dynamic pF VDS = 0 V to 480 V, VGS = 0 V Total gate charge Qg Gate-source charge Qgs VGS = 10 V ID = 24 A, VDS = 480 V 74 148 220 14.5 29 58 86 Gate-drain charge Qgd 28.5 57 Turn-on delay time td(on) 14 28 56 Rise time Turn-off delay time tr td(off) Fall time tf Gate input resistance Rg VDD = 480 V, ID = 24 A, VGS = 10 V, Rg = 4.4 Ω 36 72 108 47 93 140 41 82 123 f = 1 MHz, open drain 0.13 0.65 1.3 - - 47 - - 140 nC ns Ω Drain-Source Body Diode Characteristics Continuous source-drain diode current IS Pulsed diode forward current ISM Diode forward voltage VSD Body diode reverse recovery time trr Body diode reverse recovery charge Qrr Reverse recovery current IRRM Body diode reverse recovery time trr Body diode reverse recovery charge Qrr Reverse recovery current IRRM MOSFET symbol showing the integral reverse p - n junction diode D A G S TJ = 25 °C, IS = 24 A, VGS = 0 V TJ = 25 °C, IF = IS = 24 A, dI/dt = 100 A/μs, VR = 25 V TJ = 25 °C, IF = IS = 24 A, dI/dt = 100 A/μs, VR = 400 V - - 1.2 V - 582 1164 ns - 11 22 μC - 31 62 A - 550 1164 ns - 10.7 22 μC - 38 62 A Notes a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS S17-1097-Rev. N, 24-Jul-17 Document Number: 91474 2 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHG47N60E www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 180 RDS(on), Drain-to-Source On-Resistance (Normalized) 3.0 140 Top 15 V 14 V 13 V 12 V 11 V 10 V 9.0 V 8.0 V 7.0 V 6.0 V Bottom 5.0 V 120 100 80 60 40 20 5.0 V TJ = 25 °C 0 0 5 10 15 20 V DS , Drain-to-Source Voltage (V) 25 2.5 2.0 1.5 1.0 0.5 0.0 - 60 - 40 - 20 30 Fig. 1 - Typical Output Characteristics, TC = 25 °C V GS = 10 V 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 4 - Normalized On-Resistance vs. Temperature 100 000 120 Top 15 V 14 V 13 V 12 V 11 V 10 V 9.0 V 8.0 V 7.0 V 6.0 V Bottom 5.0 V 100 80 60 10 000 C, Capacitance (pF) ID, Drain-to-Source Current (A) I D = 24 A 40 VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd Ciss 1000 Coss 100 Crss 10 20 TJ = 150 °C 0 0 5 10 15 20 25 VDS, Drain-to-Source Voltage (V) 1 30 Fig. 2 - Typical Output Characteristics, TC = 150 °C 0 100 200 300 400 V DS, Drain-to-Source Voltage (V) 500 600 Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage 35 180 5000 30 140 25 120 Coss (pF) ID, Drain-to-Source Current (A) 160 100 80 20 Eoss Coss 500 15 Eoss (μJ) I D , Drain-to-Source Current (A) 160 TJ= 150 °C 60 10 40 5 20 T J= 25 °C 0 0 5 10 15 20 VGS, Gate-to-Source Voltage (V) Fig. 3 - Typical Transfer Characteristics S17-1097-Rev. N, 24-Jul-17 50 25 0 0 100 200 300 400 500 600 VDS Fig. 6 - Coss and Eoss vs. VDS Document Number: 91474 3 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHG47N60E www.vishay.com Vishay Siliconix 50 V DS = 480 V V DS = 300 V V DS = 120 V 20 45 40 ID, Drain Current (A) VGS, Gate-to-Source Voltage (V) 24 16 12 8 35 30 25 20 15 10 4 5 0 25 0 0 50 100 150 200 250 Qg, Total Gate Charge (nC) 300 Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage 75 100 125 TC, Case Temperature (°C) 150 Fig. 10 - Maximum Drain Current vs. Case Temperature 725 VDS, Drain-to-Source Breakdown Voltage (V) 1000 ISD, Reverse Drain Current (A) 50 100 TJ = 150 °C TJ = 25 °C 10 1 V GS = 0 V 0.1 0.2 0.4 0.6 0.8 1 1.2 VSD, Source-Drain Voltage (V) 1.4 Fig. 8 - Typical Source-Drain Diode Forward Voltage 700 675 650 625 600 575 550 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 11 - Temperature vs. Drain-to-Source Voltage 1000 Operation in this Area Limited by RDS(on) IDM Limited ID, Drain Current (A) 100 10 0.1 μs 1 μs 10 μs 100 μs Limited by RDS(on)* 1 ms 1 TC = 25 °C TJ = 150 °C Single Pulse 0.1 1 10 ms BVDSS Limited 10 100 VDS, Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified 1000 Fig. 9 - Maximum Safe Operating Area S17-1097-Rev. N, 24-Jul-17 Document Number: 91474 4 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHG47N60E www.vishay.com Vishay Siliconix 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 0.0001 0.001 0.01 0.1 1 Pulse Time (s) Fig. 12 - Normalized Thermal Transient Impedance, Junction-to-Case VGS VDS RD VDS tp VDD D.U.T. RG + - VDD VDS 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % IAS Fig. 16 - Unclamped Inductive Waveforms Fig. 13 - Switching Time Test Circuit VDS QG 10 V 90 % QGS QGD VG 10 % VGS td(on) td(off) tf tr Charge Fig. 17 - Basic Gate Charge Waveform Fig. 14 - Switching Time Waveforms Current regulator Same type as D.U.T. L Vary tp to obtain required IAS VDS 50 kΩ D.U.T RG 12 V + - IAS 0.2 µF 0.3 µF V DD + D.U.T. - VDS 10 V tp 0.01 Ω VGS 3 mA Fig. 15 - Unclamped Inductive Test Circuit IG ID Current sampling resistors Fig. 18 - Gate Charge Test Circuit S17-1097-Rev. N, 24-Jul-17 Document Number: 91474 5 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHG47N60E www.vishay.com Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 19 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91474. S17-1097-Rev. N, 24-Jul-17 Document Number: 91474 6 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix TO-247AC (High Voltage) VERSION 1: FACILITY CODE = 9 MILLIMETERS DIM. MIN. MAX. A 4.83 A1 2.29 MILLIMETERS NOTES DIM. MIN. MAX. NOTES 5.21 D1 16.25 16.85 5 2.55 D2 0.56 0.76 A2 1.50 2.49 E 15.50 15.87 b 1.12 1.33 E1 13.46 14.16 5 b1 1.12 1.28 E2 4.52 5.49 3 b2 1.91 2.39 b3 1.91 2.34 b4 2.87 3.22 b5 2.87 3.18 c 0.55 0.69 c1 0.55 0.65 D 20.40 20.70 4 6 e L 14.90 15.40 6, 8 L1 3.96 4.16 6 ØP 3.56 3.65 7 6 4 5.44 BSC Ø P1 7.19 ref. Q 5.31 5.69 S 5.54 5.74 Notes (1) Package reference: JEDEC® TO247, variation AC (2) All dimensions are in mm (3) Slot required, notch may be rounded (4) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the outermost extremes of the plastic body (5) Thermal pad contour optional with dimensions D1 and E1 (6) Lead finish uncontrolled in L1 (7) Ø P to have a maximum draft angle of 1.5° to the top of the part with a maximum hole diameter of 3.91 mm (8) Dimension b2 and b4 does not include dambar protrusion. Allowable dambar protrusion shall be 0.1 mm total in excess of b2 and b4 dimension at maximum material condition Revision: 19-Oct-2020 Document Number: 91360 1 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix VERSION 2: FACILITY CODE = Y A A 4 E B 3 R/2 E/2 7 ØP Ø k M DBM A2 S (Datum B) ØP1 A D2 Q 4 4 2xR (2) D1 D 1 2 4 D 3 Thermal pad 5 L1 C L See view B 2 x b2 3xb 0.10 M C A M 4 E1 A 0.01 M D B M View A - A C 2x e A1 b4 (b1, b3, b5) Planting Lead Assignments 1. Gate 2. Drain 3. Source 4. Drain D DE Base metal E C (c) C c1 (b, b2, b4) (4) Section C - C, D - D, E - E View B MILLIMETERS DIM. MIN. MAX. A 4.58 5.31 MILLIMETERS NOTES DIM. MIN. MAX. D2 0.51 1.30 15.87 A1 2.21 2.59 E 15.29 A2 1.17 2.49 E1 13.72 b 0.99 1.40 e 5.46 BSC b1 0.99 1.35 Øk b2 1.53 2.39 L 14.20 16.25 b3 1.65 2.37 L1 3.71 4.29 b4 2.42 3.43 ØP 3.51 3.66 b5 2.59 3.38 Ø P1 - 7.39 c 0.38 0.86 Q 5.31 5.69 4.52 c1 0.38 0.76 R D 19.71 20.82 S D1 13.08 - NOTES 0.254 5.49 5.51 BSC Notes (1) Dimensioning and tolerancing per ASME Y14.5M-1994 (2) Contour of slot optional (3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outermost extremes of the plastic body (4) Thermal pad contour optional with dimensions D1 and E1 (5) Lead finish uncontrolled in L1 (6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154") (7) Outline conforms to JEDEC outline TO-247 with exception of dimension c Revision: 19-Oct-2020 Document Number: 91360 2 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix VERSION 3: FACILITY CODE = N A E R/2 D2 B A P A2 D1 L1 D D K M D BM R S Q N P1 b2 L C e b b4 C E1 A1 0.01 M D B M 0.10 M C A M b1, b3, b5 c c1 Base metal Plating b, b2, b4 MILLIMETERS MILLIMETERS DIM. MIN. MAX. DIM. MIN. A 4.65 5.31 D2 0.51 MAX. 1.35 A1 2.21 2.59 E 15.29 15.87 13.46 A2 1.17 1.37 E1 b 0.99 1.40 e - b1 0.99 1.35 k b2 1.65 2.39 L 14.20 b3 1.65 2.34 L1 3.71 b4 2.59 3.43 N b5 2.59 3.38 P 3.56 c 0.38 0.89 P1 - 7.39 c1 0.38 0.84 Q 5.31 5.69 D 19.71 20.70 R 4.52 D1 13.08 - S 5.46 BSC 0.254 16.10 4.29 7.62 BSC 3.66 5.49 5.51 BSC ECN: E20-0545-Rev. F, 19-Oct-2020 DWG: 5971 Notes (1) Dimensioning and tolerancing per ASME Y14.5M-1994 (2) Contour of slot optional (3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outermost extremes of the plastic body (4) Thermal pad contour optional with dimensions D1 and E1 (5) Lead finish uncontrolled in L1 (6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154") Revision: 19-Oct-2020 Document Number: 91360 3 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, non-infringement and merchantability. Statements regarding the suitability of products for certain types of applications are based on Vishay's knowledge of typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements about the suitability of products for a particular application. It is the customer's responsibility to validate that a particular product with the properties described in the product specification is suitable for use in a particular application. Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over time. All operating parameters, including typical parameters, must be validated for each customer application by the customer's technical experts. Product specifications do not expand or otherwise modify Vishay's terms and conditions of purchase, including but not limited to the warranty expressed therein. Hyperlinks included in this datasheet may direct users to third-party websites. These links are provided as a convenience and for informational purposes only. Inclusion of these hyperlinks does not constitute an endorsement or an approval by Vishay of any of the products, services or opinions of the corporation, organization or individual associated with the third-party website. Vishay disclaims any and all liability and bears no responsibility for the accuracy, legality or content of the third-party website or for that of subsequent links. Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the Vishay product could result in personal injury or death. Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. © 2022 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED Revision: 01-Jan-2022 1 Document Number: 91000
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