SIHK105N60EF-T1GE3

SiHK105N60EF www.vishay.com Vishay Siliconix EF Series Power MOSFET With Fast Body Diode FEATURES • 4th generation E series technology Drain tab • Low figure-of-merit (FOM) Ron x Qg • Low effective capacitance (Co(er)) • Reduced switching and conduction losses Gate pin 1 • Avalanche energy rated (UIS) Driver source pin 2 Source pin 3 to 8 • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 N-Channel MOSFET APPLICATIONS • Server and telecom power supplies PRODUCT SUMMARY • Switch mode power supplies (SMPS) VDS (V) at TJ max. RDS(on) typ. (Ω) at 25 °C • Power factor correction power supplies (PFC) 650 VGS = 10 V • Lighting 0.090 Qg max. (nC) 51 - High-intensity discharge (HID) Qgs (nC) 16 - Fluorescent ballast lighting Qgd (nC) 8 Configuration • Industrial Single - Welding - Induction heating - Motor drives - Battery chargers - Solar (PV inverters) ORDERING INFORMATION Package PowerPAK 10 x 12 Lead (Pb)-free and halogen-free SIHK105N60EF-T1GE3 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-source voltage VDS 600 Gate-source voltage VGS ± 30 Continuous drain current (TJ = 150 °C) VGS at 10 V TC = 25 °C TC = 100 °C Pulsed drain current a ID IDM Linear derating factor UNIT V 24 15 A 61 1.14 W/°C Single pulse avalanche energy b EAS 154 mJ Maximum power dissipation PD 142 W TJ, Tstg -55 to +150 °C Operating junction and storage temperature range Drain-source voltage slope TJ = 125 °C Reverse diode dv/dt c dv/dt 100 50 V/ns Notes a. Repetitive rating; pulse width limited by maximum junction temperature b. VDD = 120 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 Ω, IAS = 3.3 A c. ISD ≤ ID, di/dt = 100 A/μs, starting TJ = 25 °C S22-0454-Rev. A, 23-May-2022 Document Number: 92437 1 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHK105N60EF www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum junction-to-ambient RthJA - 50 c Maximum junction-to-case (drain) RthJC - 0.88 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-source breakdown voltage VDS temperature coefficient Gate-source threshold voltage (N) VDS VGS = 0 V, ID = 250 μA 600 - - V ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.56 - V/°C VGS(th) VDS = VGS, ID = 250 μA 3.0 - 5.0 V VGS = ± 20 V - - ± 100 nA VGS = ± 30 V - - ±1 μA Gate-source leakage IGSS Zero gate voltage drain current IDSS VDS = 480 V, VGS = 0 V - - 1 μA VDS = 480 V, VGS = 0 V, TJ = 125 °C - - 2 mA - 0.090 0.105 Ω gfs VDS = 10 V, ID = 12 A - 2.1 - S Input capacitance Ciss 2301 - Coss - 81 - Reverse transfer capacitance Crss VGS = 0 V, VDS = 100 V, f = 200 kHz - Output capacitance - 1 - Effective output capacitance, energy related a Co(er) - 85 - Effective output capacitance, time related b Co(tr) - 462 - - 34 51 - 16 - Drain-source on-state resistance Forward transconductance a RDS(on) VGS = 10 V ID = 10 A Dynamic pF VDS = 0 V to 400 V, VGS = 0 V Total gate charge Qg Gate-source charge Qgs VGS = 10 V ID = 12 A, VDS = 480 V Gate-drain charge Qgd - 8 - Turn-on delay time td(on) - 31 62 VDD = 480 V, ID = 15 A, VGS = 10 V, Rg = 9.1 Ω - 51 77 - 40 80 - 30 60 f = 1 MHz 0.4 0.8 1.6 - - 24 - - 61 Rise time Turn-off delay time tr td(off) Fall time tf Gate input resistance Rg nC ns Ω Drain-Source Body Diode Characteristics Continuous source-drain diode current IS Pulsed diode forward current ISM Diode forward voltage VSD Reverse recovery time trr Reverse recovery charge Qrr Reverse recovery current IRRM MOSFET symbol showing the integral reverse p - n junction diode D A G TJ = 25 °C, IS = 12 A, VGS = 0 V TJ = 25 °C, IF = IS = 12 A, di/dt = 100 A/μs, VR = 400 V S - - 1.2 V - 102 292 ns - 0.6 1.2 μC - 13 - A Notes d. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 V to 400 V e. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 V to 400 V f. When mounted on 1” x 1” FR4 board S22-0454-Rev. A, 23-May-2022 Document Number: 92437 2 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHK105N60EF www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) Axis Title Axis Title 40 1000 7V 30 100 20 10 6V 5V 0 0 5 10 15 2.5 2.0 1000 1.5 VGS = 10 V 1.0 100 0.5 10 10 0 -60 -40 -20 0 20 20 40 60 80 100 120 140 160 VDS - Drain-to-Source Voltage (V) TJ - Junction Temperature (°C) Fig. 1 - Typical Output Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature Axis Title Axis Title 10000 15 V 14 V 13 V 12 V 11 V 10 V 9V TJ = 150 °C 10 000 1000 7V 20 6V 100 Ciss 2nd line C - Capacitance (pF) 30 10000 100 000 1st line 2nd line 1000 1000 100 Coss VGS = 0 V, f = 200 kHz Ciss = Cgs + Cgd, Cds shorted Crss = Cgd Coss = Cds + Cgd 10 Crss 10 1 5V 10 0 0 5 10 15 10 0.1 20 0 100 200 300 400 500 600 VDS - Drain-to-Source Voltage (V) VDS - Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Axis Title Axis Title 10000 70 100 000 12 60 2nd line Coss - Output Capacitance (pF) TJ = 25 °C 10 10 000 50 1000 1st line 2nd line 2nd line ID - Drain-to-Source Current (A) 100 40 TJ = 150 °C 30 100 20 10 8 Coss 1000 Eoss 6 4 100 2 VDS = 8 V 10 0 0 5 10 15 20 0 10 0 100 200 300 400 500 VGS - Gate-to-Source Voltage (V) VDS - Drain-to-Source Voltage (V) Fig. 3 - Typical Transfer Characteristics Fig. 6 - Coss and Eoss vs. VDS S22-0454-Rev. A, 23-May-2022 Eoss - Output Capacitance Stored Energy (µJ) 2nd line 2nd line ID - Drain-to-Source Current (A) 50 40 1st line 2nd line 50 8V 10000 ID =12 A 1st line 2nd line 60 TJ = 25 °C RDS(on) - Drain-to-Source On-Resistance (Normalized) 15 V 14 V 13 V 12 V 11 V 10 V 9V 1st line 2nd line 2nd line ID - Drain-to-Source Current (A) 3.0 10000 70 600 Document Number: 92437 3 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHK105N60EF www.vishay.com Vishay Siliconix Axis Title Axis Title 28 9 1000 6 100 3 10 0 0 10 20 30 10000 21 1000 1st line 2nd line VDS = 480 V VDS = 300 V VDS = 120 V 2nd line ID - Drain Current (A) 10000 1st line 2nd line 2nd line VGS - Gate-to-Source Voltage (V) 12 14 100 7 10 0 40 25 50 75 100 125 150 Qg - Total Gate Charge (nC) TC - Case Temperature (°C) Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 10 - Maximum Drain Current vs. Case Temperature Axis Title 10 1000 TJ = 25 °C 100 VGS = 0 V 10 1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.2 10000 1.1 1000 1st line 2nd line TJ = 150 °C 1st line 2nd line 2nd line ISD - Reverse Drain Current (A) 10000 VDS - Drain to Source Breakdown Voltage (Normalized) Axis Title 100 1.0 100 0.9 ID = 20 mA 10 0.8 -60 -40 -20 0 1.8 20 40 60 80 100 120 140 160 TJ - Junction Temperature (°C) VSD - Source-Drain Voltage (V) Fig. 11 - Temperature vs. Drain-to-Source Voltage Fig. 8 - Typical Source-Drain Diode Forward Voltage Axis Title 10000 1000 Operation in this area limited by RDS(on) IDM limited 1000 Limited by RDS(on) a 10 BVDSS limited 1 1st line 2nd line 2nd line ID - Drain Current (A) 100 100 100 µs 0.1 TC = 25 °C, TJ = 150 °C, single pulse 1 ms 10 ms 0.01 1 10 100 10 1000 VDS - Drain-to-Source Voltage (V) Fig. 9 - Maximum Safe Operating Area Note a. VGS > minimum VGS at which RDS(on) is specified S22-0454-Rev. A, 23-May-2022 Document Number: 92437 4 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHK105N60EF www.vishay.com Vishay Siliconix Axis Title 1 10000 0.2 1000 1st line 2nd line Normalized Effective Transient Thermal Impedance Duty cycle = 0.5 0.1 0.1 0.05 100 0.02 Single pulse 10 0.01 0.0001 0.001 0.01 0.1 1 Pulse Time (s) Fig. 12 - Normalized Transient Thermal Impedance, Junction-to-Case RD VDS VDS tp VGS D.U.T. VDD Rg + - VDD VDS 10 V Pulse width ≤ 1 μs Duty factor ≤ 0.1 % IAS Fig. 13 - Switching Time Test Circuit Fig. 16 - Unclamped Inductive Waveforms VDS Qg 10 V 90 % Qgs 10 % VGS Qgd VG td(on) td(off) tr tf Charge Fig. 14 - Switching Time Waveforms Fig. 17 - Basic Gate Charge Waveform Current regulator Same type as D.U.T. L VDS Vary tp to obtain required IAS 50 kΩ 12 V D.U.T. Rg 0.2 μF 0.3 μF + - VDD + D.U.T. IAS 10 V tp 0.01 Ω - VDS VGS 3 mA Fig. 15 - Unclamped Inductive Test Circuit IG ID Current sampling resistors Fig. 18 - Gate Charge Test Circuit S22-0454-Rev. A, 23-May-2022 Document Number: 92437 5 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHK105N60EF www.vishay.com Vishay Siliconix Peak Diode Recovery dv/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer 3 + 2 - - 4 + 1 Rg • • • • 1 Driver gate drive Period P.W. + V - DD dv/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test D= P.W. Period V GS = 10 V a 2 D.U.T. ISD waveform Reverse recovery current 3 D.U.T. VDS Body diode forward current di/dt waveform Diode recovery dv/dt Re-applied voltage V DD Body diode forward drop 4 Inductor current Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 19 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?92437. S22-0454-Rev. A, 23-May-2022 Document Number: 92437 6 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 PAD Pattern www.vishay.com Vishay Siliconix Recommended Land Pattern PowerPAK® 10 x 12 (TOLL) (High Voltage) 9.90 4.30 2x 1.30 3x 0.85 1.40 6.18 12.88 8.20 3.05 0.55 2.25 1.20 7x 1 2 pitch 0.90 8x Note • Dimensions in mm ECN: S22-1061-Rev. C, 26-Dec-2022 DWG: 3013 Revision: 26-Dec-2022 Document Number: 92489 1 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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