VCNL4035X01
www.vishay.com
Vishay Semiconductors
Fully Integrated Proximity and Ambient Light Sensor With
I2C Interface and Interrupt Function for Gesture Applications
FEATURES
• Package type: surface-mount
• Dimensions (L x W x H in mm): 4.0 x 2.36 x 0.75
• AEC-Q101 qualified
• Integrated modules: ambient light sensor
(ALS), proximity sensor (PS), and signal
conditioning ICL
• Operates ALS and PS in parallel structure
VDD
1
8
SDA
SCL
2
7
INT
GND
3
6
IRED1
IRED3
4
5
IRED2
• FiltronTM technology adoption for robust
background light cancellation
• Temperature compensation: -40 °C to +105 °C
• Low power consumption I2C (SMBus compatible)
interface
• Output type: I2C bus (ALS / PS)
LINKS TO ADDITIONAL RESOURCES
3D 3D
3D Models
Design Tools
Related
Documents
• Operation voltage: 2.5 V to 3.6 V
• Floor life: 168 h, MSL 3, according to J-STD-020
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
DESCRIPTION
PROXIMITY FUNCTION
VCNL4035X01 integrates a proximity sensor (PS),
ambient light sensor (ALS), a muxx, and a driver for up
to 3 external IREDs / LEDs into one small package. It
incorporates photodiodes, amplifiers, and analog to digital
converting circuits into a single chip by CMOS process. The
16-bit high resolution ALS offers excellent sensing
capabilities with sufficient selections to fulfill most
applications whether dark or high transparency lens design.
Both ALS and PS programmable interrupt features of
individual high and low thresholds offers the best utilization
of resource and power saving on the microcontroller.
The proximity sensor features an intelligent cancellation
scheme, so that cross talk phenomenon is eliminated
effectively. To accelerate the PS response time, smart
persistence prevents the misjudgment of proximity sensing
but also keeps a fast response time. Active force mode, one
time trigger by one instruction, is another good approach for
more design flexibility to fulfill different kinds of applications
with more power saving.
The adoption of patented FiltronTM technology achieves the
closest ambient light spectral sensitivity to real human eye
responses and offers the best background light cancellation
capability (including sunlight) without utilizing the
microcontrollers’ resources. VCNL4035X01 provides an
excellent temperature compensation capability for keeping
output stable under various temperature configurations.
ALS and PS functions are easily operated via the simple
command format of I2C (SMBus compatible) interface
protocol. Operating voltage ranges from 2.5 V to 3.6 V.
VCNL4035X01 is packaged in a lead-free 8-pin QFN
package, which offers the best market-proven reliability
quality.
• Immunity to red glow (≥ 890 nm IREDs)
Rev. 2.2, 18-Mar-2020
• Programmable IRED sink current
• Intelligent cancellation to reduce cross talk phenomenon
• Smart persistence scheme to reduce PS response time
• Selectable for 12- / 16- bit PS output data
AMBIENT LIGHT FUNCTION
• High accuracy of ALS ± 10 %
• Fluorescent light flicker immunity
• Spectrum close to real human eye responses
INTERRUPT
• Programmable interrupt function for ALS and PS with
upper and lower thresholds
• Adjustable persistence to prevent false triggers for ALS
and PS
APPLICATIONS
• Handheld device
• Notebook, tablet PC
• Consumer device
• Industrial application
GESTURE APPLICATION
• 2D and 3D gesture function supported
Document Number: 84251
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PRODUCT SUMMARY
PART
NUMBER
VCNL4035X01
OPERATING
RANGE
(mm)
OPERATING I2C BUS
AMBIENT
IRED PULSE
AMBIENT
VOLTAGE VOLTAGE
LIGHT
(2)
CURRENT
LIGHT RANGE
RANGE
RANGE
RESOLUTION
(lx)
(mA)
(V)
(V)
(lx)
0 to 500 (1)
2.5 to 3.6
1.8 to 5.5
200
0.004 to 16 768
0.004
OUTPUT
CODE
ADC
RESOLUTION
PROXIMITY /
AMBIENT LIGHT
16 bit, I2C
16 bit / 16 bit
Notes
(1) Depending on external IRED
(2) Adjustable through I2C interface
ORDERING INFORMATION
ORDERING CODE
PACKAGING
VCNL4035X01-GS08
VOLUME (1)
REMARKS
MOQ: 1800 pcs
VCNL4035X01-GS18
MOQ: 7000 pcs
VCNL40351X01-GS08
MOQ: 1800 pcs
VCNL40351X01-GS18
Tape and reel
VCNL40352X01-GS08
MOQ: 7000 pcs
MOQ: 1800 pcs
VCNL40352X01-GS18
MOQ: 7000 pcs
VCNL40353X01-GS08
MOQ: 1800 pcs
VCNL40353X01-GS18
MOQ: 7000 pcs
4.0 mm x 2.36 mm x 0.75 mm
Note
(1) MOQ: minimum order quantity
SLAVE ADDRESS OPTIONS
ORDERING CODE
SLAVE ADDRESS (7 bit)
VCNL4035X01-GS08
0x60
VCNL4035X01-GS18
VCNL40351X01-GS08
0x51
VCNL40351X01-GS18
VCNL40352X01-GS08
0x40
VCNL40352X01-GS18
VCNL40353X01-GS08
0x41
VCNL40353X01-GS18
ABSOLUTE MAXIMUM RATINGS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
SYMBOL
MIN.
MAX.
Supply voltage
TEST CONDITION
VDD
2.5
3.6
UNIT
V
Operation temperature range
Tamb
-40
+105
°C
Storage temperature range
Tstg
-40
+110
°C
RECOMMENDED OPERATING CONDITIONS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
SYMBOL
MIN.
MAX.
Supply voltage
VDD
2.5
3.6
V
Operation temperature range
Tamb
-40
+105
°C
I2C bus operating frequency
f(I2CCLK)
10
400
kHz
Rev. 2.2, 18-Mar-2020
TEST CONDITION
UNIT
Document Number: 84251
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PIN DESCRIPTIONS
PIN ASSIGNMENT
SYMBOL
TYPE
FUNCTION
1
VDD
-
Power supply input
2
SCL
I
I2C digital bus clock input
3
GND
-
Ground
4
IRED3
I
Cathode (IRED3) connection
5
IRED2
I
Cathode (IRED2) connection
6
IRED1
I
Cathode (IRED1) connection
7
INT
O
Interrupt pin
8
SDA
I / O (open drain)
I2C data bus data input / output
BASIC CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
TEST CONDITION
Supply voltage
Excluded LED driving
Supply current
Light condition = dark, VDD = 3.3 V
PS shut down
Logic high
I2C signal input
Logic low
Logic high
Logic low
MIN.
TYP.
MAX.
VDD
IDD
UNIT
2.5
-
3.6
V
-
300
-
μA
μA
IDD (SD)
-
0.2
-
VPULL UP
1.8
-
5.5
V
ALS disable, PS enable
IALSSD
-
200
-
μA
ALS enable, PS disable
IPSSD
-
260
-
μA
VIH
1.55
-
-
VIL
-
-
0.4
VIH
1.4
-
-
VIL
-
-
0.4
λp
-
550
-
λp
I2C supply voltage
ALS shut down
SYMBOL
VDD = 3.3 V
VDD = 2.6 V
Peak sensitivity wavelength of
ALS
Peak sensitivity wavelength of PS
V
V
nm
-
850
-
nm
Full ALS counts
16-bit resolution
-
-
65 535
steps
Full PS counts
12-bit / 16-bit resolution
-
-
4096 / 65 535
steps
%
ALS sensing tolerance
Detectable intensity
White LED light source
-
-
± 10
Minimum
IT = 800 ms, 1 step (1)(2)
-
0.004
-
Maximum
IT = 50 ms, 65 535 step (1)(2)
-
16 768
-
IT = 50 ms, normal sensitivity (1)
0
-
3
steps
Kodak gray card (3)
0
-
500
mm
-40
-
+105
°C
-
-
5.5
V
-
-
200
mA
ALS dark offset
PS detection range
Operating temperature range
Tamb
LED_Anode voltage
IRED driving current
(4)
lx
Notes
(1) Test condition: V
DD = 3.3 V, temperature: 25 °C
(2) Maximum detection range to ambient light can be determined by ALS refresh time adjustment and two sensitivity bits (ALS_HD and
ALS_NS). Refer to table “ALS Resolution and Maximum Detection Range”
(3) Depending on external IRED
(4) Based on IRED on / off duty ratio = 1/40, 1/80, 1/160, and 1/320
Rev. 2.2, 18-Mar-2020
Document Number: 84251
3
For technical questions, contact: sensorstechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VCNL4035X01
www.vishay.com
Vishay Semiconductors
I2C BUS TIMING CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
SYMBOL
Clock frequency
STANDARD MODE
MIN.
MAX.
f(SMBCLK)
10
t(BUF)
4.7
Hold time after (repeated) start condition;
after this period, the first clock is generated
t(HDSTA)
Repeated start condition setup time
FAST MODE
UNIT
MIN.
MAX.
100
10
400
kHz
-
1.3
-
μs
4.0
-
0.6
-
μs
t(SUSTA)
4.7
-
0.6
-
μs
Stop condition setup time
t(SUSTO)
4.0
-
0.6
-
μs
Data hold time
t(HDDAT)
-
3450
-
900
ns
Data setup time
Bus free time between start and stop condition
t(SUDAT)
250
-
100
-
ns
I2C clock (SCK) low period
t(LOW)
4.7
-
1.3
-
μs
I2C clock (SCK) high period
t(HIGH)
4.0
-
0.6
-
μs
Clock / data fall time
t(F)
-
300
-
300
ns
Clock / data rise time
t(R)
-
1000
-
300
ns
t(LOW)
I2C bus
CLOCK
(SCLK)
t(R)
t(F)
VIH
VIL
t(SUSTA)
t(HIGH)
t(HDSTA)
t(SUSTO)
t(BUF)
t(HDDAT)
I2C bus
DATA
(SDAT)
t(SUDAT)
VIH
VIL
{
P
Stop condition
{
{
S
Star condition
{
S
Start
P
Stop
t(LOSEXT)
SCLKACK
t(LOWMEXT)
SDAACK
t(LOWMEXT)
t(LOWMEXT)
2
I C bus
CLOCK
(SCLK)
I2C bus
DATA
(SDAT)
Fig. 1 - I2C Bus Timing Diagram
Rev. 2.2, 18-Mar-2020
Document Number: 84251
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PARAMETER TIMING INFORMATION
I2C bus
CLOCK
(SCLK)
I2C bus
DATA
(SDAT)
SA7
SA6
SA5
SA4
SA3
W
SA1
SA2
Start by
master
SA7
SA6
SA5
SA4
SA3
SA0
SA1
SA2
ACK by
VCNL4035X01
ACK by
VCNL4035X01
I2C bus slave address byte
Command code
I2C bus
CLOCK
(SCLK)
I2C bus
DATA
(SDAT)
SA7
SA6
SA5
SA4
SA3
SA2
SA0
SA1
SA7
SA6
SA5
SA4
SA3
SA2
SA1
SA0
Stop by
ACK by
VCNL4035X01 master
ACK by
VCNL4035X01
Data byte low
Data byte high
Fig. 2 - I2C Bus Timing for Sending Word Command Format
I2C bus
CLOCK
(SCLK)
I2C bus
DATA
(SDAT)
SA7
SA6
SA5
SA4
SA3
W
SA1
SA2
SA7
SA6
SA5
SA4
SA3
SA0
SA1
SA2
ACK by
VCNL4035X01
Start by
master
ACK by
VCNL4035X01
2
Command code
I C bus slave address byte
I2C bus
CLOCK
(SCLK)
I2C bus
DATA
(SDAT)
SA6
SA7
SA5
SA4
SA3
SA2
R
SA1
Start by
master
SA7
SA6
SA5
SA4
SA3
ACK by
VCNL4035X01
SA2
SA1
SA0
ACK by
master
I2C bus slave address byte
Data byte low
I2C bus
CLOCK
(SCLK)
I2C bus
DATA
(SDAT)
SA7
SA6
SA5
SA4
SA3
SA2
SA1
SA0
ACK by
master
Stop by
master
Data byte high
Fig. 3 - I2C Bus Timing for Receiving Word Command Format
Rev. 2.2, 18-Mar-2020
Document Number: 84251
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TYPICAL PERFORMANCE CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
Axis Title
Axis Title
120
10000
90
1000
1st line
2nd line
80
60
40
100
20
80
70
1000
60
1st line
2nd line
Human eye
2nd line
Normalized Output (%)
ALS
100
2nd line
Normalized Output (%)
100
10000
50
40
100
30
20
10
0
400
500
600
700
800
900
0
10
1000
10
-90
-60
-30
0
30
λ - Wavelength (nm)
2nd line
View Angle
2nd line
Fig. 4 - Normalized Spectral Response
(ALS channel)
Fig. 7 - ALS View Angle
Axis Title
60
90
Axis Title
120
10000
1.0
10000
0.9
1000
60
40
100
0.7
1000
0.6
1st line
2nd line
80
Normalized Output
1st line
0.8
1st line
2nd line
2nd line
Normalized Output (%)
100
0.5
0.4
100
0.3
0.2
20
0.1
0
10
550 600 650 700 750 800 850 900 950 1000
0
400
500
600
700
800
900
10
1000
λ - Wavelength (nm)
2nd line
Wavelength (nm)
2nd line
Fig. 5 - Normalized Spectral Response
(PS channel)
Fig. 8 - White Channel Spectral Response
Axis Title
250
10000
230
220
1000
210
1st line
2nd line
2nd line
IDD - Supply Current (μA)
240
200
190
100
180
170
160
150
10
-40
-20
0
20
40
60
80
100
Tamb - Ambient Temperature (°C)
2nd line
Fig. 6 - Supply Current vs. Ambient Temperature
Rev. 2.2, 18-Mar-2020
Document Number: 84251
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APPLICATION INFORMATION
Pin Connection with the Host
VCNL4035X01 integrates proximity sensor, ambient light Sensor, and an IRED driver with three inputs for external LEDs / IREDs
all together with I2C interface. It is very easy for the baseband (CPU) to access PS and ALS output data via I2C interface without
extra software algorithms. The hardware schematic is shown in the following diagram.
VCNL4035X01
1
ALS-PD
VDD
8 SDA
ALS 16 bit
data buffer
2
DSP
GND 3
7 INT
Oscillator
PS
data buffer
PS-PD
SCL
Output buffer
I2C interface
Low pass
filter
Driver
6 IRED1
Temperature
sensor
IRED3 4
5 IRED2
Fig. 9 - Detailed Block Diagram
Digital Interface
VCNL4035X01 is available in four different salve addresses (0x60, 0x51, 0x40, and 0x41). Please refer to the table “Salve
Address Options” at the beginning of the datasheet for an overview of the corresponding ordering codes. All operations can be
controlled by the command register. The simple command structure helps users easily program the operation setting and latch
the light data from VCNL4035X01. As Fig. 10 shows, VCNL4035X01’s I2C command format is simple for read and write
operations between VCNL4035X01 and the host. The white sections indicate host activity and the gray sections indicate
VCNL4035X01’s acknowledgment of the host access activity. Write word and read word protocol is suitable for accessing
registers particularly for 16-bit data ALS and 12-bit / 16-bit PS data. Interrupt can be cleared by reading data out from register:
INT_Flag. All command codes should follow read word and write word protocols.
Send Byte ɦ Write Command to VCNL4035X01
1
S
1
1
8
1
8
1
8
1
1
Wr
A
Command Code
A
Data Byte Low
A
Data Byte High
A
P
7
Slave Address
Receive Byte ɦ Read Data from VCNL4035X01
1
7
1
1
8
1
1
7
1
1
8
1
8
1
1
S
Slave Address
Wr
A
Command Code
A
S
Slave Address
Rd
A
Data Byte Low
A
Data Byte High
N
P
S = start condition
P = stop condition
A = acknowledge
Shaded area = VCNL4035X01 acknowledge
Fig. 10 - Write Word and Read Word Protocol
Rev. 2.2, 18-Mar-2020
Document Number: 84251
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Function Description
VCNL4035X01 applies a 16-bit high resolution ALS that provides the best ambient light sensing capability down to
0.004 lux/step which works well under a low transmittance lens design (dark lens). A flexible interrupt function of
ALS (register: ALS_CONF) is also supported. The INT signal will not be asserted by VCNL4035X01 if the ALS value is not over
high INT threshold window level, or lower than low INT threshold window level of ALS. As long as the ALS INT is asserted, the
host can read the data from VCNL4035X01. VCNL4035X01 detects different light sources such as fluorescent light,
incandescent light, sunlight, and white LED with high accuracy ALS data output after detecting algorithm is implemented.
For proximity sensor function, VCNL4035X01 supports different kinds of mechanical designs to achieve the best proximity
detection performance for any color of object with more flexibility. The basic PS function settings, such as duty ratio, integration
time, interrupt, and PS enable / disable, and persistence, are handled by the register: PS_CONF1. Duty ratio controls the PS
response time. Integration time represents the duration of the energy being received. The interrupt is asserted when the PS
detection levels over the high threshold level setting (register: PS_THDH) or lower than low threshold (register: PS_THDL). If the
interrupt function is enabled, the host reads the PS output data from VCNL4035X01 that saves host loading from periodically
reading PS data. More than that, INT flag (register: INT_Flag) indicates the behavior of INT triggered under different conditions.
PS persistence (PS_PERS) sets up the PS INT asserted conditions as long as the PS output value continually exceeds the
threshold level. The intelligent cancellation level can be set on register: PS_CANC to reduce the cross talk phenomenon.
VCNL4035X01 also supports an easy use of proximity detection logic output mode that outputs just high / low levels saving
loading from the host. Normal operation mode or proximity detection logic output mode can be selected on the register: PS_MS.
A smart persistence is provided to get faster PS response time and prevent false trigger for PS. Descriptions of each slave
address operation are shown in table 1
TABLE 1 - COMMAND CODE AND REGISTER DESCRIPTION
COMMAND DATE BYTE
CODE
LOW / HIGH
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
REGISTER
NAME
R / W DEFAULT
VALUE
L
ALS_CONF1
R/W
0x01
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
ALS_CONF2
ALS_THDH_L
ALS_THDH_M
ALS_THDL_L
ALS_THDL_M
PS_CONF1
PS_CONF2
PS_CONF3
PS_MS
PS_CANC_L
PS_CANC_M
PS_THDL_L
PS_THDL_M
PS_THDH_L
PS_THDH_M
PS1_Data_L
PS1_Data_M
PS2_Data_L
PS2_Data_M
PS3_Data_L
PS3_Data_M
ALS_Data_L
ALS_Data_M
White_Data_L
White_Data_M
Reserved
INT_Flag
ID_L
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
R
R
R
R
R
0x01
0x00
0x00
0x00
0x00
0x01
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x80
H
ID_M
R
0x00
FUNCTION DESCRIPTION
ALS integration time, ALS dynamic range, persistence, interrupt, and
function enable / disable
ALS sensitivity, white channel enable / disable
ALS high interrupt threshold LSB byte
ALS high interrupt threshold MSB byte
ALS low interrupt threshold LSB byte
ALS low interrupt threshold MSB byte
PS duty ratio, integration time, persistence, and PS enable / disable
PS gain, PS output resolution, PS / gesture interrupt trigger
PS smart persistence, active force mode, IRED select
LED current selection
PS cancellation level setting
PS cancellation level setting
PS low interrupt threshold setting LSB byte
PS low interrupt threshold setting MSB byte
PS high interrupt threshold setting LSB byte
PS high interrupt threshold setting MSB byte
PS1 LSB output data
PS1 MSB output data
PS2 LSB output data
PS2 MSB output data
PS3 LSB output data
PS3 MSB output data
ALS LSB output data
ALS MSB output data
White LSB output data
White MSB output data
Reserved
ALS, PS interrupt flags, PS sunlight protection mode flags
Device ID LSB
For version with 0x60 as device address; 0x10 for version with 0x51, 0x20
for version with 0x40 and 0x30 for version with 0x41 as device address
Note
• All of reserved register are used for internal test. Please keep as default setting
Rev. 2.2, 18-Mar-2020
Document Number: 84251
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For technical questions, contact: sensorstechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Command Register Format
VCNL4035X01 provides an 8-bit command register for ALS and PS controlling independently. The description of each
command format is shown in following tables.
TABLE 2 - REGISTER: ALS_CONF1 DESCRIPTION
REGISTER NAME
COMMAND CODE: 0x00_L (0x00 DATA BYTE LOW)
Command
Bit
7
6
5
4
3
2
1
0
COMMAND CODE: 0x00_L (0x00 DATA BYTE LOW)
Command
Bit
Description
ALS_IT
7:5
(0 : 0 : 0) = 50 ms; (0 : 0 : 1) = 100 ms; (0 : 1 : 0) = 200 ms; (0 : 1 : 1) = 400 ms; (1 : 0 : 0) to (1 : 1 : 1) = 800 ms
ALS integration time setting, longer integration time has higher sensitivity
ALS_HD
4
ALS_PERS
3:2
0 = typical dynamic range x 1, 1 = typical dynamic range x 2
(0 : 0) = 1, (0 : 1) = 2, (1 : 0) = 4, (1 : 1) = 8
ALS interrupt persistence setting
ALS_INT_EN
1
0 = ALS interrupt disable, 1 = ALS interrupt enable
ALS_SD
0
0 = ALS power on, 1 = ALS shut down, default = 1
TABLE 3 - REGISTER: ALS_CONF2 DESCRIPTION
COMMAND CODE: 0x00_H (0x00 DATA BYTE HIGH)
Command
Bit
Reserved
7:2
Description
ALS_NS
1
0 =typical sensitivity x 2, 1 = typical sensitivity x 1
WHITE_SD
0
0 = WHITE channel power on, 1 = WHITE channel shut down, default = 1
Default = (0 : 0 : 0 : 0 : 0 : 0)
TABLE 4 - REGISTER ALS_THDH_L AND ALS_THDH_M DESCRIPTION
COMMAND CODE: 0x01_L (0x01 DATA BYTE LOW) OR 0x01_H (0x01 DATA BYTE HIGH)
Register
Bit
Description
ALS_THDH_L
7:0
0x00 to 0xFF, ALS high interrupt threshold LSB byte
ALS_THDH_M
7:0
0x00 to 0xFF, ALS high interrupt threshold MSB byte
TABLE 5 - REGISTER: ALS_THDL_L AND ALS_THDL_M DESCRIPTION
COMMAND CODE: 0x02_L (0x02 DATA BYTE LOW) AND 0x02_H (0x02 DATA BYTE HIGH)
Register
Bit
Description
ALS_THDL_L
7:0
0x00 to 0xFF, ALS low interrupt threshold LSB byte
ALS_THDL_M
7:0
0x00 to 0xFF, ALS low interrupt threshold MSB byte
TABLE 6 - REGISTER: PS_CONF1 DESCRIPTION
REGISTER: PS_CONF1
Command
COMMAND CODE: 0x03_L (0x03 DATA BYTE LOW)
Bit
Description
PS_Duty
7:6
(0 : 0) = 1/40, (0 : 1) = 1/80, (1 : 0) = 1/160, (1 : 1) = 1/320
PS IRED on / off duty ratio setting
PS_PERS
5:4
(0 : 0) = 1, (0 : 1) = 2, (1 : 0) = 3, (1 : 1) = 4
PS interrupt persistence setting
PS_ IT
3:1
(0 : 0 : 0) = 1T, (0 : 0 : 1) = 1.5T, (0 : 1 : 0) = 2T, (0 : 1 : 1) = 2.5T, (1 : 0 : 0) = 3T, (1 : 0 : 1) = 3.5T,
(1 : 1 : 0) = 4T, (1 : 1 : 1) = 8T, PS integration time setting
PS_SD
0
Rev. 2.2, 18-Mar-2020
0 = PS power on, 1 = PS shut down, default = 1
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TABLE 7 - REGISTER: PS_CONF2 DESCRIPTION
REGISTER: PS_CONF2
Command
COMMAND CODE: 0x03_H (0x03 DATA BYTE HIGH)
Bit
Description
GESTURE_INT_EN
7
0 = disabled, 1 = enabled
GESTURE_MODE
6
0 = disabled, 1 = enabled
PS_Gain
5:4
(0 : 0) and (0 : 1) = two step mode, (1 : 0) = single mode x 8, (1 : 1) = single mode x 1
PS_HD
3
0 = PS output is 12 bits, 1 = PS output is 16 bits
PS_NS
2
0 = typical sensitivity (two step mode x 4), 1 = typical sensitivity mode (two step mode)
PS_INT
1:0
(0 : 0) = interrupt disable, (0 : 1) = trigger by closing, (1 : 0)= trigger by away,
(1 : 1) = trigger by closing and away
TABLE 8 - REGISTER: PS_CONF3 DESCRIPTION
REGISTER: PS_CONF3
Command
COMMAND CODE: 0x04_L (0x04 DATA BYTE LOW)
Bit
LED_I_LOW
7
IRED select
6:5
Description
0 = disabled = normal current, 1 = enabled = 1/10 of normal current,
with that the current is accordingly: 5 mA, 7.5 mA, 10 mA, 12 mA, 14 mA, 16 mA, 18 mA, 20 mA
(0 : 0) = IRED1, (0 : 1) = IRED2, (1 : 0) = IRED3, (1 : 1) = IRED3
PS_SMART_PERS
4
0 = disable; 1 = enable PS smart persistence
PS_AF
3
0 = active force mode disable (normal mode), 1 = active force mode enable
PS_TRIG
2
0 = no PS active force mode trigger, 1 = trigger one time cycle
VCNL4035X01 output one cycle data every time host writes in ‘1’ to sensor.
The state returns to ‘0’ automatically.
PS_MS
1
0 = proximity normal operation with interrupt function
1 = proximity detection logic output mode enable
PS_SC_EN
0
0 = turn off sunlight cancel; 1 = turn on sunlight cancel
PS sunlight cancel function enable setting
TABLE 9 - REGISTER: PS_MS DESCRIPTION
REGISTER: PS_MS
COMMAND CODE: 0x04_H (0x04 DATA BYTE HIGH)
Command
Bit
Reserved
7
PS_SC_CUR
6:5
Description
0
(0 : 0) = 1 x typical sunlight cancel current, (0 : 1) = 2 x typical sunlight cancel current,
(1 : 0) = 4 x typical sunlight cancel current, (1 : 1) = 8 x typical sunlight cancel current
PS_SP
4
0 = typical sunlight capability, 1 = 1.5 x typical sunlight capability
PS_SPO
3
0 = output is 00h in sunlight protect mode, 1 = output is FFh in sunlight protect mode,
LED_I
2:0
(0 : 0 : 0) = 50 mA; (0 : 0 : 1) = 75 mA; (0 : 1 : 0) = 100 mA; (0 : 1 : 1) = 120 mA
(1 : 0 : 0) = 140 mA; (1 : 0 : 1) = 160 mA; (1 : 1 : 0) = 180 mA; (1 : 1 : 1) = 200 mA
LED current selection setting
TABLE 10 - REGISTER PS_CANC_L AND PS_CANC_M DESCRIPTION
COMMAND CODE: 0x05_L (0x05 DATA BYTE LOW) AND 0x05_H (0x05 DATA BYTE HIGH)
Register
Bit
Description
PS_CANC_L
7:0
0x00 to 0xFF, PS cancellation level setting_LSB byte
PS_CANC_M
7:0
0x00 to 0xFF, PS cancellation level setting_MSB byte
TABLE 11 - REGISTER: PS_THDL_L AND PS_THDL_M DESCRIPTION
COMMAND CODE: 0x06_L (0x06 DATA BYTE LOW) AND 0x06_H (0x06 DATA BYTE HIGH)
Register
Bit
Description
PS_THDL_L
7:0
0x00 to 0xFF, PS interrupt low threshold setting_LSB byte
PS_THDL_M
7:0
0x00 to 0xFF, PS interrupt low threshold setting_MSB byte
Rev. 2.2, 18-Mar-2020
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TABLE 12 - REGISTER: PS_THDH_L AND PS_THDH_M DESCRIPTION
COMMAND CODE: 0x07_L (0x07 DATA BYTE LOW) AND 0x07_H (0x07 DATA BYTE HIGH)
Register
Bit
Description
PS_THDH_L
7:0
0x00 to 0xFF, PS interrupt high threshold setting_LSB byte
PS_THDH_M
7:0
0x00 to 0xFF, PS interrupt high threshold setting_MSB byte
TABLE 13 - READ OUT REGISTER DESCRIPTION
Register
PS1_Data_L
Command Code
Bit
Description
0x08_L (0x08 data byte low)
7:0
0x00 to 0xFF, PS1 LSB output data
PS1_Data_M
0x08_H (0x08 data byte high)
7:0
0x00 to 0xFF, PS1 MSB output data
PS2_Data_L
0x09_L (0x09 data byte low)
7:0
0x00 to 0xFF, PS2 LSB output data
PS2_Data_M
0x09_H (0x09 data byte high)
7:0
0x00 to 0xFF, PS2 MSB output data
PS3_Data_L
0x0A_L (0x0A data byte low)
7:0
0x00 to 0xFF, PS3 LSB output data
PS3_Data_M
0x0A_H (0x0A data byte high)
7:0
0x00 to 0xFF, PS3 MSB output data
ALS_Data_L
0x0B_L (0x0B data byte low)
7:0
0x00 to 0xFF, ALS LSB output data
ALS_Data_M
0x0B_H (0x0B data byte high)
7:0
0x00 to 0xFF, ALS MSB output data
White_Data_L
0x0C_L (0x0C data byte low)
7:0
0x00 to 0xFF, white LSB output data
White_Data_M
0x0C_H (0x0C data byte high)
7:0
0x00 to 0xFF, white LSB output data
Reserved
0x0D_L (0x0D data byte low)
7:0
0x00
INT_Flag
0x0D_H (0x0D data byte high)
7
6
5
4
3
2
1
0
ID_L
0x0E_H (0x0E data byte low)
7:0
0x80
7:6
(0 : 0)
5:4
(0:0) = slave address = 0x60 (7-bit);
(0:1) = slave address = 0x51 (7-bit);
(1:0) = slave address = 0x40 (7-bit);
(1:1) = slave address = 0x41 (7-bit)
3:0
Version code default = (0 : 0 : 0 : 0)
ID_M
0x0E_H (0x0E data byte high)
GESTURE_DATA_READY_FLAG
PS3_SPFLAG, PS entering protection mode
ALS_IF_L, ALS crossing low THD INT trigger event
ALS_IF_H, ALS crossing high THD INT trigger event
PS2_SPFLAG, PS entering protection mode
PS1_SPFLAG, PS entering protection mode
PS_IF_CLOSE, PS rises above PS_THDH INT trigger event
PS_IF_AWAY, PS drops below PS_THDL INT trigger event
Adjustable Sampling Time
VCNL4035X01’s embedded LED driver drives up to 3 external IREDs by a pulsed duty cycle. The IRED on / off duty ratio is
programmable by I2C command at register: PS_Duty which is related to the current consumption and PS response time. The
higher the duty ratio adopted, the faster response time achieved with higher power consumption. For example, PS_Duty =
1/320, peak IRED current = 100 mA, averaged current consumption is 100 mA/320 = 0.3125 mA.
Initialization
VCNL4035X01 includes default values for each register. As long as power is on, it is ready to be controlled by host via I2C bus.
Rev. 2.2, 18-Mar-2020
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Threshold Window Setting
• ALS Threshold Window Setting (Applying ALS INT)
Register: ALS_THDH_L and ALS_THDH_M defines 16-bit ALS high threshold data for LSB byte and MSB byte. Register:
ALS_THDL_L and ALS_THDL_M defines 16-bit ALS low threshold data for LSB byte and MSB byte. As long as ALS INT
function is enabled, INT will be asserted once the ALS data exceeds ALS_THDH or goes below ALS_THDL. To easily define
the threshold range, multiply the value of the resolution (lux/step) by the threshold level (refer to table 14)
TABLE 14 - ALS RESOLUTION AND MAXIMUM DETECTION RANGE
SENSITIVITY
MAXIMUM DETECTION
RANGE
INTEGRATION TIME
(typ.)
UNIT
(lux/step)
UNIT
(lux)
(0, 0, 0)
50 ms
0.064
4192
(0, 0, 1)
100 ms
0.032
2096
(0, 1, 0)
200 ms
0.016
1048
(0, 1, 1)
400 ms
0.008
524
(1, 0, 0) to (1, 1, 1)
800 ms
0.004
262
ALS_IT
ALS_IT
(7 : 5)
• ALS HD and ALS_NS
These two options enhance the dynamic range by a factor of two each.
With this the sensitivity shown within table 14 will be reduced by the factor 2, but the maximum possible detection range will
be doubled for both options. With this the max. detection range goes up to 4192 lx x 2 x 2 = 16 768 lx
• ALS Persistence
The ALS INT is asserted as long as the ALS value is higher or lower than the threshold window when ALS_PERS
(1, 2, 4, 8 times) is set to one time. If ALS_PERS is set to four times, then the ALS INT will not be asserted if the ALS value is
not over (or lower) than the threshold window for four continued refresh times (integration time)
• Programmable PS Threshold
VCNL4035X01 provides both high and low thresholds for PS (register: PS_THDL, PS_THDH)
• PS Persistence
The PS persistence function (PS_PERS, 1, 2, 3, 4) helps to avoid false trigger of the PS INT. For example, if
PS_PERS = 3 times, the PS INT will not be asserted unless the PS value is greater than the PS threshold (PS_THDH) value
for three periods of time continuously
• PS Active Force mode
An extreme power saving way to use PS is to apply PS active force (register: PS_CONF3 command: PS_FOR = 1) mode.
Anytime host would like to read out just one of PS data, write in ‘1’ at register: PS_CONF3 command: PS_FOR_Trig. Without
commands placed, there is no PS data output. VCNL4035X01 stays in standby mode constantly
• PS detection object
Any color of object is detectable by VCNL4035X01
Data Access
All of VCNL4035X01 command registers are readable. To access 16-bit high resolution ALS output data, it is suitable to use
read word protocol to read out data by just one command at register: ALS_DataL and ALS_DataM. To represent the 16-bit data
of ALS, it has to apply two bytes. One byte is for LSB, and the other byte is for MSB as shown in table 18. In terms of reading
out 8-bit PS data, it is also very convenient to read PS at register: PS_Data.
TABLE 15 - 16-BIT ALS DATA FORMAT
VCNL4035X01
Bit
15
14
Register
13
12
11
ALS_DataM
10
9
8
7
6
5
4
3
2
1
0
ALS_DataL
Intelligent Cancellation
VCNL4035X01 provides an intelligent cancellation method to reduce cross talk phenomenon for the proximity sensor. The
output data will be subtracted by the input value on register: PS_CANC.
Rev. 2.2, 18-Mar-2020
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Interruption (INT)
VCNL4035X01 has ALS and PS interrupt feature operated by a single pin “INT”. The purpose of the interrupt feature is to actively
inform the host once INT has been asserted. With the interrupt function applied, the host does not need to be constantly pulling
data from the sensor, but to read data from the sensor while receiving interrupt request from the sensor. As long as the host
enables ALS interrupt (register: ALS_INT_EN) or PS interrupt (register: PS_INT) function, the level of INT pin (pin 7) is pulled low
once INT asserted. All registers are accessible even if INT is asserted.
ALS INT asserted when ALS value cross over the value set by register: ALS_THDH or lower than the value set by
register: ALS_THDL. To effectively adopt PS INT function, it is recommended to use PS detection mechanism at register:
PS_INTT = 1 for the best PS detection performance which can be adjusted by high / low THD level of PS. PS INT trigger way is
defined by register: PS_INT.
Interruption Flag
Register: INT_Flag represents all of interrupt trigger status for ALS and PS. Any flag value changes from ‘0’ to ‘1’ state, the level
of INT pin will be pulled low. As long as host reads INT_Flag data, the bit will change from ‘1’ state to ‘0’ state after reading out,
the INT level will be returned to high afterwards.
PROXIMITY DETECTION LOGIC OUTPUT MODE
VCNL4035X01 provides a proximity detection logic output mode that uses INT pin (pin 7) as a proximity detection logic high /
low output (register: PS_MS). When this mode is selected, the PS output (pin 7; INT/Pout) is pulled low when an object is closing
to be detected and returned to level high when the object moves away. Register: PS_THDH / PS_THDL defines how sensitive
PS detection is.
One thing to be stated is that whenever proximity detection logic mode applied, INT pin is only used as a logic high / low output.
If host would like to use ALS with INT function, register: PS_MS has to be selected to normal operation mode (PS_MS = 0).
Meanwhile, host has to simulate the GPIO pin as an INT pin function. If not, host needs to periodically reading the state
of INT at this GPIO pin.
PROXIMITY DETECTION HYSTERESIS
A PS detection hysteresis is important that keeps PS state in a certain range of detection distance. For example, PS INT asserts
when PS value over PS_THDH. Host switches off panel backlight and then clears INT. When PS value is less than PS_THDL,
host switches on panel backlight. Any PS value lower than PS_THDH or higher than PS_THDL, PS INT will not be asserted. Host
does keep the same state.
GESTURE FEATURE WITH VCNL4035X01
VCNL4035X01 allows to connect up to 3 external IREDs. Each may be selected separate to allow for normal proximity.
If one select e.g. IRED2 then also PS2 delivers the corresponding proximity data. To allow for a convenient gesture handling
using all three external IREDs the GESTURE_MODE may be activated (set to “1”).
Within “PS_FORCE_MODE” all three IREDs will be sequentially switched and available proximity result of this directly shown
within the three PS_DATA register.
Beside GESTURE_MODE enabled and PS_FORCE_MODE set this sequence starts direct after setting the PS_TRIG bit.
Availability of the data will be indicated with setting the GESTURE_DATA_READY flag or also the Interrupt if this is set-up also.
Please see below diagram.
PS_MS
INT_GESTURE_EN
PS_FORCE_MODE
PS_TRIG
PS_OPERATION_SEQUENCE
IRED1
IRED2
IRED3
GESTURE_DATA_READY FLAG
INTERRUPT
GESTURE DATA
Fig. 11 - VCNL4035X01 Gesture Mode Sequence
Rev. 2.2, 18-Mar-2020
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APPLICATION CIRCUIT BLOCK REFERENCE
1.8 V to 5.5 V
R2
2.5 V to 5.5 V
IRED3 (4)
C1
C2
22 μF
R3
R4
IRED2 (5)
Host
micro controller
100 nF
IRED1 (6)
VCNL4035X01
2.5 V to 3.6 V
C3
VDD (1)
INT (7)
GPIO / INT
100 nF
GND (3)
I2C bus clock SCL
I2C bus data SDA
SCL (2)
SDA (8)
Fig. 12 - Circuitry with Two Separate Power Supply Sources
Three additional capacitors in the circuit are proposed for the following purposes: (1) the 100 nF capacitor near the VDD pin is
used for power supply noise rejection, (2) the 22 μF plus parallel 100 nF capacitors - connected to the common anode of the
external IREDs / LEDs - are used to prevent the IRED voltage from instantly dropping when an IRED is switched on, and
(3) 2.2 kΩ to 4.7 kΩ are recommended values for the pull up resistor of I2C. The value of the pull-up resistor at the INT line could
be 10 kΩ applied on the INT pin.
1.8 V to 5.5 V
R2
2.5 V to 3.6 V
IRED3 (4)
C1
C2
22 μF
R3
R4
IRED2 (5)
100 nF
IRED1 (6)
VCNL4035X01
R1
10R
Host
micro controller
C4
C3
10 μF
VDD (1)
INT (7)
GPIO / INT
100 nF
GND (3)
SCL (2)
SDA (8)
I2C bus clock SCL
I2C bus data SDA
Fig. 13 - Circuitry with just One Common Power Supply Source
For high currents of the IREDs and / or power supply close to the lower limit of 2.5 V this R-C decoupling will prevent that the
VDD voltage drop below specified minimum.
The IREDs should come with a peak wavelength between 850 nm and 940 nm to fit to the sensitivity of the proximity photodiode.
Mechanical placement of the external IRED depends on the application. Please study also the AN: designing VCNL4035X01
into an application
Rev. 2.2, 18-Mar-2020
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PACKAGE DIMENSIONS in millimeters
1.95
Pinning bottom view
0.185
0.28
LED2
5
LED1
6
INT
7
SDA
8
1.03
0.405
0.76
1.41
0.405
0.69
1.17
LED3
4
0.405
GND
3
SCL
2
VDD
1
Exposed pad is
internally connected
to GND
0.185
0.65 (8 x)
Pinning top view
GND
3
SCL
2
VDD
1
LED2
5
LED1
6
INT
7
SDA
8
0.15
0.75
LED3
4
1.05
3 x 1.05 = 3.15
3.145
Recommended solder foot print
(2.36)
1.26
0.8
2.66
2.36
0.83 0.78
0.75 (8 x)
4
0.3 (6 x)
(4.02)
Drawing No.: 6.550-5331.01-4
Issue: 1; 21.02.2017
Not indicated tolerances ± 0.1 mm
Rev. 2.2, 18-Mar-2020
Technical drawings
according to DIN
specification.
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TAPE AND REEL DIMENSIONS in millimeters
Reel-Size:
GS 08: Ø 180 mm ± 2 mm = 1800 pieces
GS 18: Ø 330 mm ± 2 mm = 7000 pieces
reel-design is representative for different types
Tape- and Reel Dimensions:
non tolerated dimensions ± 0.1 mm
Unreel direction
Reel-
Ø
Ø 13
A
E
(Em mpty
pty lea
tra der
iler 40
20 0 m
0m m
m min
mi
n.) .
Label posted here
.4
1.3
0.3
18
A
12
Sensor orientation
8
4
2
Ø 1.55
Drawing No.: 9.800-5128.02-4
Issue: 1; 21.02.2017
Rev. 2.2, 18-Mar-2020
1.75
5.5
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SOLDER PROFILE
DRYPACK
Devices are packed in moisture barrier bags (MBB) to
prevent the products from moisture absorption during
transportation and storage. Each bag contains a desiccant.
Axis Title
10000
300
Max. 260 °C
255 °C
240 °C
217 °C
245 °C
FLOOR LIFE
1000
200
Max. 30 s
1st line
2nd line
2nd line
Temperature (°C)
250
150
Max. 120 s
100
Max. 100 s
Max. ramp down 6 °C/s
100
Floor life (time between soldering and removing from MBB)
must not exceed the time indicated on MBB label:
Floor life: 168 h
Conditions: Tamb < 30 °C, RH < 60 %
Moisture sensitivity level 3, according to J-STD-020.
Max. ramp up 3 °C/s
50
DRYING
10
0
0
50
100
150
200
250
300
Time (s)
19841
Fig. 14 - Lead (Pb)-free Reflow Solder Profile
according to J-STD-020
Rev. 2.2, 18-Mar-2020
In case of moisture absorption devices should be baked
before soldering. Conditions see J-STD-020 or label.
Devices taped on reel dry using recommended conditions
192 h at 40 °C (+ 5 °C), RH < 5 %.
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Legal Disclaimer Notice
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Disclaimer
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RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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Statements regarding the suitability of products for certain types of applications are based on Vishay's knowledge of typical
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements
about the suitability of products for a particular application. It is the customer's responsibility to validate that a particular product
with the properties described in the product specification is suitable for use in a particular application. Parameters provided in
datasheets and / or specifications may vary in different applications and performance may vary over time. All operating
parameters, including typical parameters, must be validated for each customer application by the customer's technical experts.
Product specifications do not expand or otherwise modify Vishay's terms and conditions of purchase, including but not limited
to the warranty expressed therein.
Hyperlinks included in this datasheet may direct users to third-party websites. These links are provided as a convenience and
for informational purposes only. Inclusion of these hyperlinks does not constitute an endorsement or an approval by Vishay of
any of the products, services or opinions of the corporation, organization or individual associated with the third-party website.
Vishay disclaims any and all liability and bears no responsibility for the accuracy, legality or content of the third-party website
or for that of subsequent links.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please
contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by
any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.
© 2022 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED
Revision: 01-Jan-2022
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Document Number: 91000
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