TC7LX1108WBG
CMOS Digital Integrated Circuits
Silicon Monolithic
TC7LX1108WBG
1. Functional Description
•
Low-Voltage, Low-Power 8-Bit Dual-Supply Bus Transceiver with Auto Direction Sensing
2. General
The TC7LX1108WBG is an advanced high-speed dual-supply 8-bit bus transceiver fabricated with silicon-gate
CMOS technology.
The TC7LX1108WBG is designed for use as an interface between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3V voltage systems.
The voltage translator automatically senses the direction of data transmission, eliminating the need for a direction
control input. When the Output Enable (OE) input is low, the device is disabled, effectively isolating the buses.
All inputs and outputs of the TC7LX1108WBG can tolerate overvoltage conditions up to 3.6 V.
3. Features
(1)
Voltage translation between arbitrary voltage levels from 1.2 V to 3.6 V.
(2)
High-speed operation: tpd = 4.7 ns (max) (VCCA = 1.8 ± 0.15 V, VCCB = 3.3 ± 0.3 V)
(3)
Latch-up performance: ±300 mA
(4)
ESD performance:
(5)
Ultra-small package: WCSP24C
(6)
The A-bus and B-bus are allowed to float. (when OE = Low)
(7)
3.6-V tolerant function and power-down protection provided on all inputs and outputs.
(8)
All output ports are disabled when either VCC is switched off (VCCA/B = 0 V).
Machine model ≥ ±200 V, Human body model ≥ ±2000 V
4. Packaging and Pin Assignment (Top View)
S-UFBGA24-0303-0.40A01
4.1. Pin Assignment
A
1
2
3
4
5
B8
VCCB
B7
B6
B5
B
A8
A7
A6
A5
C
GND
GND
VCCA
GND
VCCA
D
A4
OE
A3
A2
A1
E
B4
VCCB
B3
B2
B1
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2011-06-17
Rev.1.0
TC7LX1108WBG
5. Marking
Fig. 5.1 Marking
6. Block Diagram
Fig. 6.1 Block Diagram
2
2011-06-17
Rev.1.0
TC7LX1108WBG
7. Internal Equivalent Circuit
The TC7LX1108WBG does not have a control signal that controls the direction of data flow between A and B. In
a DC state, the output circuit holds either High or Low level, but since it is designed to have a weak drive strength
(with a typical output resistance of 5.5 kΩ), an overdrive signal from the external driver can change the direction
of data flow.
The output one-shot circuits detect either a rising or falling edge on the A or B port. During the rise time, the
output one-shot circuit associated with the PMOS transistors turns it on for a certain period to speed up a
transition from Low to High. Likewise, during the fall time, the output one-shot circuit associated with the NMOS
transistors turns it on to speed up a transition from High to Low.
Fig. 7.1 Internal Equivalent Circuit
8. Principle of Operation
8.1. Truth Table
Input
OE
Function
H
A port = B port
L
Disconnect
3
2011-06-17
Rev.1.0
TC7LX1108WBG
9. Absolute Maximum Ratings (Note)
Characteristics
Symbol
Supply voltage
Input voltage (OE)
Note
Rating
Unit
VCCA
-0.5 to 4.6
V
VCCB
-0.5 to 4.6
VIN
Bus I/O voltage
-0.5 to 4.6
VI/OA
VI/OB
Input diode current
(Note 1)
-0.5 to 4.6
(Note 2)
-0.5 to VCCA +0.5
(Note 1)
-0.5 to 4.6
(Note 2)
-0.5 to VCCB +0.5
IIK
-50
I/O diode current
II/OK
Output current
IOUTA
±25
IOUTB
±25
ICCA
±50
VCC/ground current per supply pin
(Note 3)
mA
±50
ICCB
±50
Power dissipation
PD
400
mW
Storage temperature
Tstg
-65 to 150
Note:
Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even
destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).
Note 1: Output in OFF state.
Note 2: High or low state. IOUT absolute maximum rating must be observed.
Note 3: VOUT < GND, VOUT > VCC
10. Operating Ranges (Note)
Characteristics
Supply voltage
Input voltage (OE)
Bus I/O voltage
Symbol
VCCA
Rating
Unit
1.2 to 3.6
V
1.2 to 3.6
VIN
0 to 3.6
VI/OA
dt/dv
Input fall time
Operating temperature
Test Condition
VCCB
VI/OB
Input rise time
Note
Topr
(Note 1)
0 to 3.6
(Note 2)
0 to VCCA
(Note 1)
0 to 3.6
(Note 2)
0 to VCCB
VIN = 0.8 to 2.0 V, VCCA = 2.5 V,
VCCB = 3.0 V
0 to 10
ns/V
0 to 10
-40 to 85
Note:
The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs and bus inputs must be tied to either VCC or GND. Please connect both bus inputs and the bus
outputs with VCC or GND when the I/O of the bus terminal changes by the function. In this case, please note
that the output is not short-circuited.
Note 1: Output in OFF state.
Note 2: High or low state
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2011-06-17
Rev.1.0
TC7LX1108WBG
11. Electrical Characteristics
)
11.1. DC Characteristics (Unless otherwise specified, Ta = -40 to 85
85
Characteristics
High-level input voltage
Symbol
VIHA
Test Condition
OE, An
VCCA (V)
VCCB (V)
Min
Max
Unit
1.2
1.2 to 3.6
1.10
V
1.4
1.20
1.65
1.35
2.3
1.70
3.0
2.00
3.6
VIHB
Low-level input voltage
VILA
Bn
1.2 to 3.6
OE, An
1.2
2.20
1.2
1.10
1.4
1.20
1.65
1.35
2.3
1.70
3.0
2.00
3.6
2.20
1.2 to 3.6
0.10
1.4
0.20
1.65
0.30
2.3
0.50
3.0
0.70
3.6
VILB
High-level output voltage
Low-level output voltage
Bn
1.2 to 3.6
0.80
1.2
0.10
1.4
0.20
1.65
0.30
2.3
0.50
3.0
0.70
3.6
0.80
VOHA
VIN = VIH or VIL, IOHA = -20 µA
1.2 to 3.6
1.2 to 3.6
VCCA -0.4
VOHB
VIN = VIH or VIL, IOHB = -20 µA
1.2 to 3.6
1.2 to 3.6
VCCB -0.4
VOLA
VIN = VIH or VIL, IOLA = 20 µA
1.2 to 3.6
1.2 to 3.6
0.4
VOLB
VIN = VIH or VIL, IOLB = 20 µA
1.2 to 3.6
1.2 to 3.6
0.4
3-state output OFF-state
leakage current
IOZA
1.2 to 3.6
1.2 to 3.6
±2.0
IOZB
VIN = VIH or VIL
VOUT = 0 to 3.6 V
1.2 to 3.6
1.2 to 3.6
±2.0
Output resistance
ROUT
1.2 to 3.6
1.2 to 3.6
3.85
7.15
kΩ
µA
Input leakage current
IIN
VIN (OE) = 0 to 3.6 V
1.2 to 3.6
1.2 to 3.6
±1.0
Power-OFF leakage current
IOFF
VIN, VOUT = 0 to 3.6 V
0
0
2.0
Quiescent supply current
ICCA
VINA = VCCA or GND
VINB = VCCB or GND
1.2 to 3.6
1.2 to 3.6
5.0
ICCB
1.2 to 3.6
1.2 to 3.6
5.0
ICCA
VCCA ≤ (VIN, VOUT) ≤ 3.6 V
1.2 to 3.6
1.2 to 3.6
±5.0
ICCB
VCCB ≤ (VIN, VOUT) ≤ 3.6 V
1.2 to 3.6
1.2 to 3.6
±5.0
5
µA
2011-06-17
Rev.1.0
TC7LX1108WBG
11.2. AC Characteristics
11.2.1. VCCA = 3.3 ± 0.3 V
(Unless otherwise specified, Ta = -40 to 85
, Input: tr = tf = 2.0 ns)
85
Characteristics
Propagation delay time
(Bn → An)
3-state output enable time
(OE → An)
3-state output disable time
(OE → An)
Propagation delay time
(An → Bn)
3-state output enable time
(OE → Bn)
3-state output disable time
(OE → Bn)
Output skew
(Note 1)
Symbol
tPLH/tPHL
tPZL/tPZH
Test Condition
Fig. 11.2.1, Fig. 11.2.3,
Table 11.2.2
Fig. 11.2.2, Fig. 11.2.4,
Table 11.2.1, Table 11.2.2
tPLZ/tPHZ
tPLH/tPHL
tPZL/tPZH
Fig. 11.2.1, Fig. 11.2.3,
Table 11.2.2
Fig. 11.2.2, Fig. 11.2.4,
Table 11.2.1, Table 11.2.2
tPLZ/tPHZ
tosLH/tosHL
VCCB (V)
Min
Max
Unit
1.2
1.0
10.7
ns
1.5 ± 0.1
1.0
6.2
1.8 ± 0.15
1.0
4.8
2.5 ± 0.2
1.0
3.6
3.3 ± 0.3
1.0
3.2
1.2
1.0
74.3
1.5 ± 0.1
1.0
69.0
1.8 ± 0.15
1.0
66.6
2.5 ± 0.2
1.0
65.1
3.3 ± 0.3
1.0
63.5
1.2
1.0
57.6
1.5 ± 0.1
1.0
59.1
1.8 ± 0.15
1.0
56.7
2.5 ± 0.2
1.0
56.9
3.3 ± 0.3
1.0
60.5
1.2
1.0
7.3
1.5 ± 0.1
1.0
4.6
1.8 ± 0.15
1.0
3.9
2.5 ± 0.2
1.0
3.2
3.3 ± 0.3
1.0
3.0
1.2
1.0
120.5
1.5 ± 0.1
1.0
111.8
1.8 ± 0.15
1.0
109.8
2.5 ± 0.2
1.0
112.9
3.3 ± 0.3
1.0
113.2
1.2
1.0
112.5
1.5 ± 0.1
1.0
98.4
1.8 ± 0.15
1.0
103.0
2.5 ± 0.2
1.0
95.0
3.3 ± 0.3
1.0
121.7
1.2
0.5
1.5 ± 0.1
0.5
1.8 ± 0.15
0.5
2.5 ± 0.2
0.5
3.3 ± 0.3
0.5
Note 1: Parameter guaranteed by design.
(tosLH = |tPLHm - tPLHn|, tosHL = |tPHLm - tPHLn|)
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2011-06-17
Rev.1.0
TC7LX1108WBG
11.2.2. VCCA = 2.5 ± 0.2 V
(Unless otherwise specified, Ta = -40 to 85
, Input: tr = tf = 2.0 ns)
85
Characteristics
Propagation delay time
(Bn → An)
3-state output enable time
(OE → An)
3-state output disable time
(OE → An)
Propagation delay time
(An → Bn)
3-state output enable time
(OE → Bn)
3-state output disable time
(OE → Bn)
Output skew
(Note 1)
Symbol
tPLH/tPHL
tPZL/tPZH
Test Condition
Fig. 11.2.1, Fig. 11.2.3,
Table 11.2.2
Fig. 11.2.2, Fig. 11.2.4,
Table 11.2.1, Table 11.2.2
tPLZ/tPHZ
tPLH/tPHL
tPZL/tPZH
Fig. 11.2.1, Fig. 11.2.3,
Table 11.2.2
Fig. 11.2.2, Fig. 11.2.4,
Table 11.2.1, Table 11.2.2
tPLZ/tPHZ
tosLH/tosHL
VCCB (V)
Min
Max
Unit
ns
1.2
1.0
10.5
1.5 ± 0.1
1.0
6.2
1.8 ± 0.15
1.0
4.9
2.5 ± 0.2
1.0
3.7
3.3 ± 0.3
1.0
3.3
1.2
1.0
74.7
1.5 ± 0.1
1.0
68.8
1.8 ± 0.15
1.0
66.6
2.5 ± 0.2
1.0
64.6
3.3 ± 0.3
1.0
62.1
1.2
1.0
51.0
1.5 ± 0.1
1.0
52.0
1.8 ± 0.15
1.0
50.7
2.5 ± 0.2
1.0
49.8
3.3 ± 0.3
1.0
50.0
1.2
1.0
7.5
1.5 ± 0.1
1.0
5.0
1.8 ± 0.15
1.0
4.3
2.5 ± 0.2
1.0
3.7
3.3 ± 0.3
1.0
3.5
1.2
1.0
119.3
1.5 ± 0.1
1.0
112.3
1.8 ± 0.15
1.0
112.2
2.5 ± 0.2
1.0
114.1
3.3 ± 0.3
1.0
114.1
1.2
1.0
105.9
1.5 ± 0.1
1.0
100.0
1.8 ± 0.15
1.0
112.5
2.5 ± 0.2
1.0
94.8
3.3 ± 0.3
1.0
116.7
1.2
0.5
1.5 ± 0.1
0.5
1.8 ± 0.15
0.5
2.5 ± 0.2
0.5
3.3 ± 0.3
0.5
Note 1: Parameter guaranteed by design.
(tosLH = |tPLHm - tPLHn|, tosHL = |tPHLm - tPHLn|)
7
2011-06-17
Rev.1.0
TC7LX1108WBG
11.2.3. VCCA = 1.8 ± 0.15 V
(Unless otherwise specified, Ta = -40 to 85
, Input: tr = tf = 2.0 ns)
85
Characteristics
Propagation delay time
(Bn → An)
3-state output enable time
(OE → An)
3-state output disable time
(OE → An)
Propagation delay time
(An → Bn)
3-state output enable time
(OE → Bn)
3-state output disable time
(OE → Bn)
Output skew
(Note 1)
Symbol
tPLH/tPHL
tPZL/tPZH
Test Condition
Fig. 11.2.1, Fig. 11.2.3,
Table 11.2.2
Fig. 11.2.2, Fig. 11.2.4,
Table 11.2.1, Table 11.2.2
tPLZ/tPHZ
tPLH/tPHL
tPZL/tPZH
Fig. 11.2.1, Fig. 11.2.3,
Table 11.2.2
Fig. 11.2.2, Fig. 11.2.4,
Table 11.2.1, Table 11.2.2
tPLZ/tPHZ
tosLH/tosHL
VCCB (V)
Min
Max
Unit
ns
1.2
1.0
10.7
1.5 ± 0.1
1.0
6.4
1.8 ± 0.15
1.0
5.1
2.5 ± 0.2
1.0
4.0
3.3 ± 0.3
1.0
3.6
1.2
1.0
77.7
1.5 ± 0.1
1.0
72.7
1.8 ± 0.15
1.0
67.8
2.5 ± 0.2
1.0
66.0
3.3 ± 0.3
1.0
68.5
1.2
1.0
64.1
1.5 ± 0.1
1.0
61.2
1.8 ± 0.15
1.0
64.1
2.5 ± 0.2
1.0
59.9
3.3 ± 0.3
1.0
56.9
1.2
1.0
8.4
1.5 ± 0.1
1.0
6.1
1.8 ± 0.15
1.0
5.4
2.5 ± 0.2
1.0
4.9
3.3 ± 0.3
1.0
4.7
1.2
1.0
121.5
1.5 ± 0.1
1.0
115.8
1.8 ± 0.15
1.0
116.1
2.5 ± 0.2
1.0
116.4
3.3 ± 0.3
1.0
116.3
1.2
1.0
115.8
1.5 ± 0.1
1.0
99.3
1.8 ± 0.15
1.0
111.6
2.5 ± 0.2
1.0
95.4
3.3 ± 0.3
1.0
122.3
1.2
0.5
1.5 ± 0.1
0.5
1.8 ± 0.15
0.5
2.5 ± 0.2
0.5
3.3 ± 0.3
0.5
Note 1: Parameter guaranteed by design.
(tosLH = |tPLHm - tPLHn|, tosHL = |tPHLm - tPHLn|)
8
2011-06-17
Rev.1.0
TC7LX1108WBG
11.2.4. VCCA = 1.5 ± 0.1 V
(Unless otherwise specified, Ta = -40 to 85
, Input: tr = tf = 2.0 ns)
85
Characteristics
Propagation delay time
(Bn → An)
3-state output enable time
(OE → An)
3-state output disable time
(OE → An)
Propagation delay time
(An → Bn)
3-state output enable time
(OE → Bn)
3-state output disable time
(OE → Bn)
Output skew
(Note 1)
Symbol
tPLH/tPHL
tPZL/tPZH
Test Condition
Fig. 11.2.1, Fig. 11.2.3,
Table 11.2.2
Fig. 11.2.2, Fig. 11.2.4,
Table 11.2.1, Table 11.2.2
tPLZ/tPHZ
tPLH/tPHL
tPZL/tPZH
Fig. 11.2.1, Fig. 11.2.3,
Table 11.2.2
Fig. 11.2.2, Fig. 11.2.4,
Table 11.2.1, Table 11.2.2
tPLZ/tPHZ
tosLH/tosHL
VCCB (V)
Min
Max
Unit
ns
1.2
1.0
10.9
1.5 ± 0.1
1.0
6.8
1.8 ± 0.15
1.0
5.5
2.5 ± 0.2
1.0
4.4
3.3 ± 0.3
1.0
4.0
1.2
1.0
81.5
1.5 ± 0.1
1.0
73.8
1.8 ± 0.15
1.0
72.6
2.5 ± 0.2
1.0
68.7
3.3 ± 0.3
1.0
67.4
1.2
1.0
66.3
1.5 ± 0.1
1.0
60.5
1.8 ± 0.15
1.0
56.8
2.5 ± 0.2
1.0
57.2
3.3 ± 0.3
1.0
57.4
1.2
1.0
9.7
1.5 ± 0.1
1.0
7.6
1.8 ± 0.15
1.0
6.9
2.5 ± 0.2
1.0
6.4
3.3 ± 0.3
1.0
6.2
1.2
1.0
125.6
1.5 ± 0.1
1.0
120.4
1.8 ± 0.15
1.0
119.9
2.5 ± 0.2
1.0
122.6
3.3 ± 0.3
1.0
119.8
1.2
1.0
105.7
1.5 ± 0.1
1.0
97.7
1.8 ± 0.15
1.0
111.3
2.5 ± 0.2
1.0
95.8
3.3 ± 0.3
1.0
127.9
1.2
0.5
1.5 ± 0.1
0.5
1.8 ± 0.15
0.5
2.5 ± 0.2
0.5
3.3 ± 0.3
0.5
Note 1: Parameter guaranteed by design.
(tosLH = |tpLHm - tpLHn|, tosHL = |tpHLm - tpHLn|)
9
2011-06-17
Rev.1.0
TC7LX1108WBG
11.2.5. VCCA = 1.2 V
(Unless otherwise specified, Ta = -40 to 85
, Input: tr = tf = 2.0 ns)
85
Characteristics
Propagation delay time
(Bn → An)
3-state output enable time
(OE → An)
3-state output disable time
(OE → An)
Propagation delay time
(An → Bn)
3-state output enable time
(OE → Bn)
3-state output disable time
(OE → Bn)
Output skew
(Note 1)
Symbol
tPLH/tPHL
tPZL/tPZH
Test Condition
Fig. 11.2.1, Fig. 11.2.3,
Table 11.2.2
Fig. 11.2.2, Fig. 11.2.4,
Table 11.2.1, Table 11.2.2
tPLZ/tPHZ
tPLH/tPHL
tPZL/tPZH
Fig. 11.2.1, Fig. 11.2.3,
Table 11.2.2
Fig. 11.2.2, Fig. 11.2.4,
Table 11.2.1, Table 11.2.2
tPLZ/tPHZ
tosLH/tosHL
VCCB (V)
Min
Max
Unit
ns
1.2
1.0
11.8
1.5 ± 0.1
1.0
7.9
1.8 ± 0.15
1.0
6.4
2.5 ± 0.2
1.0
5.3
3.3 ± 0.3
1.0
5.0
1.2
1.0
93.6
1.5 ± 0.1
1.0
84.3
1.8 ± 0.15
1.0
80.8
2.5 ± 0.2
1.0
79.2
3.3 ± 0.3
1.0
79.7
1.2
1.0
79.5
1.5 ± 0.1
1.0
72.7
1.8 ± 0.15
1.0
69.7
2.5 ± 0.2
1.0
82.7
3.3 ± 0.3
1.0
73.1
1.2
1.0
13.3
1.5 ± 0.1
1.0
12.0
1.8 ± 0.15
1.0
11.3
2.5 ± 0.2
1.0
10.9
3.3 ± 0.3
1.0
10.9
1.2
1.0
136.7
1.5 ± 0.1
1.0
128.4
1.8 ± 0.15
1.0
126.1
2.5 ± 0.2
1.0
125.0
3.3 ± 0.3
1.0
125.0
1.2
1.0
114.9
1.5 ± 0.1
1.0
100.6
1.8 ± 0.15
1.0
109.6
2.5 ± 0.2
1.0
97.1
3.3 ± 0.3
1.0
127.5
1.2
0.5
1.5 ± 0.1
0.5
1.8 ± 0.15
0.5
2.5 ± 0.2
0.5
3.3 ± 0.3
0.5
Note 1: Parameter guaranteed by design.
(tosLH = |tPLHm - tPLHn|, tosHL = |tPHLm - tPHLn|)
10
2011-06-17
Rev.1.0
TC7LX1108WBG
11.3. Timing Requirements
)
11.3.1. VCCA = 3.3 ± 0.3 V (Unless otherwise specified, Ta = -40 to 85
85
Characteristics
Pulse duration (data input)
Data rate
Symbol
tw
fD
Test Condition
Fig. 11.2.1
VCCB
Min
Max
Unit
1.2
50
ns
1.5 ± 0.1
17
1.8 ± 0.15
12
2.5 ± 0.2
7
3.3 ± 0.3
5
1.2
20
1.5 ± 0.1
60
Mbps
1.8 ± 0.15
90
2.5 ± 0.2
150
3.3 ± 0.3
200
VCCB
Min
Max
Unit
ns
)
11.3.2. VCCA = 2.5 ± 0.2 V (Unless otherwise specified, Ta = -40 to 85
85
Characteristics
Pulse duration (data input)
Data rate
Symbol
tw
fD
Test Condition
Fig. 11.2.1
1.2
50
1.5 ± 0.1
17
1.8 ± 0.15
12
2.5 ± 0.2
7
3.3 ± 0.3
7
1.2
20
1.5 ± 0.1
60
1.8 ± 0.15
90
2.5 ± 0.2
150
3.3 ± 0.3
150
Mbps
)
85
11.3.3. VCCA = 1.8 ± 0.15 V (Unless otherwise specified, Ta = -40 to 85
Characteristics
Pulse duration (data input)
Data rate
Symbol
tw
fD
Test Condition
Fig. 11.2.1
11
VCCB
Min
Max
Unit
1.2
50
ns
1.5 ± 0.1
20
1.8 ± 0.15
13
2.5 ± 0.2
12
3.3 ± 0.3
12
1.2
20
1.5 ± 0.1
50
1.8 ± 0.15
80
2.5 ± 0.2
90
3.3 ± 0.3
90
Mbps
2011-06-17
Rev.1.0
TC7LX1108WBG
)
11.3.4. VCCA = 1.5 ± 0.1 V (Unless otherwise specified, Ta = -40 to 85
85
Characteristics
Pulse duration (data input)
Data rate
Symbol
tw
Test Condition
Fig. 11.2.1
fD
VCCB
Min
Max
Unit
ns
1.2
50
1.5 ± 0.1
20
1.8 ± 0.15
20
2.5 ± 0.2
17
3.3 ± 0.3
17
1.2
20
Mbps
1.5 ± 0.1
50
1.8 ± 0.15
50
2.5 ± 0.2
60
3.3 ± 0.3
60
VCCB
Min
Max
Unit
ns
11.3.5. VCCA = 1.2 V (Unless otherwise specified, Ta = -40 to 85
)
85
Characteristics
Pulse duration (data input)
Data rate
Symbol
tw
Test Condition
Fig. 11.2.1
fD
1.2
50
1.5 ± 0.1
50
1.8 ± 0.15
50
2.5 ± 0.2
50
3.3 ± 0.3
50
1.2
20
Mbps
1.5 ± 0.1
20
1.8 ± 0.15
20
2.5 ± 0.2
20
3.3 ± 0.3
20
VCCA
(V)
VCCB
(V)
Typ.
Unit
2.5
3.3
8
pF
)
25
11.4. Capacitive Characteristics (Unless otherwise specified, Ta = 25
Characteristics
Input capacitance
Symbol
Test Condition
CIN
OE
Bus I/O capacitance
CI/O
An, Bn
Power dissipation capacitance (Note 1)
CPDA
OE = Low (A → B)
0.01
OE = Low (B → A)
0.01
OE = High (A → B)
14
CPDB
8
OE = High (B → A)
20
OE = Low (A → B)
0.01
OE = Low (B → A)
0.01
OE = High (A → B)
29
OE = High (B → A)
29
Note 1: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current
consumption without load.
Average operating current can be obtained by the equation.
ICC(opr) = CPD × VCC × fIN + ICC/8 (per bit)
12
2011-06-17
Rev.1.0
TC7LX1108WBG
Fig. 11.2.1 AC Test Circuit
Fig. 11.2.2 AC Test Circuit
Table 11.2.1 Parameter for AC Test Circuit
Parameter
tPLZ, tPZL
Switch
Test Condition
6.0 V
VCC = 3.3 ± 0.3 V
VCC × 2
VCC = 2.5 ± 0.2 V
VCC = 1.8 ± 0.15 V
VCC = 1.5 ± 0.1 V
VCC = 1.2 V
tPHZ, tPZH
OPEN
13
2011-06-17
Rev.1.0
TC7LX1108WBG
Fig. 11.2.3 AC Waveform of tPLH, tPHL
Fig. 11.2.4 AC Waveform of tPLZ, tPHZ, tPZL, tPZH
Table 11.2.2 AC Waveform Symbols
VCC
Symbol
Value
3.3 ± 0.3 V
VIH
2.7 V
VM
1.5 V
VX
VOL + 0.3 V
VY
VOH - 0.3 V
2.5 ± 0.2 V
1.8 ± 0.15 V
1.5 ± 0.1 V
1.2 V
VIH
VCC
VM
VCC/2
VX
VOL + 0.15 V
VY
VOH - 0.15 V
VIH
VCC
VM
VCC/2
VX
VOL + 0.1 V
VY
VOH - 0.1 V
14
2011-06-17
Rev.1.0
TC7LX1108WBG
Package Dimensions
Unit: mm
This resins used in this product include no flame retardants.
Weight: 0.006 g (typ.)
Package Name(s)
TOSHIBA: S-UFBGA24-0303-0.40A01
Nickname: WCSP24C
15
2011-06-17
Rev.1.0
TC7LX1108WBG
RESTRICTIONS ON PRODUCT USE
• Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information
in this document, and related hardware, software and systems (collectively "Product") without notice.
• This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA's
written permission, reproduction is permissible only if reproduction is without alteration/omission.
• Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. Customers are responsible
for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which
minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage
to property, including data loss or corruption. Before customers use the Product, create designs including the Product, or incorporate
the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA
information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the
precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the application
with which the Product will be used with or for. Customers are solely responsible for all aspects of their own product design or applications,
including but not limited to (a) determining the appropriateness of the use of this Product in such design or applications; (b) evaluating
and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample
application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and applications.
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• ABSENT A WRITTEN SIGNED AGREEMENT, EXCEPT AS PROVIDED IN THE RELEVANT TERMS AND CONDITIONS OF SALE
FOR PRODUCT, AND TO THE MAXIMUM EXTENT ALLOWABLE BY LAW, TOSHIBA (1) ASSUMES NO LIABILITY WHATSOEVER,
INCLUDING WITHOUT LIMITATION, INDIRECT, CONSEQUENTIAL, SPECIAL, OR INCIDENTAL DAMAGES OR LOSS, INCLUDING
WITHOUT LIMITATION, LOSS OF PROFITS, LOSS OF OPPORTUNITIES, BUSINESS INTERRUPTION AND LOSS OF DATA, AND
(2) DISCLAIMS ANY AND ALL EXPRESS OR IMPLIED WARRANTIES AND CONDITIONS RELATED TO SALE, USE OF PRODUCT,
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PURPOSE, ACCURACY OF INFORMATION, OR NONINFRINGEMENT.
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for the design, development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapons or missile technology products
(mass destruction weapons). Product and related software and technology may be controlled under the Japanese Foreign Exchange
and Foreign Trade Law and the U.S. Export Administration Regulations. Export and re-export of Product or related software or technology
are strictly prohibited except in compliance with all applicable export laws and regulations.
• Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS compatibility of Product.
Please use Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances,
including without limitation, the EU RoHS Directive. TOSHIBA assumes no liability for damages or losses occurring as a result of
noncompliance with applicable laws and regulations.
16
2011-06-17
Rev.1.0
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