TC7SB67CFU,LF(CT

TC7SB66CFU,TC7SB67CFU CMOS Digital Integrated Circuits Silicon Monolithic TC7SB66CFU,TC7SB67CFU 1. Functional Description • Low-Capacitance Single Bus Switch (analog) 2. General The TC7SB66CFU and TC7SB67CFU are low ON-resistance, high-speed CMOS 1-bit bus switches. These bus switches allow connections or disconnections to be made with minimal propagation delay while maintaining Low power dissipation which is the feature of CMOS. TC7SB66CFU requires the output enable (OE) input to be set low to place the output into the high impedance state,whereas the TC7SB67CFU requires the output enable (OE) input to be set high to place the output into the high impedance. These Bus switches consist of P-MOS and N-MOS structure, meaning these devices are suitable for analog signal transmission. All inputs are equipped with protector circuits to protect the device from static discharge. 3. Features (1) AEC-Q100 (rev.H) Grade 1 qualified (Note 1) (2) Wide operating temperature range: Topr = -40 to 125 � (Note 2) (3) Operating voltage: VCC = 1.65 to 5.5 V (4) ON capacitance: CI/O = 10 pF Switch On (typ.) @VCC = 5.0 V (5) ON resistance: RON = 4 Ω (typ.) @VCC = 4.5 V, VIS = 0 V (6) Package: USV Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales representative. Note 2: For devices with the ordering part number ending in (CT. Topr = -40 to 85 � for the other devices. 4. Packaging USV Start of commercial production 2020-09 ©2020-2021 Toshiba Electronic Devices & Storage Corporation 1 2021-03-11 Rev.2.0 TC7SB66CFU,TC7SB67CFU 5. Pin Assignment TC7SB66CFU TC7SB67CFU 6. Block Diagram TC7SB66CFU TC7SB67CFU 7. Principle of Operation 7.1. Truth Table Inputs OE (TC7SB66CFU) Inputs OE (TC7SB67CFU) Function H L A port = B port L H Disconnect ©2020-2021 Toshiba Electronic Devices & Storage Corporation 2 2021-03-11 Rev.2.0 TC7SB66CFU,TC7SB67CFU 8. Absolute Maximum Ratings (Note) (Unless otherwise specified, T a = 25 �) Characteristics Symbol Note Rating Unit V Supply voltage VCC -0.5 to 7.0 Input voltage (OE, OE) VIN -0.5 to 7.0 Switch I/O voltage VS -0.5 to VCC +0.5 Clamp diode current IIK -50 mA Switch I/O current IS 50 Power dissipation PD 200 mW ICC/IGND ±100 mA Tstg -65 to 150 � VCC/ground current Storage temperature Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). 9. Operating Ranges (Note) Characteristics Symbol Note Rating Unit V Supply voltage VCC 1.65 to 5.5 Input voltage (OE, OE) VIN 0 to 5.5 Switch I/O voltage VS Operating temperature Topr 0 to VCC Input rise time dt/dv 0 to 10 Input fall time dt/dv 0 to 10 (Note 1) -40 to 125 (Note 2) -40 to 85 � ns/V Note: The operating ranges must be maintained to ensure the normal operation of the device. Unused control inputs must be tied to either VCC or GND. Note 1: For devices with the ordering part number ending in (CT. Note 2: For devices except those with the ordering part number ending in (CT. ©2020-2021 Toshiba Electronic Devices & Storage Corporation 3 2021-03-11 Rev.2.0 TC7SB66CFU,TC7SB67CFU 10. Electrical Characteristics 10.1. DC Characteristics (Unless otherwise specified, T a = -40 to 85 �) Characteristics Part Number Symbol Note Test Condition VCC (V) Min Typ. Max Unit � 1.65 to 1.95 0.8 × VCC � � V 2.3 to 5.5 0.7 × VCC � � 1.65 to 1.95 � � 0.2 × VCC 2.3 to 5.5 � � 0.3 × VCC High-level input voltage (OE, OE) VIH Low-level input voltage (OE, OE) VIL Input leakage current (OE, OE) IIN VIN = 0 to 5.5 V 1.65 to 5.5 � � ±1.0 ISZ A, B = 0 to VCC, OE = GND 1.65 to 5.5 � � ±10 A, B = 0 to VCC, OE = VCC 1.65 to 5.5 � � ±10 (Note 1), VIS = 0 V, (Note 2) IIS = 30 mA 4.5 � 4 7 VIS = 2.4 V, IIS = 30 mA 4.5 � 5 12 VIS = 4.5 V, IIS = 30 mA 4.5 � 6 10 VIS = 0 V, IIS = 24 mA 3.0 � 5 9 VIS = 3.0 V, IIS = 24 mA 3.0 � 7 14 VIS = 0 V, IIS = 8 mA 2.3 � 6 12 VIS = 2.3 V, IIS = 8 mA 2.3 � 9 18 VIS = 0 V, IIS = 4 mA 1.65 � 8 20 VIS = 1.65 V, IIS = 4 mA 1.65 � 15 30 VIN = VCC or GND, IOUT = 0 A 5.5 � � 10 VIN = VCC - 0.6 V 5.5 � � 50 Switch OFF-state leakage current TC7SB66CFU TC7SB67CFU ON-resistance Quiescent supply current RON ICC ∆ICC � µA Ω µA Note 1: All typical values are at Ta = 25 �. Note 2: Measured by the voltage drop between A and B pins at the indicated current through the switch. On-resistance is determined by the lower of the voltages on the two (A or B) pins. ©2020-2021 Toshiba Electronic Devices & Storage Corporation 4 2021-03-11 Rev.2.0 TC7SB66CFU,TC7SB67CFU 10.2. DC Characteristics (Unless otherwise specified, T a = -40 to 125 �) Characteristics Part Number Symbol Note Test Condition Min Typ. Max Unit 1.65 to 1.95 0.8 × VCC � � V 2.3 to 5.5 0.7 × VCC � � 1.65 to 1.95 � � 0.2 × VCC 2.3 to 5.5 � � 0.3 × VCC High-level input voltage (OE, OE) VIH Low-level input voltage (OE, OE) VIL Input leakage current (OE, OE) IIN VIN = 0 to 5.5 V 1.65 to 5.5 � � ±2.0 ISZ A, B = 0 to VCC, OE = GND 1.65 to 5.5 � � ±20 A, B = 0 to VCC, OE = VCC 1.65 to 5.5 � � ±20 (Note 1), VIS = 0 V, (Note 2) IIS = 30 mA 4.5 � 4 9 VIS = 2.4 V, IIS = 30 mA 4.5 � 5 14 VIS = 4.5 V, IIS = 30 mA 4.5 � 6 12 VIS = 0 V, IIS = 24 mA 3.0 � 5 11 VIS = 3.0 V, IIS = 24 mA 3.0 � 7 16 VIS = 0 V, IIS = 8 mA 2.3 � 6 15 VIS = 2.3 V, IIS = 8 mA 2.3 � 9 21 VIS = 0 V, IIS = 4 mA 1.65 � 8 23 VIS = 1.65 V, IIS = 4 mA 1.65 � 15 33 VIN = VCC or GND, IOUT = 0 A 5.5 � � 100 VIN = VCC - 0.6 V 5.5 � � 100 Switch OFF-state leakage current TC7SB66CFU TC7SB67CFU ON-resistance Quiescent supply current RON ICC ∆ICC � VCCB (V) � µA Ω µA Note 1: All typical values are at Ta = 25 �. Note 2: Measured by the voltage drop between A and B pins at the indicated current through the switch. On-resistance is determined by the lower of the voltages on the two (A or B) pins. ©2020-2021 Toshiba Electronic Devices & Storage Corporation 5 2021-03-11 Rev.2.0 TC7SB66CFU,TC7SB67CFU 10.3. AC Characteristics (Unless otherwise specified, T a = -40 to 85 �) Characteristics Output enable time Output disable time Symbol Note tPZL,tPZH tPLZ,tPHZ Test Condition VCC (V) Min Max Unit See Fig. 11.2.1, 11.2.2, Table 11.2.1 5.0 ± 0.5 � 4 ns 3.3 ± 0.3 � 6 See Fig. 11.2.1, 11.2.2, Table 11.2.1 2.5 ± 0.2 � 9 1.8 ± 0.15 � 18 5.0 ± 0.5 � 4.5 3.3 ± 0.3 � 7 2.5 ± 0.2 � 9 1.8 ± 0.15 � 18 10.4. AC Characteristics (Unless otherwise specified, T a = -40 to 125 �) Characteristics Output enable time Output disable time Symbol Note tPZL,tPZH tPLZ,tPHZ Test Condition VCC (V) Min Max Unit See Fig. 11.2.1, 11.2.2, Table 11.2.1 5.0 ± 0.5 � 6 ns 3.3 ± 0.3 � 8 See Fig. 11.2.1, 11.2.2, Table 11.2.1 2.5 ± 0.2 � 11 1.8 ± 0.15 � 20 5.0 ± 0.5 � 6.5 3.3 ± 0.3 � 9 2.5 ± 0.2 � 11 1.8 ± 0.15 � 20 10.5. Capacitive Characteristics (Note) (Unless otherwise specified, T a = 25 �) Characteristics Part Number Input capacitance (OE, OE) Switch terminal OFFcapacitance TC7SB66CFU Switch terminal ONcapacitance TC7SB66CFU Note: Symbol Note Test Condition VCC (V) Typ. Unit pF CIN VIN = 0 V 5.0 4 CI/O OE = GND, VI/O = 0 V 5.0 5 OE = VCC, VI/O = 0 V 5.0 5 OE = VCC, VI/O = 0 V 5.0 10 OE = GND, VI/O = 0 V 5.0 10 TC7SB67CFU CI/O TC7SB67CFU Parameter guaranteed by design. ©2020-2021 Toshiba Electronic Devices & Storage Corporation 6 2021-03-11 Rev.2.0 TC7SB66CFU,TC7SB67CFU Fig. 11.2.1 AC Test Circuit Table 11.2.1 Parameter for AC Test Circuit Parameter Switch tPLZ, tPZL 2 × VCC tPHZ, tPZH GND Fig. 11.2.2 AC Waveform t PLZ , t PHZ , t PZL , t PZH ©2020-2021 Toshiba Electronic Devices & Storage Corporation 7 2021-03-11 Rev.2.0 TC7SB66CFU,TC7SB67CFU 11. Rise and Fall Time (t r /t f ) The tr(out) and tf(out) values of the output signals are affected by the CR time constant of the input, which consists of the switch terminal capacitance (CI/O) and the on-resistance (RON) of the input. In practice, the tr(out) and tf(out) values are also affected by the circuit's capacitance and resistance components other than the capacitance of TC7SB66CFU, TC7SB67CFU The tr/tf(out) values can be approximated as follows. (Figure 12.1, Table 12.1 shows the test circuit.) tr/tf(out) (approx) = - (CI/O + CL) � (RDRIVE + RON) � ln (((VOH - VOL) - VM) / (VOH - VOL)) Where, RDRIVE is the output impedance of the previous-stage circuit. Calculation example: tr(out) (approx) = - (10 + 15) E - 12 � (120 + 4) � ln (((4.5 - 0) - 2.25) / (4.5 - 0)) = ≈2.1 ns Calculation conditions: VCC = 4.5 V, CL = 15 pF, RDRIVE = 120 Ω (output impedance of the previous IC), VM = 2.25 V (VCC/2) Output of the previous IC = digital (i.e., high-level voltage = VCC, low-level voltage = GND) Fig. 11.1 Table 12.1 Calculation Circuit Calculation Circuit Characteristics VCC = 5.0 ± 0.5 V VCC = 3.3 ± 0.3 V VCC = 2.5 ± 0.2 V VCC = 1.8 ± 0.15 V VM VCC/2 VCC/2 VCC/2 VCC/2 ©2020-2021 Toshiba Electronic Devices & Storage Corporation 8 2021-03-11 Rev.2.0 TC7SB66CFU,TC7SB67CFU 12. Characteristics Curves (Note) Fig. 12.1 Note: R ON - V IS (typ.) (T a = 25 �) The above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted. ©2020-2021 Toshiba Electronic Devices & Storage Corporation 9 2021-03-11 Rev.2.0 TC7SB66CFU,TC7SB67CFU Package Dimensions Unit: mm Weight: 0.006 g (typ.) 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