TLP554

TLP554 TOSHIBA PHOTOCOUPLER GaAlAs IRED & PHOTO-IC TLP554 ISOLATED LINE RECEIVER SIMPLEX/MULTIPLEX DATA TRANSMISSION COMPUTER-PERIPHERAL INTERFACE MICROPROCESSOR SYSTEM INTERFACES DIGITAL ISOLATION FOR A/D,D/A CONVERSION The TOSHIBA TLP554 a photocoupler which combines a GaAlAsIRED as the emitter and an integrated high gain, high speed photodetector. The output of the detector circuit is an open collector, Schottky Clamped transistor. A Faraday shield integrated on the photodetector chip reduces the effects of capacitive coupling between the input LED emitter and the high gain stages of the detector. This provides an effective common mode transient immunity of 1000V/us. Input Current Threshold Switching Speed Common mode transient immunity Guaranteed Performance Over Temperature Isolation Voltage UL Recognized : IF=5mA(Max.) : 10MBd(TYP,@NRZ) : ±1000V/us(Min) : 0~70°C : 2500Vrms(Min) :UL1577,File No.E67349 Unit: mm Truth Table (Positive Logic) INPUT H L H L ENABLE H H L L OUTPUT L H H H JEDEC TOSHIBA Weight: 0.54 g 11-10C4 SCHEMATIC IF 2＋ VF 3－ ICC IO 8 6 SHIELD IE 5 VCC VO PIN CONFIGURATION (TOP VIEW ) 1:NC 1 8 VCC 2 3 7 6 SHIELD GND 5 GND 4 7 VE 2:ANODE 3:CATHODE 4:N.C. 5:GND 6:VO(OUTPUT) 7:VE(ENABLE) 8:VCC A 0.1μF bypass capacitor must be connected Between pins 8 and 5.(See Note 1) 1 2007-10-01 TLP554 Recommended Operating Conditions CHARACTERISTIC Low Level input Voltage High Level input current Supply Voltage High-Level Enable Voltage Low-Level Enable Voltage Fan Out(TTL Load) Operating Temperature SYMBOL VFL IFH MIN. -3 6.3* 4.5 2.0 0 TYP. MAX. 1.0 20 5.5 VCC 0.8 8 70 UNIT V mA V V V ⎯ °C 0 ⎯ 5 ⎯ ⎯ ⎯ ⎯ VCC VEH VEL N Topr ⎯ 0 Note: Recommended operating conditions are given as a design guideline to obtain expected performance of the device. Additionally, each item is an independent guideline respectively. In developing designs using this product, please confirm specified characteristics shown in this document. *6.3mA condition permits at least 20% CTR degradation Initial switching threshold is 5.0mA or less. Absolute Maximum Ratings (Ta = 25°C) CHARACTERISTIC Forward Current Reverse Voltage Output Current DETECTOR Output Voltage Supply Voltage Enable Voltage Output Power Dissipation Storage Temperature Range Operating Temperature Range Lead Soldering Temperature (10 s) Isolation Voltage (AC, 1 minute, R.H.≤ 60%) (Note 4) (Note 5) (Note 2) (Note 3) SYMBOL IF VR IO VO VCC VE PO Tstg Topr Tsol BVS RATING 20 5 25 -0.5~7 7 5.5 40 −55~125 −40~85 260 2500 UNIT mA V mA V V V mW °C °C °C Vrms Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). (Note 1) The VCC supply voltage to each TLP554 isolator must be bypassed by a 0.1μF capacitor or larger.This can be either a ceramic or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package VCC and GND pins each device. 1 Minute Maximum. Not to exceed VCC by more than 500mV. 2mm below seating plane. Device considered a two-terminal device :Pins 1,2,3 and 4 shorted together,and Pins 5, 6,7 and 8 shorted together. (Note 2) (Note 3) (Note 4) (Note 5) LED 2 2007-10-01 TLP554 Electrical Characteristics (Ta = 0~70°C , VCC=4.5~5.5V , VFL≤1.0V) CHARACTERISTIC Forward Voltage Temperature Coefficient of Forward Voltage Input Reverse Current Input Capacitance SYMBOL VF ∆VF/∆Ta IR CT TEST CONDITION IF = 10 mA , Ta=25°C IF = 10 mA , VR=5V, Ta=25°C V = 0 , f = 1MHz , Ta=25°C VF = 1.0V VO = 5.5V VE = 2.0V Ta=0~70°C Ta=25°C ⎯ ⎯ ⎯ MIN. TYP.* 1.65 -2.0 ⎯ 45 10 0.5 MAX. 1.80 ⎯ 10 ⎯ 250 μA 10 UNIT V mV/°C μA pF ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ High-Level Output Current IOH Low-Level Output Voltage High Level input current High Level Supply Current Low Level High Level Enable Current Low Level High Level Enable Voltage Low Level Capacitance (Input-Output) Resistance (Input-Output) (*)All typ.values are at Ta=25°C VOL IFH ICCH ICCL IEH IEL VEH VEL CS RS IF=5mA , VE=2.0V , IOL=13mA IOL=13mA , VE=2.0V , VOL=0.6V IF=0mA IF=10mA VE=2.0V VCC=5.5V VE=0.5V 0.4 ⎯ 7 0.6 5 15 V mA VCC=5.5V VE=0.5V mA 12 -1.0 -1.6 ⎯ ⎯ 0.6 10 19 ⎯ -2.0 ⎯ 0.8 ⎯ ⎯ pF Ω V mA ⎯ ⎯ (Note 6) 2.0 ⎯ ⎯ 5×10 ⎯ ⎯ VS=0 , f=1MHz , Ta=25℃ VS=500V , Ta=25℃ , R.H. ≤60% 10 14 (Note 6) No pull up resistor required as the device has an internal pull up resistor. 3 2007-10-01 TLP554 Switching Characteristics (Ta = 25°C , VCC=5V) CHARACTERISTIC Propagation Delay Time Output Rise Time(10-90%) Output Fall Time(10-90%) Enable Propagation Delay Time Common Mode Transient Immunity at Hight Level Outout Common Mode Transient Immunity at Low Level Outout L→H H→L SYMBOL tpLH tpHL tr tf tELH tEHL CMH TEST CIRCUIT TEST CONDITION RL=350Ω IF=7.5→0mA IF=0→7.5mA MIN. TYP. 60 60 30 30 25 25 10000 MAX. 120 120 UNIT ns ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 1000 1 CL=15pF IF=7.5→0 / 0→7.5mA RL=350Ω, CL=15pF ⎯ ⎯ ⎯ ⎯ ⎯ ns 2 RL=350Ω CL=15pF IF=7.5 mA VCM=400V VE=0.5→3.0V VE=3.0→0.5V IF=0mA VO(Min)=2.0V ns 3 CML RL=350Ω IF=7.5mA (Note 7) VO(Max)=0.8V -1000 -10000 V/μs ⎯ (Note 7) CMHּThe maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high state(i.e.,VOUT>2.0V) CMLּThe maximum tolerable rate of fall of the common mode voltage to ensure the output will remain in the low output state(i.e.,VOUT