DCM™ DC-DC Converter
DCM2322xA5N13A2y6z
S
®
US
C
C
NRTL
US
Isolated, Regulated DC Converter
Features & Benefits
Product Ratings
• Isolated, regulated DC-DC converter
• Up to 120 W, 10.00 A continuous
• 90.4% peak efficiency
• 532 W/in3 Power density
VIN = 43 V to 154 V
POUT = 120 W
VOUT = 12.0 V
(7.2 V to 13.2 V Trim)
IOUT = 10.00 A
Product Description
• Wide input range 43 – 154 Vdc
The DCM2322 is a lower power, isolated and regulated DC-DC
converter that operates from an unregulated, wide-range input
to generate an isolated 12.0 Vdc output. With its high-frequency
zero-voltage switching (ZVS) topology, the DCM2322 converter
consistently delivers high efficiency across the input line range.
Modular DCM converters and downstream DC-DC products
support efficient power distribution, providing superior power
system performance and connectivity from a variety of
unregulated power sources to the point-of-load.
• Safety Extra Low Voltage (SELV) 12.0 V Nominal Output
• 3000 Vdc isolation
• ZVS high frequency switching
n Enables low-profile, high-density filtering
• Dual modes of operation:
n Array mode
– Up to 8 units – 960 W
– No power derating needed
– Sharing strategy permits dissimilar line voltages
across an array
n Enhanced VOUT regulation mode
– Standalone: 120 W
Leveraging the thermal and density benefits of Vicor’s ChiP
packaging technology, the DCM2322 offers flexible thermal
management options with very low top and bottom side
thermal impedances. Thermally adept ChiP based power
components enable customers to quickly and predictably
achieve cost effective power system solutions.
• Fully operational current limit
• OV, OC, UV, short circuit and thermal protection
• 2322 through-hole ChiP™ package
n 0.978” x 0.898” x 0.284”
(24.84 mm x 22.8 mm x 7.21 mm)
Typical Applications
•
•
•
•
Rail Transportation
Defense / Aerospace
Industrial
Process Control
Part Ordering Information
Product
Function
DCM
DCM =
DC-DC
Converter
Package
Size
23
22
mm
Package
Type
Max
Input
Voltage
Range
Ratio
Max
Output
Voltage
Max
Output
Power
Temperature
Grade
Option
x
A5
N
13
A2
y
6z
T=
Through hole
ChiPs
Internal Reference
DCM™ DC-DC Converter
Rev 1.3
Page 1 of 31
01/2020
T = -40°C to 125°C
M = -55°C to 125°C
60 = Array and
Enhanced VOUT Regultion
Modes / Analog Control
Interface Version
DCM2322xA5N13A2y6z
Typical Applications
Rb
Cb1
Cb2
DCM1
TR
EN
EMI_GND
F1_1
L1_1
VIN
CY
+IN
C1_1
Rd_1
Lb_1
Rdm_1
FT
CY
+OUT
RCOUT-EXT_1
CIN
Cd_1
L2_1
–IN
C2_1
COUT-EXT_1
–OUT
C3
C4
Load
CY
CY
Rb
Rb
Cb1
Cb2
Cb1
Cb2
DCM2
TR
EN
F1_2
L1_2
CY
+IN
C1_2
Rd_2
RCOUT-EXT_2
–IN
C2_2
COUT-EXT_2
–OUT
CY
CY
≈≈
L2_2
+OUT
CIN
Cd_2
Lb_2
Rdm_2
FT
CY
Rb
Rb
Cb1
Cb2
Cb1
Cb2
≈≈
DCM4
TR
EN
F1_4
L1_4
CY
+IN
C1_4
Rd_4
L2_4
+OUT
RCOUT-EXT_4
CIN
Cd_4
Lb_4
Rdm_4
FT
CY
–IN
COUT-EXT_4
–OUT
C2_4
CY
CY
Rb
Cb1
Cb2
Note: CIN, Rb, Cb1 and Cb2 are required components for proper operation of the DCM. See required components table below.
DCM2322xA5N13A2y6z in an array of four units; applicable when DCM is operating in Array Mode
Required Components
CIN
TDK C5750X7T2E225M250KA, 2.2 µF, 250 V
Rb
Generic 1 Ω, 1/4 W
Cb1 , Cb2
KEMET C1812C103KGRACTU, 10,000 pF, 2000 V
DCM™ DC-DC Converter
Rev 1.3
Page 2 of 31
01/2020
DCM2322xA5N13A2y6z
Typical Applications (Cont.)
Cb1
Rb
Cb2
DCM1
TR
EN
EMI_GND
FT
F1_1
T1_1
VIN
Rd_1
C1_1
Rdm_1
CY
CY
+IN
+OUT
–IN
–OUT
L2_1
RCOUT-EXT_1
CIN
Cd_1
Lb_1
C2_1
COUT-EXT_1
CY
C3
C4
Load
CY
Rb
Rb
Cb2
Cb2
Cb1
Cb2
DCM2
TR
EN
Rdm_2
FT
CY
F1_2
CY
T1_2
Rd_2
C1_2
+IN
+OUT
–IN
–OUT
RCOUT-EXT_2
CIN
Cd_2
Lb_2
L2_2
C2_2
COUT-EXT_2
CY
CY
≈≈
Rb
Rb
Cb1
Cb2
Cb1
Cb2
≈≈
DCM8
TR
EN
CY
T1_8
+IN
Rd_8
C1_8
+OUT
Lb_8
Rdm_8
FT
CY
F1_8
L2_8
RCOUT-EXT_8
CIN
C2_8
COUT-EXT_8
Cd_8
–IN
–OUT
CY
CY
Rb
Cb1
Cb2
Note: CIN, Rb, Cb1 and Cb2 are required components for proper operation of the DCM. See required components table on page 2.
Parallel operation of DCMs with common mode chokes installed on the input side to suppress common mode noise; applicable when DCM
is operating in Array Mode
Rb
Cb1
Cb2
DCM
TR
EN
EMI_GND
FT
F1
VIN
CY
L1
CY
+IN
C1
Rd
RCOUT-EXT
COUT-EXT
–OUT
–IN
CY
CY
Rb
Cb1
Cb2
Load 1
Lb
L2
+OUT
CIN
Cd
Rdm
C2
Non-isolated
Point-of-Load
Regulator
Load 2
Note: CIN, Rb, Cb1 and Cb2 are required components for proper operation of the DCM. See required components table on page 2.
Single DCM2322xA5N13A2y6z, to a non-isolated regulator, and direct to load
DCM™ DC-DC Converter
Rev 1.3
Page 3 of 31
01/2020
DCM2322xA5N13A2y6z
Pin Configuration
TOP VIEW
1
+IN A
2
A’ +OUT
B’ –OUT
TR B
EN C
C’ +OUT
FT D
–IN E
D’ –OUT
DCM ChiP™
Pin Descriptions
Pin
Number
Signal Name
Type
A1
+IN
INPUT POWER
B1
TR
INPUT
Enables and disables trim functionality. Adjusts output voltage when trim active.
C1
EN
INPUT
Dual function:
1. Enables either Array or Enhanced VOUT Regulation mode
2. Enables and disables power supply
D1
FT
OUTPUT
E1
-IN
INPUT POWER
RETURN
Negative input power terminal
A’2, C’2
+OUT
OUTPUT POWER
Positive output power terminal
B’2, D’2
-OUT
OUTPUT POWER
RETURN
Negative output power terminal
Function
Positive input power terminal
Fault monitoring
DCM™ DC-DC Converter
Rev 1.3
Page 4 of 31
01/2020
DCM2322xA5N13A2y6z
Absolute Maximum Ratings
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device.
Electrical specifications do not apply when operating beyond rated operating conditions.
Parameter
Comments
Min
Max
Unit
-0.5
175.0
V
-1
1
V/µs
TR to –IN
-0.3
3.5
V
EN to –IN
-0.3
3.5
V
-0.3
3.5
V
5
mA
15.8
V
Input Voltage (+IN to –IN)
Input Voltage Slew Rate
FT to –IN
Output Voltage (+OUT to –OUT)
Dielectric withstand (input to output)
-0.5
Supplementary insulation
3000
Vdc
T-Grade
-40
125
°C
M-Grade
-55
125
°C
T-Grade
-40
125
°C
M-Grade
-65
125
°C
16.0
A
Internal Operating Temperature
Storage Temperature
Average Output Current
Figure 1 — Thermal Specified Operating Area: Max Output Power vs. Case Temp, Single unit at minimum full load efficiency
Figure 2 — Electrical Specified Operating Area: Array Mode
Figure 3 — Electrical Specified Operating Area: Enhanced VOUT
Regulation Mode
DCM™ DC-DC Converter
Rev 1.3
Page 5 of 31
01/2020
DCM2322xA5N13A2y6z
Common Electrical Specifications: Array and Enhanced VOUT Regulation Modes
Specifications apply over all line, trim and load conditions, internal temperature TINT = 25ºC, unless otherwise noted. Boldface specifications apply over the
temperature range of -40°C < TINT < 125°C for T-Grade and -55°C < TINT < 125°C for M-grade.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
43
100
154
V
Power Input Specification
Input voltage range
Inrush current (peak)
VIN
Continuous operation
IINRP
With maximum COUT-EXT, full resistive load
6.0
A
Input capacitance (internal)
CIN-INT
Effective value at nominal input voltage
1.3
µF
Input capacitance (internal) ESR
RCIN-INT
At 1 MHz
2.68
mΩ
Input inductance (external)
LIN
Differential mode, with no further line bypassing
1
µH
0.8
W
1.0
W
3.5
W
3.5
W
No Load Specification
Nominal line, see Fig. 4
Input power – disabled
PQ
0.6
Worst case line, see Fig. 4
Nominal line, see Fig. 5
Input power – enabled with no load
PNL
2.0
Worst case line, see Fig. 5
Power Output Specification
Output voltage set point
Rated output voltage trim range
VOUT-NOM
VIN = 100 V, nominal trim, at 100% Load, TINT = 25°C
11.94
12.0
12.06
V
VOUT-TRIMMING
Specifies the Low, Nominal and High Trim conditions.
• Array Mode: trim range over temp at full load
• Enhanced VOUT Regultion Mode: trim range over
temp, with > 10% rated load
7.2
12.0
13.2
V
Rated output power
POUT
Rated output current
IOUT
Continuous, VOUT ≥ 12.0 V
Continuous, VOUT ≤ 12.0 V
Output current limit
IOUT-LM
Of rated IOUT max. Fully operational current limit, for
nominal trim and below
Current limit delay
tIOUT-LIM
The module will power limit in a fast transient event
Efficiency
η
%
1
ms
90.4
%
82.2
%
Output capacitance (internal) ESR
RCOUT-INT
At 1 MHz
Output capacitance (external)
COUT-EXT
Output capacitance (external)
COUT-EXT-TRANS
RCOUT-EXT
140
50% load, over rated line, temperature and trim
Effective value at nominal output voltage
Output capacitance, ESR (ext.)
120
%
COUT-INT
ITRAN_MIN
100
84.8
Output capacitance (internal)
Minimum Transient Load
A
Full load, over line and temperature, nominal trim
VOUT-PP
COUT-EXT-
10.00
88.3
Output voltage ripple
TRANS-TRIM
W
Full load, nominal line, nominal trim
20 MHz bandwidth. At nominal trim, minimum COUT-EXT and
at least 10 % rated load
Output capacitance (external)
120
Excludes component temperature coefficient For load
transients that remain > 10% rated load
Excludes component temperature coefficient For load
transients down to ITRAN_MIN rated load, with static trim
Excludes component temperature coefficient For load
transients down to ITRAN_MIN rated load, with dynamic trimming
Minimum required load for proper operation of DCM during
load transient conditions
At 10 kHz, excludes component tolerances
DCM™ DC-DC Converter
Rev 1.3
Page 6 of 31
01/2020
304
mV
170
µF
0.171
mΩ
500
10000
µF
4700
10000
µF
6800
10000
µF
0
%
10
mΩ
DCM2322xA5N13A2y6z
Common Electrical Specifications (Cont.): Array and Enhanced VOUT Regulation Modes
Specifications apply over all line, trim and load conditions, internal temperature TINT = 25ºC, unless otherwise noted. Boldface specifications apply over the
temperature range of -40°C < TINT < 125°C for T-Grade and -55°C < TINT < 125°C for M-grade.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
40
ms
Power Output Specifications (Cont.)
Initialization delay
tINIT
See state diagram
25
Output turn-on delay
tON
From rising edge EN, with VIN pre-applied.
See timing diagram
200
Output turn-off delay
tOFF
From falling edge EN. See timing diagram
tSS
At full rated resistive load. Typ spec is 1-up with min
COUT-EXT. Max spec is for arrays with max COUT-EXT
Soft start ramp time
VOUT threshold for max
rated load current
IOUT at startup
Monotonic soft-start threshold
voltage
Minimum required disabled duration
Minimum required disabled duration
for predictable restart
Voltage deviation (transient)
Settling time
VOUT-FL-THRESH
IOUT-START
VOUT-MONOTONIC
100
During startup, VOUT must achieve this threshold before
output can support full rated current
Max load current at startup while VOUT
is below VOUT-FL_THRESH
Output voltage rise becomes monotonic with 10% of
preload once it crosses VOUT-MONOTONIC
µs
600
µs
200
ms
6.0
V
1.00
A
6.0
V
tOFF-MIN
This refers to the minimum time a module needs to be
in the disabled state before it will attempt to start via EN
2
ms
tOFF-MONOTONIC
This refers to the minimum time a module needs to be in
the disabled state before it is guaranteed to exhibit
monotonic soft-start and have predictable startup timing
100
ms
%VOUT-TRANS
tSETTLE
Minimum COUT_EXT (10 ↔ 90% load step),
excluding load line.
20% of full load and ambient temperature
• Full load and over temperature
All other conditions
(does not include light load regulation)
The total output voltage set-point accuracy from the
calculated VOUT based on load, temp and trim.
Excludes:
• ΔVOUT-LL
• %VOUT-REGULATION
0% to 10% load, additional VOUT relative to VOUT
accuracy; see Design Guidelines section
DCM™ DC-DC Converter
Rev 1.3
Page 8 of 31
01/2020
-0.5
0.5
-1.0
1.0
-1.5
1.5
-2.0
2.0
%
-0.18
1.58
V
%
DCM2322xA5N13A2y6z
Signal Specifications
Specifications apply over all line, trim and load conditions, internal temperature TINT = 25ºC, unless otherwise noted. Boldface specifications apply over the
temperature range of -40°C < TINT < 125°C for T-Grade and -55°C < TINT < 125°C for M-grade.
Trim: TR
• The TR pin enables and disables trim functionality when VIN is initially applied to the DCM converter.
When Vin first crosses VIN-UVLO+, the voltage on TR determines whether or not trim is active.
• If TR is not floating at power up and has a voltage less than TR trim enable threshold, trim is active.
• If trim is active, the TR pin provides dynamic trim control with at least 30Hz of -3dB control bandwidth over the output voltage of the DCM converter.
• The TR pin has an internal pull-up to VCC and is referenced to the -IN pin of the converter.
SIGNAL TYPE
DIGITAL
INPUT
ANALOG
INPUT
STATE
ATTRIBUTE
SYMBOL
MIN
NOM
MAX
UNIT
3.20
V
TR trim disable threshold
VTRIM-DIS-TH
TR trim enable threshold
VTRIM-EN-TH
Trim enabled when TR below this threshold
at power up
Internally generated VCC
VCC
3.21
3.30
3.39
V
TR pin functional range
VTRIM-EN
0.00
2.44
3.16
V
VOUT referred TR
pin resolution
VOUT-RES
TR internal pull up
resistance to VCC
RTRIIM-INT
Startup
Operational
with Trim
enabled
CONDITIONS / NOTES
Trim disabled when TR above this threshold
at power up
3.15
V
With VCC = 3.3 V
15
9.9
10.0
mV
10.1
kΩ
MAX
UNIT
2.31
V
Enable: EN
• Dual Function:
– The EN pin enables either the Array mode or Enhanced VOUT Regulation mode based on the voltage level on EN pin during start up.
– The EN pin enables and disables the DCM converter; when held low the unit will be disabled.
• The EN pin has an internal pull-up to VCC and is referenced to the -IN pin of the converter.
SIGNAL TYPE
STATE
ATTRIBUTE
Any
CONDITIONS / NOTES
MIN
NOM
VENABLE-EN-TH
EN disable threshold
VENABLE-DIS-TH
0.99
VCC
3.21
3.30
3.39
V
RENABLE-INT
9.9
10.0
10.1
kΩ
VARRAY-EN-TH
2.97
Internally generated VCC
DIGITAL
INPUT
SYMBOL
EN enable threshold
EN internal pull up
resistance to VCC
Array mode
enable threshold
Enhanced VOUT Regulation
mode enable threshold
V
V
VREG-EN-TH
2.63
V
Fault: FT
• The FT pin is a Fault flag pin.
• When the module is enabled and no fault is present, the FT pin does not have current drive capability.
• Whenever the powertrain stops (due to a fault protection or disabling the module by pulling EN low), the FT pin output Vcc and provides current to drive
an external ciruit.
• When module starts up, the FT pin is pulled high to VCC during microcontroller initialization and will remain high until soft start process starts.
SIGNAL TYPE
STATE
Any
DIGITAL
OUTPUT
ATTRIBUTE
FT internal pull up
resistance to VCC
FT voltage
FT Active
FT current drive capability
FT response time
SYMBOL
CONDITIONS / NOTES
RFAULT-INT
VFAULT-ACTIVE
IFAULT-ACTIVE
tFT-ACTIVE
At rated current drive capability
Over-load beyond the ABSOLUTE MAXIMUM
ratings may cause module damage
Delay from cessation of switching to
FT Pin Active
DCM™ DC-DC Converter
Rev 1.3
Page 9 of 31
01/2020
MIN
NOM
MAX
UNIT
494
499
504
kΩ
3.0
V
4
mA
200
µs
DCM2322xA5N13A2y6z
High Level Functional State Diagram
Conditions that cause state transitions are shown along arrows. Sub-sequence activities listed inside the state bubbles.
Application of
VIN
VIN > VIN-INIT
EN = False
tMIN-OFF delay
NON LATCHED
FAULT
tOFF
ult
Fa oved
m
Re
Powertrain: Stopped
FT = True
tINIT delay
Powertrain: Stopped
FT = True
EN = False
tOFF-MIN delay
STANDBY
Powertrain: Stopped
FT = True
EN = True and
No Faults
tON delay
EN = False
tOFF delay
SOFT START
VOUT Ramp Up
tss delay
Powertrain: Active
FT = Unknown
or
LO
V
O VLO
ut
Inp put U
In
REGULATION
MODE
SELECTION
tSS
Expiry
Latched
Ou
(based on EN voltage)
tpu
tO
VP
Only applies
after initialization
sequence
Fault Removed
Powertrain: Active
FT = False
P
Powertrain: Stopped
FT = True
Regulates VOUT
Output OV
or
mp
r-te
P
Ove put UV
Out
REINITIALIZATION
SEQUENCE
tINIT delay
RUNNING
Ov
e
Ou r-tem
tpu
p
t U or
VP
VIN ≥ VIN-UVLO+ and
not Over-temp
TR mode latched
Input OVLO or
Input UVLO
INITIALIZATION
SEQUENCE
NON LATCHED
FAULT
tFAULT
Powertrain: Stopped
FT = True
LATCHED
FAULT
EN = False
DCM™ DC-DC Converter
Rev 1.3
Page 10 of 31
01/2020
Powertrain: Stopped
FT = True
Output
Input
DCM™ DC-DC Converter
Rev 1.3
Page 11 of 31
01/2020
FT
ILOAD
IOUT
FULL LOAD
VOUT
VOUT-UVP
VOUT-NOM
FULL LOAD
TR
VTRIM-DIS-TH
EN
VREG-EN-TH
VARRAY-EN-TH
VIN
VIN-UVLO+/VIN-INIT
VIN-OVLO+/-
tINIT
tON
1
Input Power On
- Trim Inactive
tSS
tOFF
tMIN_OFF
4
EN
Latched
2
3
5
Ramp to TR
EN
Full Load Ignored
Low
tSS
tON
6
EN
High
tOFF
7
Input
OVLO
tSS
tOFF
8
Input
UVLO
tSS
tOFF
9
Input
returned
to zero
DCM2322xA5N13A2y6z
Timing Diagrams – Array Mode
Module Inputs are shown in blue; Module Outputs are shown in brown.
Output
Input
DCM™ DC-DC Converter
Rev 1.3
Page 12 of 31
01/2020
FT
ILOAD
FULL LOAD
IOUT
VOUT
VOUT-UVP
VOUT-NOM
FULL LOAD
TR
VTR = nom
VTRIM-EN-TH
EN
VARRAY-EN-TH
VIN
VIN-UVLO+/VIN-INIT
VIN-OVLO+/-
tINIT
tON
10
Input Power On
- Trim Active
tSS
VOUT-OVP
11
Vout
based on
VTR
tOFF
12
Load dump
and reverse
current
tINIT
tON
tSS
13
Vout OVP
(primary
sensed)
14
Latched
fault cleared
RLOAD
tIOUT-LIM
15
Current Limit
with Resistive
Load
tFAULT
16
Resistive
Load with
decresing R
tINIT
17
Overload induced
Output UVP
tON
tSS
DCM2322xA5N13A2y6z
Timing Diagrams – Array Mode (Cont.)
Module Inputs are shown in blue; Module Outputs are shown in brown.
Output
Input
DCM™ DC-DC Converter
Rev 1.3
Page 13 of 31
01/2020
FT
ILOAD
IOUT
FULL LOAD
VOUT
VOUT-UVP
VOUT-NOM
FULL LOAD
TR
VTR-DIS
EN
VREG-EN
VARRAY-EN
VIN
VIN-UVLO+/VIN-INIT
VIN-OVLO+/-
tINIT
tON
1
Input Power On
- Trim Inactive
tSS
2
3
Ramp to TR
Full Load Ignored
tOFF
tMIN_OFF
5
EN
Low
4
EN
Latched
tSS
tON
6
EN
High
tOFF
7
Input
OVLO
tSS
tOFF
8
Input
UVLO
tSS
tOFF
9
Input
returned
to zero
DCM2322xA5N13A2y6z
Timing Diagrams – Enhanced VOUT Regulation Mode
Module Inputs are shown in blue; Module Outputs are shown in brown.
Output
Input
DCM™ DC-DC Converter
Rev 1.3
Page 14 of 31
01/2020
FT
ILOAD
FULL LOAD
IOUT
VOUT
VOUT-UVP
VOUT-NOM
FULL LOAD
TR
VTR = nom
VTRIM-EN-TH
EN
VIN
VIN-UVLO+/VIN-INIT
VIN-OVLO+/-
tINIT
tON
10
Input Power On
- Trim Active
tSS
OUT-OVP
11
Vout
based on
VTR
tOFF
12
Load dump
and reverse
current
tINIT
tON
tSS
13
Vout OVP
(primary
sensed)
14
Latched
fault cleared
RLOAD
tIOUT-LIM
15
Current Limit
with Resistive
Load
tFAULT
16
Resistive
Load with
decresing R
tINIT
17
Overload induced
Output UVP
tON
tSS
DCM2322xA5N13A2y6z
Timing Diagrams – Enhanced VOUT Regulation Mode (Cont.)
Module Inputs are shown in blue; Module Outputs are shown in brown.
DCM2322xA5N13A2y6z
Common Typical Performance Characteristics: Array and Enhanced VOUT Regulation Modes
The following figures present typical performance at TC = 25ºC, unless otherwise noted. See associated figures for general trend data.
Unless otherwise specified, figures are applicable for both modes of operation
Figure 7 — Full Load Efficiency vs. VIN, at nominal trim
Figure 6 — Full Load Efficiency vs. VIN, at low trim
Figure 5 — No load power dissipation vs. VIN, at nominal trim
Figure 4 — Disabled power dissipation vs. VIN
Figure 8 — Full Load Efficiency vs. VIN, at high trim
DCM™ DC-DC Converter
Rev 1.3
Page 15 of 31
01/2020
DCM2322xA5N13A2y6z
Common Typical Performance Characteristics (Cont.): Array and Enhanced VOUT Regulation Modes
The following figures present typical performance at TC = 25ºC, unless otherwise noted. See associated figures for general trend data.
Figure 10 — Efficiency and power dissipation vs.load at
TCASE = 25°C, nominal trim
Figure 9 — Efficiency and power dissipation vs.load at
TCASE = -40°C,nominal trim
Unless otherwise specified, figures are applicable for both modes of operation
Figure 12 — Effective internal input capacitance vs. applied voltage
Figure 11 — Efficiency and power dissipation vs.load at
TCASE = 90°C, nominal trim
Figure 13 — Nominal powertrain switching frequency vs. load,
at nominal trim
Figure 14 — Nominal powertrain switching frequency vs. load,
at nominal VIN
DCM™ DC-DC Converter
Rev 1.3
Page 16 of 31
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DCM2322xA5N13A2y6z
Common Typical Performance Characteristics (Cont.): Array and Enhanced VOUT Regulation Modes
The following figures present typical performance at TC = 25ºC, unless otherwise noted. See associated figures for general trend data.
Unless otherwise specified, figures are applicable for both modes of operation
Figure 15 — Output voltage ripple, VIN = 100 V,
VOUT = 12.0 V, COUT_EXT = 500 µF, RLOAD = 1.200 Ω
Figure 16 —Startup from EN, VIN = 100 V, COUT_EXT = 10000 µF,
RLOAD = 1.200 Ω
DCM™ DC-DC Converter
Rev 1.3
Page 17 of 31
01/2020
DCM2322xA5N13A2y6z
Typical Performance Characteristics: Array Mode Only
The following figures present typical performance at TC = 25ºC, unless otherwise noted. See associated figures for general trend data.
Figure 17 — Ideal VOUT vs. load current, at 25°C case
Figure 18 — Ideal VOUT vs. case temperature, at full load
Figure 19 — 100% to 10% load transient response, VIN = 100 V,
Figure 20 — 10% to 100% load transient response, VIN = 100 V,
nominal trim, COUT_EXT = 500 µF
nominal trim, COUT_EXT = 500 µF
DCM™ DC-DC Converter
Rev 1.3
Page 18 of 31
01/2020
DCM2322xA5N13A2y6z
Typical Performance Characteristics: Enhanced VOUT Regulation Mode Only
The following figures present typical performance at TC = 25ºC, unless otherwise noted. See associated figures for general trend data.
Figure 21 — Ideal VOUT vs. load current, at 25°C case, operating in
Enhanced VOUT Regulation Mode
DCM™ DC-DC Converter
Rev 1.3
Page 19 of 31
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DCM2322xA5N13A2y6z
General Characteristics
Specifications apply over all line, trim and load conditions, internal temperature TINT = 25ºC, unless otherwise noted. Boldface specifications apply over the
temperature range of -40°C < TINT < 125°C for T-Grade and -55°C < TINT < 125°C for M-grade.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Mechanical
Length
L
24.46/[0.963]
24.84/[0.978]
25.22/[0.993]
mm/[in]
Width
W
22.67/[0.893]
22.8/[0.898]
22.93/[0.903]
mm/[in]
Height
H
7.11/[0.28]
7.21/[0.284]
7.31/[0.288]
mm/[in]
Volume
Vol
Weight
W
Lead finish
No heat sink
4.08/[0.25]
cm3/[in3]
14.4/[0.51]
g/[oz]
Nickel
0.51
2.03
Palladium
0.02
0.15
Gold
0.003
0.051
T-Grade
-40
125
M-Grade
-55
125
µm
Thermal
Operating internal temperature
Thermal resistance top side
Thermal resistance leads
Thermal resistance bottom side
TINT
θINT-TOP
θINT-LEADS
θINT-BOTTOM
°C
Estimated thermal resistance to maximum
temperature internal component from
4.20
°C/W
8.30
°C/W
4.50
°C/W
10.3
Ws/°C
isothermal top
Estimated thermal resistance to
maximum temperature internal
component from isothermal leads
Estimated thermal resistance to
maximum temperature internal
component from isothermal bottom
Thermal capacity
Assembly
Storage temperature
TST
HBM
ESD rating
CDM
T-Grade
-40
125
M-Grade
-65
125
°C
Method per Human Body Model Test
ESDA/JEDEC JDS-001-2012
Charged Device Model JESD22-C101E
CLASS 1C
V
CLASS 2
Soldering [1]
Peak temperature top case
[1]
For further information, please contact
factory applications
Product is not intended for reflow solder attach.
DCM™ DC-DC Converter
Rev 1.3
Page 20 of 31
01/2020
135
°C
DCM2322xA5N13A2y6z
General Characteristics (Cont.)
Specifications apply over all line, trim and load conditions, internal temperature TINT = 25ºC, unless otherwise noted. Boldface specifications apply over the
temperature range of -40°C < TINT < 125°C for T-Grade and -55°C < TINT < 125°C for M-grade.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Safety
Dielectric Withstand Test
VHIPOT
IN to OUT
3000
Vdc
IN to CASE
1500
Vdc
OUT to CASE
1500
Vdc
Reliability
MIL-HDBK-217 FN2 Parts Count 25°C
Ground Benign, Stationary, Indoors /
MTBF
3.84
MHrs
8.95
MHrs
Computer
Telcordia Issue 2, Method I Case 3, 25°C,
100% D.C., GB, GC
Agency Approvals
cTÜVus,
Agency approvals/standards
cURus,
CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable
Previous Part Number
NOT APPLIED
DCM™ DC-DC Converter
Rev 1.3
Page 21 of 31
01/2020
DCM2322xA5N13A2y6z
Selecting Array Mode or Enhanced VOUT Regulation Mode
Pin Functions
+IN, -IN
Input power pins. -IN is the reference for all control pins, and therefore
a Kelvin connection for the control signals is recommended as close as
possible to the pin on the package, to reduce effects of voltage drop due
to -IN currents.
The EN pin can also be used to select Array mode operation or
Enhanced VOUT Regulation mode operation. The DCM mode of
operation is dependent on the voltage seen by the DCM at its EN pin at
first start up following application of VIN. The DCM will latch in selected
mode of operation at the end of soft start, and persist in that same
mode until loss of input voltage.
At the first start up after application of VIN, if EN is allowed to float to:
n A value above VENABLE-EN-TH, but below VREG-EN-TH, the DCM will
+OUT, -OUT
Output power pins.
implement Enhanced VOUT Regulation mode.
n A value above VARRAY-EN-TH and up to VCC, the DCM will implement
EN (Enable)
array mode operation.
The EN pin provides two functionalities:
n Enables and disables the DCM converter.
n Selects Array mode or Enhanced VOUT Regulation mode.
The EN pin is referenced to the –IN pin of the converter. It has an
internal pull up to VCC through a 10kΩ resistor.
EN is an input only, it does not pull low in the event of a fault.
Enable/Disable Control
n Output disable: when EN is pulled down externally below the
disable threshold (VENABLE-DIS-TH), the DCM converter will
be disabled.
n Output enable: when EN is allowed to pull up above the enable
threshold (VENABLE-EN-TH) through the internal pull up to VCC,
the DCM converter will be enabled.
Note that the selected mode of operation is not changed when a DCM
recovers from any fault condition, or after a disable event through EN.
The operation mode is reset only with cycling of input power.
TR (Trim)
The TR pin is used to select the trim mode and to trim the output
voltage of the DCM converter. The TR pin has an internal pull-up to VCC
through a 10.0 kΩ resistor.
The DCM will latch trim behavior at application of VIN (once VIN
exceeds VIN-UVLO+), and persist in that same behavior until loss of
input voltage.
n At application of VIN, if the voltage on TR is sampled at above
VTRIM-DIS-TH, the module will latch in a non-trim mode, and will
ignore the TR input for as long as VIN is present.
n At application of VIN, if the voltage on TR is sampled at below
VTRIM-EN-TH, the TR will serve as an input to control the real time
output voltage, relative to full load, 25°C. It will persist in this
behavior until VIN is no longer present.
VCC
Array Mode
VARRAY-EN-TH
VREG-EN-TH
Enhanced VOUT Regulation Mode
VENABLE-EN-TH
If trim is active when the DCM is operating, the TR pin provides
dynamic trim control at a typical 30 Hz of -3dB bandwidth over the
output voltage. TR also decreases the current limit threshold when
trimming above VOUT-NOM.
FT (Fault)
The FT pin provides a Fault signal.
Disable
Anytime the module is enabled and has not recognized a fault, the FT
pin is inactive. FT has an internal 499 kΩ pull-up to VCC, therefore a
shunt resistor, RSHUNT, of approximately 50 kΩ can be used to ensure the
LED is completly off when there is no fault, per the diagram below.
Figure 22 — EN pin voltage thresholds
Whenever the powertrain stops (due to a fault protection or disabling
the module by pulling EN low), the FT pin becomes active and provides
current to drive an external circuit.
VENABLE-DIS-TH
When active, FT pin drives to VCC, with up to 4 mA of external loading.
Module may be damaged from an over-current FT drive, thus a resistor
in series for current limiting is recommended.
The FT pin becomes active momentarily when the module starts up.
DCM™ DC-DC Converter
Rev 1.3
Page 22 of 31
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DCM2322xA5N13A2y6z
Typical External Circuits for Signal Pins (TR, EN, FT)
DCM
VCC
10kΩ
10kΩ
Output Voltage
Reference, Current
Limit Reference and
Soft Start control
Soft Start and
Fault Monitoring
TR
EN
RTRIM
499kΩ
Fault
Monitoring
FT
RSERIES
SW
RSHUNT
D
Kelvin –IN connection
Nominal Output Voltage Load Line
Design Guidelines
DCM in Array Mode
Building Blocks and System Design
The DCM™ converter input accepts the full 43 to 154 V range, and it
generates an isolated trimmable 12.0 Vdc output. Multiple DCMs may
be paralleled in array mode of operatioin for higher power capacity via
wireless load sharing, even when they are operating off of different
input voltage supplies.
The DCM converter provides a regulated output voltage around defined
nominal load line and temperature coefficients. The load line and
temperature coefficients enable configuration of an array of DCM
converters which manage the output load with no share bus among
modules. Downstream regulators may be used to provide tighter
voltage regulation, if required.
The DCM2322xA5N13A2y6z may be used in standalone applications
where the output power requirements are up to 120 W or applicaions
requires tighter voltage regultion. However, it is easily deployed as
arrays of modules to increase power handling capacity. Arrays of up to
eight units have been qualified for 960 W capacity. Application of DCM
converters in an array requires no derating of the maximum available
power versus what is specified for a single module.
Note: For more information on operation of single DCM, refer to “Single
DCM as an Isolated, Regulated DC-DC Converter” application note
AN:029.
Soft Start
Throughout this document, the programmed output voltage, (either
the specified nominal output voltage if trim is inactive or the trimmed
output voltage if trim is active), is specified at full load, and at room
temperature. The actual output voltage of the DCM is given by the
programmed trimmed output voltage, with modification based on load
and temperature. The nominal output voltage is 12.0 V, and the actual
output voltage will match this at full load and room temperature with
trim inactive.
The largest modification to the actual output voltage compared to the
programmed output is due to the 5.263% VOUT-NOM load line, which for
this model corresponds to ΔVOUT-LOAD of 0.6316V. As the load is reduced,
the internal error amplifier reference, and by extension the output
voltage, rises in response. This load line is the primary enabler of the
wireless current sharing amongst an array of DCMs.
The load line impact on the output voltage is absolute, and does not
scale with programmed trim voltage.
For a given programmed output voltage, the actual output voltage
versus load current at for nominal trim and room temperature is given
by the following equation:
VOUT @ 25° = 12.0 + 0.6316 • (1 - IOUT / 10.00)
(1)
Use 0 V for ∆VOUT-LL when load is above 10% of rated load. See section on
light load boosting operation for light load effects on output voltage.
DCM in Enhanced VOUT Regulation Mode
When the DCM starts, it will go through a soft start. The soft start
routine ramps the output voltage by modulating the internal error
amplifier reference. This causes the output voltage to approximate a
piecewise linear ramp. The output ramp finishes when the voltage
reaches either the nominal output voltage, or the trimmed output
voltage in cases where trim mode is active.
In Enhanced VOUT Regulation mode, output voltage is not a function
of load line.
During soft-start, the maximum load current capability is reduced.
Until Vout achieves at least VOUT-FL-THRESH, the output current must be
less than IOUT-START in order to guarantee startup. Note that this is
current available to the load, above that which is required to charge the
output capacitor.
DCM™ DC-DC Converter
Rev 1.3
Page 23 of 31
01/2020
DCM2322xA5N13A2y6z
Nominal Output Voltage Temperature Coefficient
DCM in Array Mode
A second additive term to the programmed output voltage is based on
the temperature of the module. This term permits improved thermal
balancing among modules in an array, especially when the factory
nominal trim point is utilized (trim mode inactive). This term is much
smaller than the load line described above, representing only a -1.60
mV/°C change. Regulation coefficient is relative to 25°C.
For nominal trim and full load, the output voltage relates to the
temperature according to the following equation:
VOUT-FL = 12.0 -1.600 • 0.001 • (TINT - 25)
(2)
DCM in Enhanced VOUT Regulation Mode
In Enhanced VOUT Regulation Mode, only trim (Equation 3) is
applicable. The general equation relating the DC VOUT to programmed
trim is given by:
VOUT = 5.25 + (9.118 • VTR/VCC) + ∆VOUT-LL
(5)
Finally, note that when the load current is below 10% of the rated
capacity, there is an additional ∆V which may add to the output
voltage, depending on the line voltage which is related to light load
boosting. Please see the section on light load boosting below for details.
Use 0 V for ∆VOUT-LL when load is above 10% of rated load. See section on
light load boosting operation for light load effects on output voltage.
Output Current Limit
where TINT is in °C.
The impact of temperature coefficient on the output voltage is absolute,
and does not scale with trim or load.
DCM in Array Mode
In Enhanced VOUT Regulation mode, output voltage is not a function of
temperature coefficient.
Trim Mode and Output Trim Control:
DCM in Array and Enhanced VOUT Regulation Modes
When the input voltage is initially applied to a DCM, and after tINIT
elapses, the trim pin voltage VTR is sampled. The TR pin has an internal
pull up resistor to VCC, so unless external circuitry pulls the pin voltage
lower, it will pull up to VCC. If the initially sampled trim pin voltage is
higher than VTRIM-DIS, then the DCM will disable trimming as long as
the VIN remains applied. In this case, for all subsequent operation the
output voltage will be programmed to the nominal. This minimizes the
support components required for applications that only require the
nominal rated Vout, and also provides the best output setpoint
accuracy, as there are no additional errors from external trim
components
The DCM features a fully operational current limit which effectively
keeps the module operating inside the Safe Operating Area (SOA) for
all valid trim and load profiles. The current limit approximates a “brick
wall” limit, where the output current is prevented from exceeding the
current limit threshold by reducing the output voltage via the internal
error amplifier reference. The current limit threshold at nominal trim
and below is typically 120% of rated output current, but it can vary
between 100% to 140%. In order to preserve the SOA, when the
converter is trimmed above the nominal output voltage, the current
limit threshold is automatically reduced to limit the available output
power.
When the output current exceeds the current limit threshold, current
limit action is held off by 1ms, which permits the DCM to momentarily
deliver higher peak output currents to the load. Peak output power
during this time is still constrained by the internal Power Limit of the
module. The fast Power Limit and relatively slow Current Limit work
together to keep the module inside the SOA. Delaying entry into
current limit also permits the DCM to minimize droop voltage for load
steps.
Sustained operation in current limit is permitted, and no derating of
output power is required, even in an array configuration.
If at initial application of VIN, the TR pin voltage is prevented from
exceeding VTRIM-EN, then the DCM will activate trim mode, and it will
remain active for as long as VIN is applied.
VOUT set point under full load and room temperature can be calculated
using the equation below:
Some applications may benefit from well matched current distribution,
in which case fine tuning sharing via the trim pins permits control over
sharing. The DCM does not require this for proper operation, due to the
power limit and current limit behaviors described here.
Note that the trim mode is not changed when a DCM recovers from any
fault condition or being disabled.
Current limit can reduce the output voltage to as little as the UVP
threshold (VOUT-UVP). Below this minimum output voltage compliance
level, further loading will cause the module to shut down due to the
output undervoltage fault protection.
VOUT-FL @ 25°C = 5.25 + (9.118 • VTR/VCC)
(3)
Module performance is guaranteed through output voltage trim range
VOUT-TRIMMING. If VOUT is trimmed above this range, then certain
combinations of line and load transient conditions may trigger the
output OVP.
Overall Output Voltage Transfer Function
DCM in Array Mode
Taking load line (equation 1), temperature coefficient (equation 2)
and trim (equation 3) into account, the general equation relating the
DC VOUT to programmed trim (when active), load, and temperature is
given by:
VOUT = 5.25 + (9.118 • VTR/VCC)
+ 0.6316 • (1 - IOUT / 10.00)
-1.600 • 0.001 • (TINT -25) + ∆VOUT-LL
Line Impedance, Input Slew rate and Input Stability Requirements
Connect a high-quality, low-noise power supply to the +IN and –IN
terminals. Additional capacitance may have to be added between +IN
and –IN to make up for impedances in the interconnect cables as well
as deficiencies in the source.
Excessive source impedance can bring about system stability issues for
a regulated DC-DC converter, and must either be avoided or
compensated by filtering components. A 100 µF input capacitor is the
minimum recommended in case the source impedance is insufficient
to satisfy stability requirements.
(4)
DCM™ DC-DC Converter
Rev 1.3
Page 24 of 31
01/2020
DCM2322xA5N13A2y6z
Output Undervoltage Fault Protection (UVP)
The converter determines that an output overload or short circuit
condition exists by measuring its primary sensed output voltage and
the output of the internal error amplifier. In general, whenever the
powertrain is switching and the primary-sensed output voltage falls
below VOUT-UVP threshold, a short circuit fault will be registered. Once
an output undervoltage condition is detected, the powertrain
immediately stops switching, and the output voltage of the converter
falls. The converter remains disabled for a time tFAULT. Once recovered
and provided the converter is still enabled, the powertrain will again
enter the soft start sequence after tINIT and tON.
Additional information can be found in the filter design application
note:
www.vicorpower.com/documents/application_notes/vichip_appnote23.pdf
Please refer to this input filter design tool to ensure input stability:
http://app2.vicorpower.com/filterDesign/intiFilter.do.
Ensure that the input voltage slew rate is less than 1V/us, otherwise a
pre-charge circuit is required for the DCM input to control the input
voltage slew rate and prevent overstress to input stage components.
Input Fuse Selection
The DCM is not internally fused in order to provide flexibility in
configuring power systems. Input line fusing is recommended at the
system level, in order to provide thermal protection in case of
catastrophic failure. The fuse shall be selected by closely matching
system requirements with the following characteristics:
Temperature Fault Protections (OTP)
The fault logic monitors the internal temperature of the converter. If
the measured temperature exceeds TINT-OTP, a temperature fault is
registered. As with the under voltage fault protection, once a
temperature fault is registered, the powertrain immediately stops
switching, the output voltage of the converter falls, and the converter
remains disabled for at least time tFAULT. Then, the converter waits for
the internal temperature to return to below TINT-OTP before recovering.
Provided the converter is still enabled, the DCM will restart after tINIT
and tON.
n Current rating (usually greater than the DCM converter’s
maximum current)
n Maximum voltage rating (usually greater than the maximum
possible input voltage)
n Ambient temperature
Output Overvoltage Fault Protection (OVP)
The converter monitors the output voltage during each switching cycle
by a corresponding voltage reflected to the primary side control
circuitry. If the primary sensed output voltage exceeds VOUT-OVP, the
OVP fault protection is triggered. The control logic disables the
powertrain, and the output voltage of the converter falls.
n Breaking capacity per application requirements
n Nominal melting
I2t
n Recommended fuse: See Agency Approvals for Recommended Fuse
http://www.vicorpower.com/dc-dc/isolatedregulated/dcm#Documentation
Fault Handling
Input Undervoltage Fault Protection (UVLO)
The converter’s input voltage is monitored to detect an input under
voltage condition. If the converter is not already running, then it will
ignore enable commands until the input voltage is greater than
VIN-UVLO+. If the converter is running and the input voltage falls below
VIN-UVLO-, the converter recognizes a fault condition, the powertrain
stops switching, and the output voltage of the unit falls.
Input voltage transients which fall below UVLO for less than tUVLO may
not be detected by the fault proection logic, in which case the converter
will continue regular operation. No protection is required in this case.
Once the UVLO fault is detected by the fault protection logic, the
converter shuts down and waits for the input voltage to rise above VINUVLO+. Provided the converter is still enabled, it will then restart.
Input Overvoltage Fault Protection (OVLO)
The converter’s input voltage is monitored to detect an input over
voltage condition. When the input voltage is more than the
VIN-OVLO+, a fault is detected, the powertrain stops switching, and the
output voltage of the converter falls.
After an OVLO fault occurs, the converter will wait for the input voltage
to fall below VIN-OVLO-. Provided the converter is still enabled, the
powertrain will restart.
The powertrain controller itself also monitors the input voltage.
Transient OVLO events which have not yet been detected by the fault
sequence logic may first be detected by the controller if the input slew
rate is sufficiently large. In this case, powertrain switching will
immediately stop. If the input voltage falls back in range before the
fault sequence logic detects the out of range condition, the powertrain
will resume switching and the fault logic will not interrupt operation
Regardless of whether the powertrain is running at the time or not, if
the input voltage does not recover from OVLO before tOVLO, the
converter fault logic will detect the fault.
This type of fault is latched, and the converter will not start again until
the latch is cleared. Clearing the fault latch is achieved by either
disabling the converter via the EN pin, or else by removing the input
power such that the input voltage falls below VIN-INIT.
External Output Capacitance
The DCM converter internal compensation requires a minimum
external output capacitor. An external capacitor in the range of 500 to
10000 µF with ESR of 10 mΩ is required, per DCM for control loop
compensation purposes.
However some DCM models require an increase to the minimum
external output capacitor value in certain loading and trim condition.
In applications where the load can go below 10% of rated load but the
output trim is held constant, the range of output capacitor required is
given by COUT-EXT-TRANS in the Electrical Specifications table. If the load
can go below 10% of rated load and the DCM output trim is also
dynamically varied, the range of output capacitor required is given by
COUT-EXT-TRANS-TRIM in the Electrical Specifications table.
Light Load Boosting
Under light load conditions, the DCM converter may operate in light
load boosting depending on the line voltage. Light load boosting occurs
whenever the internal power consumption of the converter combined
with the external output load is less than the minimum power transfer
per switching cycle. In order to maintain regulation, the error amplifier
will switch the powertrain off and on repeatedly, to effectively lower
the average switching frequency, and permit operation with no
external load. During the time when the power train is off, the module
internal consumption is significantly reduced, and so there is a notable
reduction in no-load input power in light load boosting. When the load
is less than 10% of rated Iout, the output voltage may rise by a
maximum of 1.58 V, above the output voltage calculated from trim,
temperature, and load line conditions.
DCM™ DC-DC Converter
Rev 1.3
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DCM2322xA5N13A2y6z
Thermal Design
Based on the safe thermal operating area shown in page 5, the full rated
power of the DCM2322xA5N13A2y6z can be processed provided that
the top, bottom, and leads are all held below 95°C. These curves
highlight the benefits of dual sided thermal management, but also
demonstrate the flexibility of the Vicor ChiP platform for customers
who are limited to cooling only the top or the
bottom surface.
The OTP sensor is located on the top side of the internal PCB structure.
Therefore in order to ensure effective over-temperature fault
protection, the case bottom temperature must be constrained by the
thermal solution such that it does not exceed the temperature of the
case top.
The ChiP package provides a high degree of flexibility in that it presents
three pathways to remove heat from internal power dissipating
components. Heat may be removed from the top surface, the bottom
surface and the leads. The extent to which these three surfaces are
cooled is a key component for determining the maximum power that is
available from a ChiP, as can be seen from Figure 23.
Since the ChiP has a maximum internal temperature rating, it is
necessary to estimate this internal temperature based on a real thermal
solution. Given that there are three pathways to remove heat from the
ChiP, it is helpful to simplify the thermal solution into a roughly
equivalent circuit where power dissipation is modeled as a current
source, isothermal surface temperatures are represented as voltage
sources and the thermal resistances are represented as resistors.
Figure 23 shows the "thermal circuit" for a 2322 ChiP DCM, in an
application where both case top and case bottom, and leads are cooled.
In this case, the DCM power dissipation is PDTOTAL and the three surface
temperatures are represented as TCASE_TOP, TCASE_BOTTOM, and TLEADS. This
thermal system can now be very easily analyzed with simple resistors,
voltage sources, and a current source.
MAX INTERNAL TEMP
Thermal Resistance Top
θINT-TOP ºC / W
Thermal Resistance Bottom
θINT-BOTTOM ºC / W
Power Dissipation (W)
Thermal Resistance Leads
θINT-LEADS ºC / W
TCASE_BOTTOM(°C)
TLEADS(°C)
+
–
TCASE_TOP(°C)
+
–
Figure 24 — One side cooling and leads thermal model
Figure 24 shows a scenario where there is no bottom side cooling.
In this case, the heat flow path to the bottom is left open and the
equations now simplify to:
TINT – PD1 • θINT-TOP = TCASE_TOP
TINT – PD3 • θINT-LEADS = TLEADS
PDTOTAL = PD1 + PD3
MAX INTERNAL TEMP
Thermal Resistance Top
θINT-TOP ºC / W
Thermal Resistance Bottom
θINT-BOTTOM ºC / W
Power Dissipation (W)
Thermal Resistance Leads
θINT-LEADS ºC / W
TCASE_BOTTOM(°C)
TLEADS(°C)
TCASE_TOP(°C)
+
–
This analysis provides an estimate of heat flow through the various
pathways as well as internal temperature.
Figure 25 — One side cooling thermal model
Thermal Resistance Bottom
θINT-BOTTOM ºC / W
Power Dissipation (W)
TCASE_BOTTOM(°C)
Figure 25 shows a scenario where there is no bottom side and leads
cooling. In this case, the heat flow path to the bottom is left open and
the equations now simplify to:
MAX INTERNAL TEMP
Thermal Resistance Top
θINT-TOP ºC / W
TINT – PD1 • θINT-TOP = TCASE_TOP
PDTOTAL = PD1
Thermal Resistance Leads
θINT-LEADS ºC / W
+
–
TLEADS(°C)
+
–
TCASE_TOP(°C)
+
–
Vicor provides a suite of online tools, including a simulator and
thermal estimator which greatly simplify the task of determining
whether or not a DCM thermal configuration is sufficient for a given
condition. These tools can be found at:
www.vicorpower.com/powerbench.
Figure 23 — Double side cooling and leads thermal model
Alternatively, equations can be written around this circuit and
analyzed algebraically:
TINT – PD1 • θINT-TOP = TCASE_TOP
TINT – PD2 • θINT-BOTTOM = TCASE_BOTTOM
TINT – PD3 • θINT-LEADS = TLEADS
PDTOTAL = PD1+ PD2+ PD3
Where TINT represents the internal temperature and PD1, PD2, and PD3
represent the heat flow through the top side, bottom side, and leads
respectively.
DCM™ DC-DC Converter
Rev 1.3
Page 26 of 31
01/2020
DCM2322xA5N13A2y6z
Array Operation
A decoupling network is needed to facilitate paralleling:
n An output inductor should be added to each DCM, before the
outputs are bussed together to provide decoupling.
Recommended values to start with:
L1_x: 22 µH, minimized DCR;
C1_x: Ceramic capacitors in parallel, C1 = 6.6 µF;
Rd_x: 1.5 Ω;
Cd_x: 20 µF
L2_x: 0.33 µH;
C2_x: 80 µF;
Rdm_x: 0.05 Ω;
Lb_x: 72 nH;
COUT-EXT-x: electrolytic or tantalum capacitor, 500 µF ≤ C3 ≤10000 µF;
C3, C4: additional ceramic /electrolytic capacitors, if needed for output
ripple filtering;
In order to help sensitive signal circuits reject potential noise,
additional components are recommended:
R2_x: 301 Ohm, facilitate noise attenuation for TR pin;
FB1_x, C5_x: FB1 is a ferrite bead with an impedance of at least 10 Ω at
100MHz. C5_x can be a ceramic capacitor of 0.1uF. Facilitate noise
attenuation for EN pin.
n Each DCM needs a separate input filter, even if the multiple DCMs
share the same input voltage source. These filters limit the ripple
current reflected from each DCM, and also help suppress
generation of beat frequency currents that can result when
multiple powertrains input stages are permitted to
direclty interact.
If signal pins (TR, EN, FT) are not used, they can be left floating, and
DCM will work in the nominal output condition.
When common mode noise in the input side is not a concern, TR and
EN can be driven and FT received using a single Kelvin connection to
the shared -IN as a reference.
Note: For more information on parallel operation of DCMs, refer to
“Parallel DCMs” application note AN:030.
Note: Use an RCR filter network as suggested in the application note
AN:030 to reduce the noise on the signal pins.
An example of DCM paralleling circuit is shown in Figure 26.
Note: In case of the excessive line inductance, a properly sized
decoupling capacitor CDECOUPLE is required as shown in Figure 26.
When common mode noise rejection in the input side is needed,
common mode chokes can be added in the input side of each DCM. An
example of DCM paralleling circuit is shown below:
Rb
VTR
VEN
F1_1
VIN
CY
L1_1
TR
EN
FB1_1
C5_1
CY
Rd_1
RCOUT-EXT_1
–IN
Rb
C1_2
FB1_2
C5_2
≈≈
FB1_8
Rdm_2
+IN
+OUT
–IN
–OUT
Lb_2
L2_2
RCOUT-EXT_2
C2_2
COUT-EXT_2
CY
≈
Rb
Cb1
Cb2
Cb1
Cb2
≈≈
DCM8
TR
EN
C5_8
Rdm_8
FT
R3
CY
+IN
Rd_8
R4
D1
Cd_8
Shared –IN Kelvin
Cb2
CIN
CY
C1_8
Cb1
CY
R2_8
F1_8
Cb2
FT
Rb
L1_8
Cb1
EN
Cd_2
CY
Load
TR
Rd_2
≈≈
C4
DCM2
R2_2
CY
C3
CY
Rb
L1_2
C2_1
COUT-EXT_1
–OUT
CY
F1_2
L2_1
+OUT
CIN
Cd_1
Lb_1
Rdm_1
FT
+IN
C1_1
CDECOUPLE
Cb2
DCM1
R2_1
EMI_GND
Cb1
+OUT
RCOUT-EXT_8
CIN
–IN
COUT-EXT_8
–OUT
CY
Lb_8
L2_8
C2_8
CY
Rb
Cb1
Cb2
Note: CIN, Rb, Cb1 and Cb2 are required components for proper operation of the DCM. See required components table on page 2.
Figure 26 — DCM paralleling configuration circuit 1
DCM™ DC-DC Converter
Rev 1.3
Page 27 of 31
01/2020
DCM2322xA5N13A2y6z
Rb
F1_1
CY
T1_1
VIN
C1_1
Rd_1
TR
+
VTR1
+ FB1_1
C5_1
EN
VEN1
R3_1
_
R4_1
D1_1
_
Cd_1
Cb2
DCM1
R2_1
EMI_GND
Cb1
FT
CY
+IN
+OUT
–IN
–OUT
Rb
T1_2
C1_2
Rd_2
VTR2
+ FB
1_2
C5_2
VEN2
_
_
Cd_2
Cb1
Cb2
Cb1
Cb2
FT
R4_2
D1_2
CY
+IN
+OUT
–IN
C2_2
CY
_
FB1_8
C5_8
VEN8
_
Cb2
Cb1
Cb2
≈≈
TR
EN
+
VTR8
Cb1
DCM8
R2_8
+
C1_8
Lb_2
L1_2
COUT-EXT_2
–OUT
Rb
Rd_8
Cd_8
Rdm_2
RCOUT-EXT_2
CIN
Rb
T1_8
Load
EN
R3_2
CY
CY
C4
TR
≈≈
F1_8
C3
C2_1
COUT-EXT_1
DCM2
R2_2
+
F1_2
RCOUT-EXT_1
CY
Rb
CY
Lb_1
L1_1
CIN
CY
Rdm_1
FT
R3_8
R4_8
CY
+IN
+OUT
–IN
–OUT
CY
Lb_8
L1_8
RCOUT-EXT_8
CIN
D1_8
Rdm_8
COUT-EXT_8
C2_8
CY
Rb
Cb1
Cb2
Note: CIN, Rb, Cb1 and Cb2 are required components for proper operation of the DCM. See required components table on page 2.
Figure 27 — DCM paralleling configuration circuit 2
Notice that each group of control pins need to be individually driven
and isolated from the other groups control pins. This is because -IN
of each DCM can be at a different voltage due to the common mode
chokes. Attempting to share control pin circuitry could lead to
incorrect behavior of the DCMs.
An array of DCMs used at the full array rated power may generally
have one or more DCMs operating at current limit, due to sharing
errors. Load sharing is functionally managed by the load line.
Thermal balancing is improved by the nominal effective temperature
coefficient of the output voltage setpoint.
DCMs in current limit will operate with higher output current or
power than the rated levels. Therefore the following Thermal Safe
Operating Area plot should be used for array use, or loads that drive
the DCM in to current limit for sustained operation.
Figure 28 — Thermal Specified Operating Area: Max Power
Dissipation vs. Case Temp for arrays or current
limited operation
DCM™ DC-DC Converter
Rev 1.3
Page 28 of 31
01/2020
DCM2322xA5N13A2y6z
DCM Module Product Outline Drawing Recommended PCB Footprint and Pinout
24.84±.38
.978±.015
11.43
.450
12.42
.489
0
1.52
.060
(2) PL.
11.40
.449
0
0
22.80±.13
.898±.005
1.02
.040
(3) PL.
0
1.52
.060
(4) PL.
TOP VIEW (COMPONENT SIDE)
.05 [.002]
SEATING
PLANE
7.21±.10
.284±.004
.41
.016
(9) PL.
11.66
.459
0
11.66
.459
4.17
.164
(9) PL.
8.25
.325
8.00
.315
2.75
.108
0
0
2.75
.108
1.38
.054
4.13
.162
1.38
.054
8.00
.315
0
8.25
.325
8.00±.08
.315±.003
1.38±.08
.054±.003
4.13±.08
.162±.003
1.38±.08
.054±.003
0
11.66±.08
.459±.003
1.52
.060
PLATED THRU
.25 [.010]
ANNULAR RING
(3) PL.
0
EN
FT
-IN
+OUT
2.75±.08
.108±.003
-OUT
8.25±.08
.325±.003
0
2.03
.080
PLATED THRU
.25 [.010]
ANNULAR RING
(2) PL.
2.75±.08
.108±.003
-OUT
TR
8.00±.08
.315±.003
8.25±.08
.325±.003
+OUT
+IN
0
11.66±.08
.459±.003
BOTTOM VIEW
RECOMMENDED HOLE PATTERN
(COMPONENT SIDE)
NOTES:
1- DIMENSIONS ARE MM [INCH]
DCM™ DC-DC Converter
Rev 1.3
Page 29 of 31
01/2020
2.03
.080
PLATED THRU
.38 [.015]
ANNULAR RING
(4) PL.
DCM2322xA5N13A2y6z
Revision History
Revision
Date
Description
Page Number(s)
1.0
08/12/19
Initial release
1.1
08/19/19
Updated component table
2
1.2
09/05/19
Updated signal pin names on mechanical drawing
29
1.3
01/30/20
Output voltage regulation specification format change
8
n/a
DCM™ DC-DC Converter
Rev 1.3
Page 30 of 31
01/2020
DCM2322xA5N13A2y6z
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DCM™ DC-DC Converter
Rev 1.3
Page 31 of 31
01/2020