VTM™ Current Multiplier
VTM48Ex040y050B0R
S
C
NRTL
US
High Efficiency, Bi-directional, Sine Amplitude Converter™
Features & Benefits
Description
• 48VDC to 4VDC 50A bi-directional current multiplier
The VI Chip® bi-directional current multiplier is a Sine Amplitude
Converter™ (SAC™) operating from a 26 to 55VDC primary
source or a 2.2 to 4.6VDC secondary source to power a load. The
bi-directional Sine Amplitude Converter isolates and transforms
voltage at a secondary:primary ratio of 1/12. The SAC offers a
low AC impedance beyond the bandwidth of most downstream
regulators; therefore for a step-down conversion; capacitance
normally at the load can be located at the source to the Sine
Amplitude Converter to enable a reduction in size of capacitors.
Since the K factor of the VTM48EF040T050B0R is 1/12, the
capacitance value on the primary side can be reduced by a factor
of 144 in an application where the source is located on the primary
side, resulting in savings of board area, materials and total
system cost.
• Can power a load connected to either the primary or
secondary side
• High efficiency (>94%) reduces system power
consumption
• High density (170A/in3)
• “Full Chip” VI Chip® package enables surface mount,
low impedance interconnect to system board
•
Contains built-in protection features against:
n Overvoltage Lockout
n Overcurrent
n Short Circuit
n Overtemperature
• Provides enable/disable control,
internal temperature monitoring
• ZVS/ZCS resonant Sine Amplitude Converter topology
• Less than 50ºC temperature rise at full load
in typical applications
The VTM48EF040T050B0R is provided in a VI Chip package
compatible with standard pick-and-place and surface mount
assembly processes. The co-molded VI Chip package provides
enhanced thermal management due to a large thermal interface
area and superior thermal conductivity. The high conversion
efficiency of the VTM48EF040T050B0R increases overall system
efficiency and lowers operating costs compared to
conventional approaches.
The VTM48EF040T050B0R enables the utilization of Factorized
Power Architecture™ which provides efficiency and size benefits
by lowering conversion and distribution losses and promoting high
density point of load conversion.
Typical Applications
• High End Computing Systems
Product Ratings
• Automated Test Equipment
• High Density Power Supplies
• Communications Systems
VPRI = 26 – 55V
ISEC = 50A (NOM)
VSEC = 2.2 – 4.6V (no load)
K = 1/12
Part Numbering
Typical Application
Product Number
+IN
Enable
+OUT
VTM48Ex040y050B0R
PRM A
-IN
-OUT
+PRI
+IN
Enable
-PRI
Battery
-SEC
PRM B
-OUT
-IN
VTM™ Current Multiplier
Page 1 of 21
Rev 1.3
11/2016
Product Grade
F = J-Lead
T = -40° to 125°C
T = Through hole
M = -55° to 125°C
For Storage and Operating Temperatures see General Characteristics Section
+SEC
VTM®
+OUT
Package Style
vicorpower.com
800 927.9474
VTM48Ex040y050B0R
Absolute Maximum Ratings
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device.
Parameter
Comments
Min
Max
Unit
+PRI to –PRI
-1.0
60
VDC
PC to –PRI
-0.3
20
VDC
TM to –PRI
-0.3
7
VDC
VC to –PRI
-0.3
20
VDC
2250
VDC
40
VDC
+PRI / –PRI to +SEC / –SEC (hipot)
+SEC to –SEC
-0.5
Primary Source Electrical Specifications
Specifications apply over all line and load conditions when power is sourced from the primary side, unless otherwise noted; Boldface specifications apply over
the temperature range of -40°C < TJ < 125°C (T-Grade); All other specifications are at TJ = 25ºC unless otherwise noted.
Attribute
Primary voltage range
Symbol
VPRI
VPRI slew rate
dVPRI/dt
VPRI UV turn off
VPRI_UV
Conditions / Notes
PNL
Typ
26
55
VC applied
0
55
Module latched shutdown,
No external VC applied, IOUT = 50A
24
DC input current
Transfer ratio
Secondary voltage
IINRP
4.7
VSEC
Secondary current (average)
ISEC_AVG
Secondary current (peak)
ISEC_PK
Secondary power (average)
Efficiency (ambient)
VTM™ Current Multiplier
Page 2 of 21
POUT_AVG
hAMB
V/µs
26
V
6.3
W
8
VC enable, VPRI = 48V, CSEC = 9100μF,
RLOAD = 78mΩ
10
IPRI_DC
K
VDC
1
12
VPRI = 26V to 55V
VPRI = 48V, TC = 25ºC
Unit
10
1.5
VPRI = 26V to 55V, TC = 25ºC
Inrush current peak
Max
No external VC applied
VPRI = 48V
No Load power dissipation
Min
20
A
4.5
A
1/12
K = VSEC/ VPRI, ISEC = 0A
V/V
VSEC = VPRI • K –ISEC • RSEC, See Page 13
V
54
A
tPEAK < 10ms, IOUT_AVG ≤ 50A
75
A
ISEC_AVG ≤ 50A
248
W
VPRI = 48V, ISEC = 50A
93.1
VPRI = 26V to 55V, ISEC = 50A
90.2
VPRI = 48V, ISEC = 25A
92.4
Rev 1.3
11/2016
vicorpower.com
800 927.9474
94.0
%
93.5
VTM48Ex040y050B0R
Primary Source Electrical Specifications (Cont.)
Specifications apply over all line and load conditions when power is sourced from the primary side, unless otherwise noted; Boldface specifications apply over
the temperature range of -40°C < TJ < 125°C (T-Grade); All other specifications are at TJ = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
94.0
Max
Unit
Efficiency (hot)
hHOT
VIN = 48V, TC = 100°C, ISEC = 50A
93.0
Efficiency (over load range)
h20%
10A < ISEC < 50A
80.0
Secondary resistance (cold)
RSEC_COLD
TC = -40°C, ISEC = 50A
1.5
2.0
2.6
mΩ
Secondary resistance (ambient)
RSEC_AMB
TC = 25°C, ISEC = 50A
1.8
2.5
3.0
mΩ
Secondary resistance (hot)
RSEC_HOT
TC = 100°C, ISEC = 50A
2.0
2.7
3.3
mΩ
%
%
FSW
1.36
1.43
1.50
MHz
Secondary ripple frequency
FSW_RP
2.72
2.86
3.00
MHz
Secondary voltage ripple
VSEC_PP
COUT = 0F, ISEC = 50A, VPRI = 48V,
20MHz BW
216
350
mV
Secondary inductance (parasitic)
LSEC_PAR
Frequency up to 30MHz, Simulated J-lead model
600
pH
Secondary capacitance (internal)
CSEC_INT
Effective Value at 4VSEC
200
µF
Secondary capacitance (external)
CSEC_EXT
VTM Standalone Operation.
VPRI pre-applied, VC enable
Switching frequency
9100
µF
60.0
V
Protection
Primary Overvoltage lockout
VPRI_OVLO+
Module latched shutdown
Primary Overvoltage lockout
response time constant
tOVLO
Effective internal RC filter
55.1
8
Secondary overcurrent trip
IOCP_SEC
53
Secondary Short circuit protection
trip current
ISCP_SEC
100
Secondary overcurrent
response time constant
tOCP_SEC
Effective internal RC filter (Integrative)
Secondary Short circuit
protection response time
tSCP_SEC
From detection to cessation
of switching (Instantaneous)
Thermal shutdown setpoint
Reverse inrush current protection
VTM™ Current Multiplier
Page 3 of 21
TJ_OTP
125
Reverse Inrush protection is enabled for this product
Rev 1.3
11/2016
58.5
vicorpower.com
800 927.9474
78
µs
100
A
A
6.2
ms
1
µs
130
135
ºC
VTM48Ex040y050B0R
Secondary Source Electrical Specifications
Specifications apply over all line and load conditions when power is sourced from the secondary side, unless otherwise noted; Boldface specifications apply
over the temperature range of -40°C < TJ < 125°C (T-Grade); All other specifications are at TJ = 25ºC unless otherwise noted.
Attribute
Secondary voltage range
Symbol
Conditions / Notes
No external VC applied
VSEC
VSEC slew rate
dVSEC/dt
VSEC UV turn off
VSEC_UV
VC applied
Typ
4.58
0
5
2.0
1.5
4.7
VSEC = 2.17V to 4.58V, TC = 25ºC
Inrush current peak
IIN_SEC_P
DC secondary current
ISEC_DC
Primary voltage
Primary current (average)
IPRI_AVG
Primary current (peak)
IPRI_PK
Primary power (average)
Efficiency (ambient)
V/µs
2.2
V
6.3
120
240
A
54.0
A
VPRI = VSEC /K –IPRI • RPRI, See Page 13
PPRI_AVG
hAMB
W
8.0
VC enable, VSEC = 4V, CPRI = 63μF,
RLOAD = 11Ω
VPRI
VDC
1
12.0
VSEC = 4V, TC = 25ºC
Unit
10.0
VSEC = 2.17V to 4.58V
PNL_SEC
Max
2.17
Module latched shutdown,
No external VC applied, IPRI = 4.2A
VSEC = 4V
No Load power dissipation
Min
V
4.2
A
tPEAK < 10ms, IPRI_AVG ≤ 4.2A
6.3
A
IPRI_AVG ≤ 4.2A
230
W
VSEC = 4V, IPRI = 4.2A
93.1
VSEC = 2.17V to 4.58V, IPRI = 4.2A
90.2
VSEC = 4V, IPRI = 2.1A
92.4
93.5
94.0
Efficiency (hot)
hHOT
VSEC = 4V, TC = 100°C, IPRI = 4.2A
93.0
Efficiency (over load range)
h20%
0.8A < IPRI < 4.2A
80.0
94.0
%
%
%
Primary resistance (cold)
RPRI_COLD
TC = -40°C, IPRI = 4.2A
380
420
460
mΩ
Primary resistance (ambient)
RPRI_AMB
TC = 25°C,IPRI = 4.2A
430
473
545
mΩ
Primary resistance (hot)
RPRI_HOT
TC = 100°C, IPRI = 4.2A
480
521
560
mΩ
Primary voltage ripple
VPRI_PP
CPRI = 0F, IPRI = 4.2A, VSEC = 4V,
2.2MHz BW
600
mV
Primary capacitance (external)
CPRI_EXT
VTM Standalone Operation.
VSEC pre-applied, VC enable
63
µF
5.0
V
Protection
Secondary OVLO
Secondary Overvoltage lockout
response time constant
VSEC_OVLO+
Module latched shutdown
tOVLO_SEC
Effective internal RC filter
4.6
8
Primary overcurrent trip
IOCP_PRI
4
Primary Short circuit protection
trip current
ISCP_PRI
8
Primary overcurrent
response time constant
tOCP_PRI
Effective internal RC filter (Integrative)
Primary Short circuit protection
response time
tSCP_PRI
From detection to cessation
of switching (Instantaneous)
VTM™ Current Multiplier
Page 4 of 21
Rev 1.3
11/2016
4.9
vicorpower.com
800 927.9474
6
µs
8
A
A
6.2
ms
1
µs
VTM48Ex040y050B0R
Signal Characteristics
Specifications apply over all line and load conditions when power is sourced from the primary side, unless otherwise noted; Boldface specifications apply over
the temperature range of -40°C < TJ < 125°C (T-Grade); All other specifications are at TJ = 25ºC unless otherwise noted.
VTM CONTROL : VC
• Referenced to -PRI.
• Used to wake up powertrain circuit.
• A minimum of 11.5V must be applied indefinitely for Vpri < 26V to ensure normal operation.
• VC slew rate must be within range for a succesful start.
• PRM™ VC can be used as valid wake-up signal source.
• Internal Resistance used in “Adaptive Loop” compensation.
• VC voltage may be continuously applied.
SIGNAL TYPE
STATE
ATTRIBUTE
External VC voltage
VC current draw
SYMBOL
VVC_EXT
IVC
Steady
ANALOG
INPUT
VTM™ Current Multiplier
Page 5 of 21
TYP
11.5
VC = 11.5V, VPRI = 0V
66
VC = 11.5V, VPRI > 26V
15
VC = 16.5V, VPRI > 26V
83
Fault mode. VC > 11.5V
75
MAX
UNIT
16.5
V
150
mA
DVC_INT
100
V
VC internal resistor
RVC-INT
1
kΩ
TVC_COEFF
VC start up pulse
VVC_SP
tPEAK 26V or VC > 11.5V.
After successful start up and under no fault condition, PC can be used as a 5 V regulated voltage source with a 2mA maximum current.
Module will shutdown when pulled low with an impedance less than 400Ω.
In an array of VTMs, connect PC pin to synchronize start up.
PC pin cannot sink current and will not disable other modules during fault mode.
SIGNAL TYPE
STATE
ATTRIBUTE
PC voltage
Steady
ANALOG
OUTPUT
Start Up
Enable
DIGITAL
INPUT/
OUTPUT
Disable
Transitional
SYMBOL
CONDITIONS / NOTES
VPC
PC source current
IPC_OP
PC resistance (internal)
RPC_OP
PC source current
IPC_EN
PC capacitance (internal)
Internal pull down resistor
MIN
TYP
MAX
4.7
5.0
5.3
V
2
mA
50
150
400
kΩ
50
100
300
µA
1000
pF
CPC_INT
PC resistance (external)
RPC_S
60
PC voltage
VPC_EN
2
PC voltage (disable)
VPC_DIS
PC pull down current
IPC_PD
PC disable time
PC fault response time
kΩ
2.5
3
V
2
V
5.1
tPC_DIS_T
tFR_PC
UNIT
From fault to PC = 2V
mA
5
µs
100
µs
Temperature Monitor : TM
• Referenced to -PRI.
• The TM pin monitors the internal temperature of the VTM controller IC within an accuracy of ±5°C.
• Can be used as a “Power Good” flag to verify that the VTM is operating.
• The TM pin has a room temperature setpoint of 3V and approximate gain of 10mV/°C.
• Output drives Temperature Shutdown comparator.
SIGNAL TYPE
STATE
ATTRIBUTE
TM voltage
ANALOG
OUTPUT
Steady
Disable
DIGITAL
OUTPUT
(FAULT FLAG)
Transitional
VTM™ Current Multiplier
Page 6 of 21
SYMBOL
VTM_AMB
TM source current
ITM
TM gain
ATM
TM voltage ripple
VTM_PP
TM voltage
VTM_DIS
TM resistance (internal)
RTM_INT
TM capacitance (external)
CTM_EXT
TM fault response time
tFR_TM
Rev 1.3
11/2016
CONDITIONS / NOTES
TJ controller = 27°C
MIN
TYP
MAX
2.95
3.00
3.05
V
100
µA
10
CTM = 0F, VPRI = 48V, ISEC = 50A
120
mV/ºC
200
mV
50
kΩ
50
pF
0
Internal pull down resistor
From fault to TM = 1.5V
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800 927.9474
25
40
10
UNIT
V
µs
VTM48Ex040y050B0R
Timing Diagram (Power sourced from the primary side)
ISEC
6
7
ISEC
ISEC
1
2 3
VC
4
8
d
5
b
VVC-EXT
a
VPRI
VOVLO
NL
≥ 26V
c
e
f
VSEC
TM
VTM-AMB
PC
g
5V
3V
a: VC slew rate (dVC/dt)
b: Minimum VC pulse rate
c: tOVLO_PIN
d: tOCP_SEC
e: Secondary turn on delay (tON)
f: PC disable time (tPC_DIS_T)
g: VC to PC delay (tVC_PC)
VTM™ Current Multiplier
Page 7 of 21
1. Initiated VC pulse
2. Controller start
3. VPRI ramp up
4. VPRI = VOVLO
5. VPRI ramp down no VC pulse
6. Overcurrent, Secondary
7. Start up on short circuit
8. PC driven low
Rev 1.3
11/2016
Notes:
vicorpower.com
800 927.9474
– Timing and voltage is not to scale
– Error pulse width is load dependent
VTM48Ex040y050B0R
Application Characteristics
The following values, typical of an application environment, are collected at TC = 25ºC with power sourced from the primary side unless otherwise noted.
See associated figures for general trend data.
ATTRIBUTE
SYMBOL
No load power dissipation
CONDITIONS / NOTES
TYP
UNIT
PNL
VPRI = 48V, PC enabled
4.7
W
Efficiency (ambient)
hAMB
VPRI = 48V, ISEC = 50A
94.3
%
Efficiency (hot)
hHOT
VPRI = 48V, ISEC = 50A, TC = 100ºC
94.2
%
Secondary resistance (cold)
RSEC_COLD
VPRI = 48V, ISEC = 50A, TC = -40ºC
2.4
mΩ
Secondary resistance (ambient)
RSEC_AMB
VPRI = 48V, ISEC = 50A
2.8
mΩ
Secondary resistance (hot)
RSEC_HOT
VPRI = 48V, ISEC = 50A, TC = 100ºC
3.2
mΩ
Secondary voltage ripple
VSEC_PP
CSEC = 0F, ISEC = 50A, VPRI = 48V, 20MHz BW
320
mV
VOUT transient (positive)
VSEC_TRAN+
ISEC_STEP = 0A to 50A, VPRI = 48V, ISLEW = 17A/µs
750
mV
VSEC_TRAN-
ISEC_STEP = 50A to 0A, VPRI = 48V, ISLEW = 0A/µs
750
mV
VOUT transient (negative)
98
Full Load Efficiency (%)
Power Dissipation (W)
11
10
9
8
7
6
5
4
3
2
1
26
29
32
35
38
41
43
46
49
52
55
96
94
92
-40
-20
0
-40°C
25°C
26V
VPRI :
100°C
Figure 1 — No load power dissipation vs. VPRI
60
80
100
48V
55V
Figure 2 — Full secondary load efficiency vs. temperature
35
Power Dissipation (W)
92
87
Efficiency (%)
40
Case Temperature (C)
Primary Voltage (V)
TCASE:
20
82
77
72
67
62
57
52
0
5
10
15
20
25
30
35
40
45
50
30
25
20
15
10
5
0
0
5
Secondary Load Current (A)
VPRI:
26V
48V
VTM™ Current Multiplier
Page 8 of 21
15
20
25
VPRI:
26V
Figure 4 — Power dissipation at –40°C
Rev 1.3
11/2016
30
35
40
Secondary Load Current (A)
55V
Figure 3 — Efficiency at –40°C
10
vicorpower.com
800 927.9474
48V
55V
45
50
VTM48Ex040y050B0R
98
24
Power Dissipation (W)
Efficiency (%)
94
90
86
82
78
74
20
16
12
8
4
0
70
0
5
10
15
20
25
30
35
40
45
0
50
5
10
Secondary Load Current (A)
26V
VPRI:
48V
25
30
35
40
45
50
48V
45
50
55V
Figure 6 — Power dissipation at 25°C
28
Power Dissipation (W)
96
92
Efficiency (%)
20
26V
VPRI:
55V
Figure 5 — Efficiency at 25°C
88
84
80
76
72
0
5
10
15
20
25
30
35
40
45
24
20
16
12
8
4
0
50
0
Secondary Load Current (A)
26V
VPRI:
48V
5
10
15
20
25
30
35
40
Secondary Load Current (A)
55V
26V
VPRI:
Figure 7 — Efficiency at 100°C
48V
55V
Figure 8 — Power dissipation at 100°C
4.0
350
300
VRipple (mVPK-PK)
3.0
RSEC (mΩ)
15
Secondary Load Current (A)
2.0
1.0
0.0
250
200
150
100
50
-40
-20
0
20
40
60
80
100
0
5
10
Case Temperature (C)
VPRI:
Full Load
Figure 9 — RSEC vs. temperature
VTM™ Current Multiplier
Page 9 of 21
15
20
25
30
35
40
45
Secondary Load Current (A)
26V
48V
55V
Figure 10 — VRIPPLE vs. ISEC ; No external CSEC. Board mounted
module, scope setting: 20MHz analog BW
Rev 1.3
11/2016
vicorpower.com
800 927.9474
50
VTM48Ex040y050B0R
10ms Max
Secondary Current (A)
80
70
60
50
Continuous
40
30
20
10
0
0
1
2
3
4
5
Secondary Voltage (V)
Figure 11 — Safe operating area
Figure 12 — Full load ripple, 100µF CPRI; No external CSEC. Board
mounted module, scope setting: 20MHz analog BW
Figure 13 — Start up from application of VPRI;
VC pre-applied CSEC = 9100µF
Figure 14 — Start up from application of VC;
VPRI pre-applied CSEC = 9100µF
Figure 15 — 0A – Full load transient response:
CPRI = 100µF, no external CSEC
Figure 16 — Full load – 0A transient response:
CPRI = 100µF, no external CSEC
VTM™ Current Multiplier
Page 10 of 21
Rev 1.3
11/2016
vicorpower.com
800 927.9474
VTM48Ex040y050B0R
General Characteristics
Specifications apply over all line and load conditions with power sourced from primary side unless otherwise noted; Boldface specifications apply over the
temperature range of -40ºC < TJ < 125ºC (T-Grade); All Other specifications are at TJ = 25°C unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Mechanical
Length
L
32.25 / [1.270]
32.5 / [1.280]
32.75 / [1.289]
mm/[in]
Width
W
21.75 / [0.856]
22.0 / [0.866]
22.25 / [0.876]
mm/[in]
Height
H
6.48 / [0.255]
6.73 / [0.265]
6.98 / [0.275]
mm/[in]
Volume
Vol
Weight
W
Lead Finish
No heat sink
4.81 / [0.294]
cm3/[in3]
15.0 / [0.53]
g/[oz]
Nickel
0.51
2.03
Palladium
0.02
0.15
Gold
0.003
0.051
VTM48EF040T050B0R (T-Grade)
-40
125
VTM48EF040M050B0R (M-Grade)
-55
125
VTM48ET040T050B0R (T-Grade)
-40
125
VTM48ET040M050B0R (M-Grade)
-55
125
μm
Thermal
Operating temperature
Thermal resistance
TJ
fJC
Isothermal heat sink and
isothermal internal PCB
Thermal capacity
°C
1
°C/W
5
Ws/°C
Assembly
Peak compressive force
applied to case (Z-axis)
Storage temperature
Supported by J-lead only
TST
lbs
5.41
lbs/in2
VTM48EF040T050B0R (T-Grade)
-40
125
VTM48EF040M050B0R (M-Grade)
-65
125
VTM48ET040T050B0R (T-Grade)
-40
125
VTM48ET040M050B0R (M-Grade)
-65
125
ESDHBM
Human Body Model,
“JEDEC JESD 22-A114-F”
1000
ESDCDM
Charge Device Model,
“JEDEC JESD 22-C101-D”
400
ESD withstand
6
°C
VDC
Soldering
Peak temperature during reflow
MSL 4 (Datecode 1528 and later)
245
°C
Peak time above 217°C
60
90
s
Peak heating rate during reflow
1.5
3
°C/s
Peak cooling rate post reflow
1.5
6
°C/s
VTM™ Current Multiplier
Page 11 of 21
Rev 1.3
11/2016
vicorpower.com
800 927.9474
VTM48Ex040y050B0R
General Characteristics (Cont.)
Specifications apply over all line and load conditions with power sourced from primary side unless otherwise noted; Boldface specifications apply over the
temperature range of -40ºC < TJ < 125ºC (T-Grade); All Other specifications are at TJ = 25°C unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
3200
3800
Unit
Safety
Isolation voltage (hipot)
CPRI_SEC
Isolation resistance
RPRI_SEC
MTBF
2250
VHIPOT
Isolation capacitance
2500
Unpowered unit
VDC
10
MΩ
MIL-HDBK-217 Plus Parts Count;
25ºC Ground Benign, Stationary,
Indoors / Computer Profile
3.8
MHrs
Telcordia Issue 2 - Method I Case 1;
Ground Benign, Controlled
5.7
MHrs
cTUVus
Agency approvals / standards
cURus
CE Marked for Low Voltage Directive and ROHS Recast Directive, as applicable
VTM™ Current Multiplier
Page 12 of 21
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Rev 1.3
11/2016
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Using the Control Signals VC, PC, TM, IM
The VTM Control (VC) pin is a primary referenced pin which
powers the internal VCC circuitry when within the specified voltage
range of 11.5V to 16.5V. This voltage is required for VTM current
multiplier start up and must be applied as long as the primary is
below 26V. In order to ensure a proper start, the slew rate of the
applied voltage must be within the specified range.
Some additional notes on the using the VC pin:
n
In most applications, the VTM module primary side will be
powered by an upstream PRM™ regulator which provides a
10ms VC pulse during start up. In these applications the VC
pins of the PRM regulator and VTM current multiplier should
be tied together.
n
In bi-directional applications, the primary of the VTM may
also be providing power to a PRM input. In these
applications, a proper VC voltage within the specified range
must be applied any time the primary voltage of the VTM is
below 26V.
n
The VC voltage can be applied indefinitely allowing for
continuous operation down to 0VPRI.
n
The fault response of the VTM module is latching. A positive
edge on VC is required in order to restart the unit. If VC is
continuously applied the PC pin may be toggled to restart
the VTM module.
Primary Control (PC) is a primary referenced pin that can be used
to accomplish the following functions:
n
Delayed start: Upon the application of VC, the PC pin will
source a constant 100µA current to the internal RC
network. Adding an external capacitor will allow further
delay in reaching the 2.5V threshold for module start.
n
Auxiliary voltage source: Once enabled in regular
operational conditions (no fault), each VTM PC provides a
regulated 5V, 2mA voltage source.
n
Disable: PC pin can be actively pulled down in order
to disable the module. Pull down impedance shall be lower
than 400Ω.
n
Fault detection flag: The PC 5V voltage source is internally
turned off as soon as a fault is detected. It is important to
notice that PC doesn’t have current sink capability. Therefore,
in an array, PC line will not be capable of disabling
neighboring modules if a fault is detected.
n
Fault reset: PC may be toggled to restart the unit if VC
is continuously applied.
Temperature Monitor (TM) is a primary referenced pin that
provides a voltage proportional to the absolute temperature of the
converter control IC.
n
Fault detection flag: The TM voltage source is internally
turned off as soon as a fault is detected. For system
monitoring purposes (microcontroller interface) faults are
detected on falling edges of TM signal.
Start Up Behavior
Depending on the sequencing of the VC voltage with respect
to the same voltage, whether the source is on the primary or
secondary, the behavior during start up will vary as follows:
n
Normal operation (VC applied prior to the source voltage):
In this case, the controller is active prior to the source
ramping. When the source voltage is applied, the VTM
module load voltage will track the source (See Figure 13).
The inrush current is determined by the source voltage rate
of rise and load capacitance. If the VC voltage is removed
prior to the primary voltage reaching 26V, the VTM may
shut down.
n
Stand-alone operation (VC applied after VPRI): In this case the
VTM secondary will begin to rise upon the application of the
VC voltage (See Figure 14). The Adaptive Soft Start Circuit may
vary the secondary voltage rate of rise in order to limit the inrush
current to its maximum level. When starting into high
capacitance, or a short, the secondary current will be limited for
a maximum of 1200µs. After this period, the Adaptive Soft Start
Circuit will time out and the VTM module may shut down. No
restart will be attempted until VC is re-applied or PC is toggled.
The maximum secondary capacitance is limited to 9100µF in this
mode of operation to ensure a successful start.
Thermal Considerations
VI Chip® products are multi-chip modules whose temperature
distribution varies greatly for each part number as well as with
the line/load conditions, thermal management and environmental
conditions. Maintaining the top of the VTM48EF040T050B0R case
to less than 100ºC will keep all junctions within the VI Chip module
below 125ºC for most applications.
The percent of total heat dissipated through the top surface
versus through the J-lead is entirely dependent on the particular
mechanical and thermal environment. The heat dissipated through
the top surface is typically 60%. The heat dissipated through the
J-lead onto the PCB board surface is typically 40%. Use 100% top
surface dissipation when designing for a conservative
cooling solution.
It is not recommended to use a VI Chip module for an extended
period of time at full load without proper heat sinking.
It can be used to accomplish the following functions:
n
Monitor the control IC temperature: The temperature in
Kelvin is equal to the voltage on the TM pin scaled
by 100. (i.e. 3.0V = 300K = 27ºC). If a heat sink is applied,
TM can be used to thermally protect the system.
VTM™ Current Multiplier
Page 13 of 21
Rev 1.3
11/2016
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Sine Amplitude Converter™ Point of Load Conversion
The Sine Amplitude Converter (SAC) uses a high frequency
resonant tank to move energy from primary to secondary or viceversa, depending on where the source is located. The resonant
tank is formed by Cr and leakage inductance Lr in the power
transformer windings. The resonant LC tank, operated at high
frequency, is amplitude modulated as a function of primary voltage
and secondary current. A small amount of capacitance embedded
in the primary and secondary stages of the module is sufficient for
full functionality and is key to achieving power density.
The VTM48EF040T050B0R SAC can be simplified into the
following model:
973pH
Isec
IOUT
Lpri = 5.7nH
+
V
VpriIN
RROUT
sec
Lsec = 600pH
2.5mΩ
R
Rcpri
CIN
0.57mΩ
CIN
C
pri
V•I
1/12 • Isec
2µF
IIQq
98mA
+
+
–
–
K
Rcsec
COUT
3.13Ω
+
430µΩ
1/12 • Vpri
CSEC
COUT
200µF
SEC
VVOUT
–
–
Figure 17 — VI Chip® module AC model
At no load:
VSEC = VPRI • K
(1)
The use of DC voltage transformation provides additional
interesting attributes. Assuming that RSEC = 0Ω and IQ = 0A, Eq. (3)
now becomes Eq. (1) and is essentially load independent, resistor R
is now placed in series with VPRI as shown in Figure 18.
K represents the “turns ratio” of the SAC.
Rearranging Eq (1):
K=
VSEC
VPRI
(2)
In the presence of load, VSEC is represented by:
VSEC = VPRI • K – ISEC • RSEC
R
R
VVin
pri
+
–
SAC™
SAC
1/12
KK == 1/32
Vout
V
SEC
(3)
and ISEC is represented by:
I –I
ISEC = PRI Q
K
(4)
RSEC represents the impedance of the SAC, and is a function of
the RDSON of the primary and secondary MOSFETs and the winding
resistance of the power transformer. IQ represents the quiescent
current of the SAC control and gate drive circuitry. For applications
where the source is located on the secondary side, equations 1 to
4 can be re-arranged to represent VPRI and IPRI as a function of VSEC
and ISEC.
VTM™ Current Multiplier
Page 14 of 21
Rev 1.3
11/2016
Figure 18 — K = 1/12 Sine Amplitude Converter™
with series primary resistor
The relationship between VPRI and Vsec becomes:
VSEC = (VPRI – IPRI • RSEC) • K
(5)
Substituting the simplified version of Eq. (4)
(IQ is assumed = 0A) into Eq. (5) yields:
VSEC = VPRI • K – ISEC • RSEC • K2
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VTM48Ex040y050B0R
This is similar in form to Eq. (3), where RSEC is used to represent the
characteristic impedance of the SAC™. However, in this case a real
R on the primary side of the SAC is effectively scaled by K 2 with
respect to the secondary.
Assuming that R = 1Ω, the effective R as seen from the secondary
side is 6.9mΩ, with K = 1/12 as shown in Figure 18.
A similar exercise should be performed with the additon of a
capacitor or shunt impedance at the primary to the SAC. A switch
in series with VIN is added to the circuit. This is depicted in
Figure 19.
A solution for keeping the impedance of the SAC low involves
switching at a high frequency. This enables small magnetic
components because magnetizing currents remain low. Small
magnetics mean small path lengths for turns. Use of low loss core
material at high frequencies also reduces core losses.
SS
VVin
pri
+
–
C
Low impedance is a key requirement for powering a highcurrent, low voltage load efficiently. A switching regulation stage
should have minimal impedance while simultaneously providing
appropriate filtering for any switched current. The use of a SAC
between the regulation stage and the point of load provides a
dual benefit of scaling down series impedance leading back to
the source and scaling up shunt capacitance or energy storage
as a function of its K factor squared. However, the benefits are
not useful if the series impedance of the SAC is too high. The
impedance of the SAC must be low, i.e. well beyond the crossover
frequency of the system.
™
SAC
SAC
K = 1/12
K = 1/32
VVout
sec
The two main terms of power loss in the VTM module are:
n
No load power dissipation (PNL): defined as the power used to
power up the module with an enabled powertrain at no load.
Figure 19 — Sine Amplitude Converter™ with primary capacitor
A change in VPRI with the switch closed would result in a change in
capacitor current according to the following equation:
IC(t) = C
dVPRI
dt
(7)
n
Resistive loss (RSEC): refers to the power loss across the VTM
modeled as pure resistive impedance.
PDISSIPATED = PNL + PR
(10)
SEC
Therefore,
PSEC = PPRI – PDISSIPATED = PPRI – PNL – PR
SEC
Assume that with the capacitor charged to VPRI, the switch is
opened and the capacitor is discharged through the idealized SAC.
In this case,
IC = ISEC • K
(8)
Substituting Eq. (1) and (8) into Eq. (7) reveals:
ISEC = C2
K
•
dVSEC
dt
VTM™ Current Multiplier
Page 15 of 21
The above relations can be combined to estimate the overall
module efficiency:
η=
=
PPRI – PNL – PR
PSEC
SEC
=
PPRI
PPRI
Rev 1.3
11/2016
(12)
VPRI • IPRI – PNL – (ISEC)2 • RSEC
(9)
The equation in terms of the secondary has yielded a K 2 scaling
factor for C, specified in the denominator of the equation.
A K factor less than unity, results in an effectively larger
capacitance on the secondary when expressed in terms of the
primary. With a K = 1/12 as shown in Figure 19, C = 1µF would
appear as C = 144µF when viewed from the secondary. Note that
in situations where the souce voltage is located on the secondary
side, the effect is reversed and effective valve of capacitance
located on the secondary side is divided by a factor of 1/K 2 when
reflected to the primary.
(11)
=1–
(
VPRI • IPRI
PNL + (ISEC)2 • RSEC
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)
VTM48Ex040y050B0R
Primary and Secondary Filter Design
A major advantage of a SAC™ system versus a conventional PWM
converter is that the former does not require large functional
filters. The resonant LC tank, operated at extreme high frequency,
is amplitude modulated as a function of primary voltage and
secondary current and efficiently transfers charge through the
isolation transformer. A small amount of capacitance embedded in
the primary and secondary stages of the module is sufficient for full
functionality and is key to achieving high power density.
This paradigm shift requires system design to carefully evaluate
external filters in order to:
n
Guarantee low source impedance.
To take full advantage of the VTM module dynamic response,
the impedance presented to its input terminals must be low
from DC to approximately 5MHz. Input capacitance may be
added to improve transient performance or compensate for high
source impedance.
n
Further reduce input and/or output voltage ripple without
sacrificing dynamic response.
Given the wide bandwidth of the VTM module, the source
response is generally the limiting factor in the overall system
response. Anomalies in the response of the source will appear at
the output of the VTM module multiplied by its K factor.
n
Protect the module from overvoltage transients imposed
by the system that would exceed maximum ratings and
cause failures.
The VI Chip® module input/output voltage ranges must not
be exceeded. An internal overvoltage lockout function prevents
operation outside of the normal operating input range. Even
during this condition, the powertrain is exposed to the applied
voltage and power MOSFETs must withstand it.
Capacitive Filtering Considerations
for a Sine Amplitude Converter™
It is important to consider the impact of adding input and output
capacitance to a Sine Amplitude Converter on the system as a
whole. Both the capacitance value and the effective impedance of
the capacitor must be considered.
A Sine Amplitude Converter has a DC ROUT value which has already
been discussed in Page 13. The AC ROUT of the SAC contains
several terms:
n
Resonant tank impedance
n
Input lead inductance and internal capacitance
n
Output lead inductance and internal capacitance
The values of these terms are shown in the behavioral model in
Page 13. It is important to note on which side of the transformer
these impedances appear and how they reflect across the
transformer given the K factor.
The overall AC impedance varies from model to model. For most
models it is dominated by DC ROUT value from DC to beyond
500KHz. The behavioral model in Page 13 should be used to
approximate the AC impedance of the specific model.
Any capacitors placed at the output of the VTM module reflect
back to the input of the module by the square of the K factor
(Eq. 9) with the impedance of the module appearing in series. It is
very important to keep this in mind when using a PRM™ regulator
to power the VTM module. Most PRM modules have a limit on
the maximum amount of capacitance that can be applied to the
output. This capacitance includes both the PRM output capacitance
and the VTM module output capacitance reflected back to the
input. In PRM module remote sense applications, it is important to
consider the reflected value of VTM module output capacitance
when designing and compensating the PRM module control loop.
Capacitance placed at the input of the VTM module appear to
the load reflected by the K factor with the impedance of the VTM
module in series. In step-down ratios, the effective capacitance
is increased by the K factor. The effective ESR of the capacitor is
decreased by the square of the K factor, but the impedance of the
module appears in series. Still, in most step-down VTM modules
an electrolytic capacitor placed at the input of the module will have
a lower effective impedance compared to an electrolytic capacitor
placed at the output. This is important to consider when placing
capacitors at the output of the module. Even though the capacitor
may be placed at the output, the majority of the AC current will be
sourced from the lower impedance, which in most cases will be the
module. This should be studied carefully in any system design using
a module. In most cases, it should be clear that electrolytic output
capacitors are not necessary to design a stable,
well-bypassed system.
VTM™ Current Multiplier
Page 16 of 21
Rev 1.3
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Current Sharing
Fuse Selection
The SAC™ topology bases its performance on efficient transfer
of energy through a transformer without the need of closed
loop control. For this reason, the transfer characteristic can be
approximated by an ideal transformer with some resistive drop and
positive temperature coefficient.
In order to provide flexibility in configuring power systems
VI Chip® products are not internally fused. Input line fusing of
VI Chip products is recommended at system level to provide
thermal protection in case of catastrophic failure.
This type of characteristic is close to the impedance characteristic
of a DC power distribution system, both in behavior (AC dynamic)
and absolute value (DC dynamic).
The fuse shall be selected by closely matching system
requirements with the following characteristics:
n
Current rating
(usually greater than maximum current of VTM module)
When connected in an array with the same K factor, the VTM
module will inherently share the load current (typically 5%) with
parallel units according to the equivalent impedance divider that
the system implements from the power source to the point of load.
n
Maximum voltage rating
(usually greater than the maximum possible input voltage)
Some general recommendations to achieve matched array
impedances:
n
Nominal melting I2t
n
Dedicate common copper planes within the PCB to deliver
and return the current to the modules.
n
Provide the PCB layout as symmetric as possible.
n
Apply same input / output filters (if present) to each unit.
For further details see:
AN:016 Using BCM® Bus Converters in High Power Arrays.
VPRI
ZPRI_EQ1
–
ZSEC_EQ1
RS_1
ZPRI_EQ2
+
VTM®1
VTM®2
n
Ambient temperature
Bi-Directional Operation
The VTM48EF040T050B0R is capable of bi-directional operation. If
a voltage is present at the secondary which satisfies the condition
VSEC > VPRI • K at the time the VC voltage is applied, or after the
unit has started, then energy will be transferred from secondary
to primary. The primary to secondary ratio will be maintained. The
VTM48EF040T050B0R will continue to operate bi-directional as
long as the primary and secondary are within the specified limits.
VSEC
ZSEC_EQ2
RS_2
DC
Load
ZPRI_EQn
VTM®n
ZSEC_EQn
RS_n
Figure 20 — VTM module array
VTM™ Current Multiplier
Page 17 of 21
Rev 1.3
11/2016
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J-Lead Package Mechanical Drawing
mm
(inch)
NOTES:
NOTES:
mm
2. DIMENSIONS ARE inch
mm.
2.UNLESS
DIMENSIONS
ARE inch
.
OTHERWISE
SPECIFIED,
TOLERANCES ARE:
3. .XUNLESS
/ [.XX] = OTHERWISE
+/-0.25 / [.01];SPECIFIED,
.XX / [.XXX] TOLERANCES
= +/-0.13 / [.005]ARE:
.X / [.XX] = MARKING
+/-0.25 / [.01];
[.XXX] = +/-0.13 / [.005]
43.
. PRODUCT
ON .XX
TOP/ SURFACE
4. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
DXF and PDF files are available on vicorpower.com
J-Lead Package Recommended Land Pattern
+PRI
+PRI
+SEC1
+SEC1
-SEC1
-SEC1
+SEC2
+SEC2
-PRI
-PRI
-SEC2
-SEC2
mm
2. DIMENSIONS ARE inch
mm.
2.UNLESS
DIMENSIONS
ARE
.
OTHERWISEinch
SPECIFIED,
TOLERANCES ARE:
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
VTM™ Current Multiplier
Page 18 of 21
Rev 1.3
11/2016
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
.X / [.XX] = MARKING
+/-0.25 / [.01];
[.XXX] = +/-0.13 / [.005]
43.
. PRODUCT
ON .XX
TOP/ SURFACE
4. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
DXF and PDF files are available on vicorpower.com
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Through-Hole Package Mechanical Drawing
mm
(inch)
NOTES:
mm
2. DIMENSIONS ARE inch .
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
NOTES:
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
4. PRODUCT MARKING ON TOP SURFACE
mm
DXF
PDF files are
available
2. and
DIMENSIONS
ARE
inch . on vicorpower.com
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
4. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
Through-Hole Package Recommended Land Pattern
+PRI
+SEC1
-SEC1
+PRI
+SEC1
+SEC2
-SEC1
-PRI
-SEC2
+SEC2
-PRI
-SEC2
mm
2. DIMENSIONS ARE inch .
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
mm
2. DIMENSIONS ARE inch .
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
VTM™ Current Multiplier
Page 19 of 21
Rev 1.3
11/2016
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
4. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
4. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
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Recommended Heat Sink Push Pin Location
(NO GROUNDING CLIPS)
(WITH GROUNDING CLIPS)
Notes:
1. Maintain 3.50 (0.138) Dia. keep-out zone
free of copper, all PCB layers.
2. (A) Minimum recommended pitch is 39.50 (1.555).
This provides 7.00 (0.275) component
edge-to-edge spacing, and 0.50 (0.020)
clearance between Vicor heat sinks.
(B) Minimum recommended pitch is 41.00 (1.614).
This provides 8.50 (0.334) component
edge-to-edge spacing, and 2.00 (0.079)
clearance between Vicor heat sinks.
3. VI Chip® module land pattern shown for reference
only; actual land pattern may differ.
Dimensions from edges of land pattern
to push–pin holes will be the same for
all full-size VI Chip® products.
5. Unless otherwise specified:
Dimensions are mm (inches)
tolerances are:
x.x (x.xx) = ±0.3 (0.01)
x.xx (x.xxx) = ±0.13 (0.005)
4. RoHS compliant per CST–0001 latest revision.
6. Plated through holes for grounding clips (33855)
shown for reference, heat sink orientation and
device pitch will dictate final grounding solution.
VTM Module Pin Configuration
4
3
2
+SEC
B
B
C
C
D
D
F
G
H
H
J
J
+SEC
-SEC
+PRI
E
E
-SEC
1
A
A
K
K
L
L
M
M
N
N
P
P
R
R
TM
VC
PC
-PRI
T
T
ignal Name
S
+PRI
–PRI
TM
VC
PC
+SEC
–SEC
Pin Designation
A1-E1, A2-E2
L1-T1, L2-T2
H1, H2
J1, J2
K1, K2
A3-D3, A4-D4, J3-M3, J4-M4
E3-H3, E4-H4, N3-T3, N4-T4
Bottom View
VTM™ Current Multiplier
Page 20 of 21
Rev 1.3
11/2016
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Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and
accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom
power systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor makes no
representations or warranties with respect to the accuracy or completeness of the contents of this publication. Vicor reserves the right to make
changes to any products, specifications, and product descriptions at any time without notice. Information published by Vicor has been checked and
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are used to the extent Vicor deems necessary to support Vicor’s product warranty. Except where mandated by government requirements, testing of
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Specifications are subject to change without notice.
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granted by this document. Interested parties should contact Vicor’s Intellectual Property Department.
The products described on this data sheet are protected by the following U.S. Patents Numbers:
5,945,130; 6,403,009; 6,710,257; 6,911,848; 6,930,893; 6,934,166; 6,940,013; 6,969,909; 7,038,917; 7,145,186; 7,166,898; 7,187,263;
7,202,646; 7,361,844; D496,906; D505,114; D506,438; D509,472; and for use under 6,975,098 and 6,984,965.
Vicor Corporation
25 Frontage Road
Andover, MA, USA 01810
Tel: 800-735-6200
Fax: 978-475-6715
email
Customer Service: custserv@vicorpower.com
Technical Support: apps@vicorpower.com
VTM™ Current Multiplier
Page 21 of 21
Rev 1.3
11/2016
vicorpower.com
800 927.9474