SI9130_11

Not recommended for new designs, please refer to Si786 Si9130 Vishay Siliconix Pin-Programmable Dual Controller - Portable PCs FEATURES • Fixed 5 V and Programmable 3.3 V, 3.45 V, or 3.6 V Step-Down Converters • Less than 500 µA Quiescent Current per Converter • 25 µA Shutdown Current • 5.5 V to 30 V Operating Range DESCRIPTION The Si9130 Pin-programmable Dual Controller for Portable PCs is a pin-programmable version of the Si786 dual-output power supply controller for notebook computers. The Buck controllers provide 5 V and a pin-programmable output delivering 3.3 V, 3.45 V, or 3.6 V. The circuit is a system level integration of two step-down controllers and micropower 5 V and 3.3 V linear regulators. The controllers perform high efficiency conversion of the battery pack energy (typically 12 V) or the output of an ac to dc wall converter (typically 18 V to 24 V dc) to 5 V and 3.3 V system supply voltages. The micropower linear regulator can be used to keep power management and back-up circuitry alive during the shutdown of the step-down converters. A complete power conversion and management system can be implemented with the Si9130 Pin-programmable Dual Controller for Portable PCs, an inexpensive linear regulator, the Si9140 SMP Controller for High Performance Processor Power Supplies, five Si4410 N-Channel TrenchFET® Power MOSFETs, one Si4435 P-Channel TrenchFET Power MOSFET, and two Si9712 PC Card (PCMCIA) Interface Switches. The Si9130 is available in both standard and lead (Pb)-free 28-pin SSOP packages and specified to operate over the commercial (0 °C to 70 °C) and extended commercial (- 10 °C to 90 °C) temperature ranges. See Ordering Information for corresponding part numbers. FUNCTIONAL BLOCK DIAGRAM 5.5 V to 30 V Power Section 3.3 V SHUTDOWN 5 V ON/OFF 3.3 V ON/OFF SYNC Si9130 5V µP Memory Peripherals Document Number: 70190 S11-0975-Rev. G, 16-May-11 www.vishay.com 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9130 Vishay Siliconix ABSOLUTE MAXIMUM RATINGS Parameter V+ to GND PGND to GND VL to GND BST3, BST5 to GND LX3 to BST3 LX5 to BST5 Inputs/Outputs to GND (3.45 ADJ, 3.6 ADJ, SHDN, ON5, REF, SS5, CS5, FB5, SYNC, CS3, FB3, SS3, ON3) DL3, DL5 to PGND DH3 to LX3 DH5 to LX5 REF, VL Short to GND REF Current VL Current Continuous Power Dissipation (TA = 70 °C)a Operating Temperature Range: Lead Temperature (soldering, 10 sec) Notes: a. Device Mounted with all leads soldered or welded to PC board. b. Derate 9.52 mW/°C above 70 °C. Exposure to Absolute Maximum rating conditions for extended periods may affect device reliability. Stresses above Absolute Maximum rating may cause permanent damage. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum rating should be applied at any one time. Limit - 0.3 to 36 ±2 - 0.3 to 7 - 0.3 to 36 - 7 to 0.3 - 7 to 0.3 - 0.3, (VL + 0.3) - 0.3, (VL + 0.3) - 0.3 (BST3 + 0.3) - 0.3 (BST5 + 0.3) Momentary 20 50 28-Pin SSOPb Si9130CG Si9130LG 762 0 to 70 - 10 to 90 300 Unit V mA mW °C SPECIFICATIONS Parameter 3.3 V and 5 V Step-Down Controllers Input Supply Range FB5 Output Voltage 0 mV < (CS5 - FB5) < 70 mV, 6 V < V + < 30 V (includes load and line regulation) 3.6 ADJ = 3.45 ADJ = OPEN FB3 Output Voltage 0 mV < (CS3 - FB3) < 70 mV 6 V < V + < 30 V (includes load and line regulation) 3.6 ADJ = OPEN 3.45 ADJ = GND 3.6 ADJ = GND 3.45 ADJ = OPEN 5.5 4.80 3.17 3.32 3.46 5.08 3.35 3.50 3.65 2.5 0.03 80 2.5 2 ON5 = ON3 = 0, 5.5 < V+ < 30 0 mA < IL < 25 mA Falling Edge, Hysteresis = 1 % 100 4.0 120 6.5 30 5.20 3.46 3.60 3.75 % %/V mV µA mA V Specific Test Conditions V+ = 15 V, IVL = IREF = 0 mA, SHDN = ON3 = ON5 = 5 V Other Digital Input Levels 0 V or 5 V, TA = TMIN to TMAX Limits Min.a Typ.b Max.a Unit Load Regulation Line Regulation Current-Limit Voltage SS3/SS5 Source Current SS3/SS5 Fault Sink Current Internal Regulator and Reference VL Output Voltage VL Fault Lockout Voltage Either Controller (CS_ to FB_ = 0 to 70 mV) Either Controller (V+ = 6 to 30) CS3 - FB3 or CS5 - FB5 4.5 3.6 5.5 4.2 V www.vishay.com 2 Document Number: 70190 S11-0975-Rev. G, 16-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9130 Vishay Siliconix SPECIFICATIONS Parameter Internal Regulator and Reference VL/FB5 Switchover Voltage REF Output Voltage REF Fault Lockout Voltage REF Load Regulation V+ Shutdown Current V+ Standby Current Quiescent Power Consumption (both PWM controllers on) V+ Off Current Oscillator and Inputs/Outputs Oscillator Frequency SYNC High Pulse Width SYNC Low Pulse Width SYNC Rise/Fall Time Oscillator SYNC Range Maximum Duty Cycle Input Low Voltage Input High Voltage Input Current DL3/DL5 Sink/Source Current DH3/DH5 Sink/Source Current DL3/DL5 On-Resistance DH3/DH5 On-Resistance SYNC = 3.3 V SYNC = 0 V, 5 V SHDN, ON3, ON5 SYNC SHDN, ON3, ON5 SYNC SHDN, ON3, ON5, VIN = 0 V, 5 V VOUT = 2 V BST3 - LX3 = BST5 - LX5 = 4.5 V, VOUT = 2 V High or Low High or Low BST3 - LX3 = BST5 - LX5 = 4.5 V 1 1 7 7  2.4 VL - 0.5 ±1 µA A Not Tested 240 89 92 92 95 0.8 V SYNC = 3.3 V SYNC = 0 V, 5 V 270 170 200 200 200 350 kHz % ns 300 200 330 230 kHz Rising Edge of FB5, Hysteresis = 1 % No External Load Falling Edge 0 mA < IL < 5 mAd SHDN = ON3 = ON5 = 0 V, V+ = 30 V ON3 = ON5 = 0 V, V+ = 30 V FB5 = CS5 = 5.25 V FB3 = CS3 = 3.5 V FB5 = CS5 = 5.25 V, VL Switched Over to FB5 c Specific Test Conditions V+ = 15 V, IVL = IREF = 0 mA, SHDN = ON3 = ON5 = 5 V Other Digital Input Levels 0 V or 5 V, TA = TMIN to TMAX Limits Min.a Typ.b Max.a Unit 4.2 3.24 2.4 30 25 70 5.5 30 4.7 3.36 3.2 75 40 110 8.6 60 mV µA mV µA V Notes: a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. c. The main switching outputs track the reference voltage. Loading the reference reduces the main outputs slightly according to the closed-loop gain (AVCL) and the reference voltage load-regulation error. AVCL for the 3.3 V supply is unity gain. AVCL for the 5 V supply is 1.54. d. Since the reference uses VL as its supply, its V+ line regulation error is insignificant. Document Number: 70190 S11-0975-Rev. G, 16-May-11 www.vishay.com 3 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9130 Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C unless noted) 100 VIN = 6 V 90 VIN = 15 V VIN = 30 V 70 SYNC = 0 V, 3.3 V Off 60 60 90 100 VIN = 6 V Efficiency (%) Efficiency (%) 80 80 VIN = 30 V 70 3.3 V Off VIN = 15 V 50 0.001 0.01 0.1 5 V Output Current (A) 1 10 50 0.001 0.01 0.1 5 V Output Current (A) 1 10 Efficiency vs. 5 V Output Current, 200 kHz 100 100 Efficiency vs. 5 V Output Current, 300 kHz VIN = 6 V 90 VIN = 6 V Efficiency (%) Efficiency (%) 80 VIN = 15 V VIN = 30 V SYNC = 0 V, 5 V On 60 60 80 VIN = 15 V VIN = 30 V 5 V On 90 70 70 50 0.001 0.01 0.1 3.3 V Output Current (A) 1 10 50 0.001 0.01 0.1 1 10 3.3 V Output Current (A) Efficiency vs. 3.3 V Output Current, 200 kHz 30 0.5 Efficiency vs. 3.3 V Output Current, 300 kHz Quiescent Supply Current (mA) 25 Standby Supply Current (mA) 0.4 20 ON3 = ON5 = High 15 0.3 ON3 = ON5 = 0 V 0.2 10 5 0.1 0 0 6 12 18 24 30 0.0 0 6 12 18 24 30 Supply Voltage (V) Supply Voltage (V) Quiescent Supply Current vs. Supply Voltage Standby Supply Current vs. Supply Voltage www.vishay.com 4 Document Number: 70190 S11-0975-Rev. G, 16-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9130 Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C unless noted) 100 Mimimum V IN to VOUT Differential (V) SHDN = 0 V 75 1.0 5 V Output Still Regulating 0.8 Shutdown Supply Current (µA) 0.6 300 kHz 0.4 200 kHz 0.2 50 25 0 0 6 12 18 24 30 Supply Voltage (V) 0.0 0.001 0.01 0.1 5 V Output Current (A) 1 10 Shutdown Supply Current vs. Supply Voltage Minimum VIN to VOUT Differential vs. 5 V Output Current 1000.0 SYNC = REF (300 kHz) ON3 = ON5 = 5 V Switching Frequency (kHz) 100.0 10.0 5 V, VIN = 30 V 5 V, VIN = 7.5 V 1.0 3.3 V, VIN = 7.5 V 0.1 0.1 1 10 Load Current (mA) 100 1000 Switching Frequency vs. Load Current 5 V Output 50 mV/div LX 10 V/div 2 V/div 5 V Output 50 mV/div 200 µS/div ILoad = 100 mA VIN = 10 V 500 ns/div 5 V Output Current = 1 A VIN = 16 V Pulse-Skipping Waveforms Pulse-Width Modulation Mode Waveforms Document Number: 70190 S11-0975-Rev. G, 16-May-11 www.vishay.com 5 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9130 Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C unless noted) 3A LOAD CURRENT 3A LOAD CURRENT 0A 0A 5 V Output 50 mV/div 3.3 V Output 50 mV/div 200 µS/div VIN = 15 V 200 µS/div VIN = 15 V 5 V Load-Transient Response 3.3 V Load-Transient Response 5 V Output 50 mV/div 5 V Output 50 mV/div VIN, 10 to 16 V 2 V/div VIN, 16 to 10 V 2 V/div 20 µS/div ILOAD = 2 A 20 µS/div ILOAD = 2 A 5 V Line-Transient Response, Rising 5 V Line-Transient Response, Falling 3.3 V Output 50 mV/div 3.3 V Output 50 mV/div VIN, 10 to 16 V 2 V/div VIN, 16 to 10 V 2 V/div 20 µS/div ILOAD = 2 A 20 µS/div ILOAD = 2 A 3.3 V Line-Transient Response, Rising 3.3 V Line-Transient Response, Falling www.vishay.com 6 Document Number: 70190 S11-0975-Rev. G, 16-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9130 Vishay Siliconix PIN CONFIGURATION AND DESCRIPTION CS3 SS3 ON3 NC NC NC 3.6ADJ 3.45ADJ GND REF SYNC SHDN ON5 SS5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Top View 28 27 26 25 24 23 FB3 DH3 LX3 BST3 DL3 V+ VL FB5 PGND DL5 BST5 LX5 DH5 CS5 ORDERING INFORMATION Standard Part Number Si9130CG Si9130CG-T1 Si9130CG-T1-E3 Si9130LG Si9130LG-T1 Si9130LG-T1-E3 Lead (Pb)-free Part Number Temperature Range 0 to 70 °C - 10 to 90 °C VOUT 5 V and 3.3 V 3.45 V or 3.6 V SSOP-28 22 21 20 19 18 17 16 15 Demo Board Si9130DB Temperature Range 0 to 70 °C Board Type Surface Mount PIN DESCRIPTION Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Symbol CS3 SS3 ON3 NC NC NC 3.6 ADJ 3.45 ADJ GND REF SYNC SHDN ON5 SS5 CS5 DH5 LX5 BST5 DL5 PGND FB5 VL V+ DL3 BST3 LX3 DH3 FB3 Description Current-sense input for 3.3 V Buck controller - this pins over current threshold is 100 mV with respect to FB3. Soft-start input for 3.3 V. Connect capacitor from SS3 to GND. ON/OFF logic input disables the 3.3 V Buck controller. Connect directly to VL for automatic turn-on. Not internally connected. Not internally connected. Not internally connected. Control input to select 3.6 V output. See Voltage Selection Table for input and output combinations. Control input to select 3.45 V output. See Voltage Selection Table for input and output combinations. Analog ground. 3.3 V reference output. Supplies external loads up to 5 mA. Oscillator control/synchronization input. Connect capacitor to GND, 1 µF/mA output or 0.22 µF minimum. For external clock synchronization, a rising edge starts a new cycle to start. To use internal 200 kHz oscillator, connect to VL or GND. For 300 kHz oscillator, connect to REF. Shutdown logic input, active low. Connect to VL for automatic turn-on. The 5 V VL supply will not be disabled in shutdown allowing connection to SHDN. ON/OFF logic input disables the 5 V Buck Controller. Connect to VL for automatic turn-on. Soft-start control input for 5 V Buck controller. Connect capacitor from SS5 to GND. Current-sense input for 5 V Buck controller - this pins over current threshold is 100 mV referenced to FB3. Gate-drive output for the 5 V supply high-side N-Channel MOSFET. Inductor connection for the 5 V supply. Boost capacitor connection for the 5 V supply. Gate-drive output for the 5 V supply rectifying N-Channel MOSFET. Power Ground. Feedback input for the 5 V Buck controller. 5 V logic supply voltage for internal circuitry - able to source 5 mA external loads. VL remains on with valid voltage at V+. Supply voltage input. Gate-drive output for the 3.3 V supply rectifying N-Channel MOSFET. Boost capacitor connection for the 3.3 V supply. Inductor connection for the 3.3 V supply. Gate-drive output for the 3.3 V supply high-side N-Channel MOSFET. Feedback input for the 3.3 V Buck controller. Document Number: 70190 S11-0975-Rev. G, 16-May-11 www.vishay.com 7 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9130 Vishay Siliconix VOLTAGE SELECTION TABLE Input 3.45 ADJ OPEN GND OPEN 3.6 ADJ OPEN OPEN GND Output FB3 3.3 V 3.45 V 3.6 V DESCRIPTION OF OPERATION The Si9130 is a dual step-down converter, which takes a 5.5 V to 30 V input and supplies power via two PWM controllers (see Figure 1). These 5 V and 3.3 V supplies run on an optional 300 kHz or 200 kHz internal oscillator, or an external sync signal. Amount of output current is limited by external components, but can deliver greater than 6 A on either supply. As well as these two main Buck controllers, additional loads can be driven from two micropower linear regulators, one 5 V (VL) and the other 3.3 V (REF) - see Figure 2. These supplies are each rated to deliver 5 mA. If the linear regulator circuits fall out of regulation, both Buck controllers are shut down. INPUT 5.5 V to 30 V C1 22 µF D2A 1N4148 C5 0.1 µF N1 R1 25 mΩ + 3.3 V at 3 A D1 D1FS4 N3 24 19 N3 D1 D1FS4 L1 10 H 23 25 27 26 100 0.1 µF D2B 1N4148 VL BST5 DH5 LX5 22 18 16 17 N2 L2 10 µH R2 25 mΩ C4 0.1 µF 4.7 µF C10 22 µF + 5 V at 5 mA 3.3 V PWM Voltage Selection (Pins 3.45 ADJ, 3.6 ADJ) The voltage at this output can be selected to 3.3 V, 3.45 V or 3.6 V, depending on the configuration of pins 3.45 ADJ and 3.6 ADJ. Leaving both pins open results in 3.3V nominal output. Grounding pin 3.45 ADJ while leaving 3.6 ADJ open delivers 3.45 V nominal output. Grounding 3.6 ADJ while leaving 3.45 ADJ open sets a 3.6 V nominal output. Si9130 V+ BST3 DH3 LX3 + 5 V at 3 A C7 150 µF C12 150 µF DL3 CS3 FB3 SS3 ON3 ON5 SHDN SYNC GND REF DL5 CS5 FB5 SS5 C6 330 µF 1 (Note 1) C9 0.01 F + 3.3 V ON/OFF + 5 V ON/OFF SHUTDOWN OSC SYNC 28 2 3 13 12 11 9 10 15 21 14 (Note 1) C8 0.01 µF 3.45 V Voltage Adjust 3.45ADJ 8 3.6ADJ 7 3.6 V Voltage Adjust PGND 20 + 3.3 V at 5 mA Note 1: Use short, Kelvin-connected PC board traces placed very close to one another. C3 1 µF Figure 1. Si9130 Application Circuit www.vishay.com 8 Document Number: 70190 S11-0975-Rev. G, 16-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9130 Vishay Siliconix 3.3 V Switching Supply The 3.3 V supply is regulated by a current-mode PWM controller in conjunction with several externals: two N-Channel MOSFETs, a rectifier, an inductor and output capacitors (see Figure 1). The gate drive supplied by DH3 needs to be greater than VL , so it is provided by the bootstrap circuit consisting of a 100 nF capacitor and diode connected to BST3. A low-side switching MOSFET connected to DL3 increases efficiency by reducing the voltage across the rectifier diode. A low value sense resistor in series with the inductor sets the maximum current limit, to disallow current overloads at power-on or in short-circuit situations. The soft-start feature on the Si9130 is capacitor programmable; pin SS3 functions as a constant current source to the external capacitor connected to GND. Excess currents at power-on are avoided, and power-supplies can be sequenced with different turn-on delay times by selecting the correct capacitor value. 5 V Switching Supply The 5 V supply is regulated by a current-mode PWM controller which is nearly the same as the 3.3 V output. The dropout voltage across the 5 V supply, as shown in the schematic in Figure 1, is 400 mV (typ) at 2 A. If the voltage at V+ falls, nearing 5 V, the 5 V supply will lower as well, until the VL linear regulator output falls below the 4 V undervoltage lockout threshold. Below this threshold, the 5 V controller is shut off. The frequency of both PWM controllers is set at 300 kHz when the SYNC pin is tied to REF. Connecting SYNC to either GND or VL sets the frequency at 200 kHz. V+ VL 3.45ADJ 3.6ADJ REF SHDN + 5 V LDO Linear Regulator 3.3 V PWM Controller (See Figure 3) ON FB3 CS3 BST3 DH3 LX3 DL3 4.5 V SS3 + 3.3 V Reference ON 4V PGND ON3 FB5 2.8 V 300 kHz/200 kHz ON Oscillator STANDBY 5V PWM Controller (See Figure 3) CS5 BST5 DH5 LX5 DL5 ON SS5 SYNC ON5 Figure 2. Si9130 Block Diagram Document Number: 70190 S11-0975-Rev. G, 16-May-11 www.vishay.com 9 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9130 Vishay Siliconix CS_ 1X REF, 3.3 V (or Internal 5 V Reference) 60 kHz LPF FB_ Summing Comparator BST_ R S OSC Q Level Shift DH_ LX_ Slope Comp 25 mV Minimum Current (Pulse-Skipping Mode) VL 4 µA 0 mV to 100 mV 30R ON_ 3.3 V 1R Current Limit ShootThrough Control SS_ Synchronous Rectifier Control R S Q Level Shift VL DL_ PGND Figure 3. Si9130 Controller Block Diagram 3.3 V and 5 V Switching Controllers Each PWM controller on the Si9130 is identical with the exception of the preset output voltages. The controllers only share three functional blocks (see Figure 3): the oscillator, the voltage reference (REF) and the 5 V logic supply (VL). The 3.3 V and 5 V controllers are independently enabled with pins ON3 and ON5, respectively. The PWMs are a directsumming type, without the typical integrating error amplifier along with the phase shift which is a side effect of this type of topology. Feedback compensation is not needed, as long as the output capacitance and its ESR requirements are met, according to the Design Considerations section of this data sheet. The main PWM comparator is an open loop device which is comprised of three comparators summing four signals: the feedback voltage error signal, current sense signal, slopecompensation ramp and voltage reference as shown in Figure 3. This method of control comes closer to the ideal of maintaining the output voltage on a cycle-by-cycle basis. When the load demands high current levels, the controller is in full PWM mode. Every cycle from the oscillator asserts the output latch and drives the gate of the high-side MOSFET for a period determined by the duty cycle (approximately VOUT/VIN x 100 %) and the frequency. The high-side switch turns off, setting the synchronous rectifier latch and 60 ns later, the rectifier MOSFET turns on. The low-side switch stays on until the start of the next clock www.vishay.com 10 Document Number: 70190 S11-0975-Rev. G, 16-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9130 Vishay Siliconix cycle in continuous mode, or until the inductor current becomes positive again, in discontinuous mode. In overcurrent situations, where the inductor current is greater than the 100 mV current-limit threshold, the high-side latch is reset and the high-side gate drive is shut off. During low-current load requirements, the inductor current will not deliver the 25 mV minimum current threshold. The Minimum Current comparator signals the PWM to enter pulse-skipping mode when the threshold has not been reached. pulse-skipping mode skips pulses to reduce switching losses, the losses which decrease efficiency the most at light load. Entering this mode causes the minimum current comparator to reset the high-side latch at the beginning of each oscillator cycle. Soft-Start To slowly bring up the 3.3 V and 5 V supplies, connect capacitors from SS3 and SS5 to GND. Asserting ON3 or ON5 starts a 4 A constant current source to charge these capacitors to 4 V. As the voltage on these pins ramps up, so does the current limit comparator threshold, to increase the duty cycle of the MOSFETs to their maximum level. If ON3 or ON5 are left low, the respective capacitor is discharged to GND. Leaving the SS3 or SS5 pins open will cause either controller to reach the terminal over-current level within 10 µs. Soft start helps prevent current spikes at turn-on and allows separate supplies to be delayed using external programmability. Synchronous Rectifiers Synchronous rectification replaces the Schottky rectifier with a MOSFET, which can be controlled to increase the efficiency of the circuit. When the high-side MOSFET is switched off, the inductor will try to maintain its current flow, inverting the inductor’s polarity. The path of current then becomes the circuit made of the Schottky diode, inductor and load, which will charge the output capacitor. The diode has a 0.5 V forward voltage drop, which contributes a significant amount of power loss, decreasing efficiency. A low-side switch is placed in parallel with the Schottky diode and is turned on just after the diode begins to conduct. Because the rDS(ON) of the MOSFET is low, the I*R voltage drop will not be as large as the diode, which increases efficiency. The low-side rectifier is shut off when the inductor current drops to zero. Shoot-through current is the result when both the high-side and rectifying MOSFETs are turned on at the same time. Break-before-make timing internal to the Si9130 manages this potential problem. During the time when neither MOSFET is on, the Schottky is conducting, so that the body diode in the low-side MOSFET is not forced to conduct. Level Translator PWM DH_ Synchronous rectification is always active when the Si9130 is powered-up, regardless of the operational mode. Gate-Driver Boost The high-side N-Channel drive is supplied by a flyingcapacitor boost circuit (see Figure 4). The capacitor takes a charge from VL and then is connected from gate to source of the high-side MOSFET to provide gate enhancement. At power-up, the low-side MOSFET pulls LX_ down to GND and charges the BST_ capacitor connected to 5 V. During the second half of the oscillator cycle, the controller drives the gate of the high-side MOSFET by internally connecting node BST_ to DH_. This supplies a voltage 5 V higher than the battery voltage to the gate of the high-side MOSFET. Oscillations on the gates of the high-side MOSFET in discontinuous mode are a natural occurrence caused by the LC network formed by the inductor and stray capacitance at the LX_ pins. The negative side of the BST_ capacitor is connected to the LX_ node, so ringing at the inductor is translated through to the gate drive. BATTERY INPUT VL VL BST_ LX_ VL DL_ Figure 4. Boost Supply for Gate Drivers Document Number: 70190 S11-0975-Rev. G, 16-May-11 www.vishay.com 11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9130 Vishay Siliconix OPERATIONAL MODES PWM Mode The 3.3 V and 5 V Buck controllers operate in continuouscurrent PWM mode when the load demands more than approximately 25 % of the maximum current (see typical curves). The duty cycle can be approximated as Duty_Cycle = VOUT/VIN. In this mode, the inductor current is continuous; in the first half of the cycle, the current slopes up when the high-side MOSFET conducts and then, in the second half, slopes back down when the inductor is providing energy to the output capacitor and load. As current enters the inductor in the first half-cycle, it is also continuing through to the load; hence, the load is receiving continuous current from the inductor. By using this method, output ripple is minimized and smaller form-factor inductors can be used. The output capacitor’s ESR has the largest effect on output ripple. It is typically under 50 mV; the worst case condition is under light load with higher input battery voltage. Pulse-Skipping Mode When the load requires less than 25 % of its maximum, the Si9130 enters a mode which drives the gate for one clock cycle and skips the majority of the remaining cycles. Pulseskipping mode cuts down on the switching losses, the dominant power consumer at low current levels. In the region between pulse-skipping mode and PWM mode, the controller may transition between the two modes, delivering spurts of pulses. This may cause the current waveform to look irregular, but will not overly affect the ripple voltage. Even in this transitioning mode efficiency will stay high. Current Limit The current through an external resistor, is constantly monitored to protect against over-current. A low value resistor is placed in series with the inductor. The voltage across it is measured by connecting it between CS_ and FB_. If this voltage is larger than 100 mV, the high-side MOSFET drive is shut down. Eliminating over-currents protects the MOSFET, the load and the power source. Typical values for the sense resistors with a 3 A load will be 25 m. Oscillator and SYNC There are two ways to set the Si9130 oscillator frequency: by using an external SYNC signal, or using the internal oscillator. The SYNC pin can be driven with an external CMOS level signal with frequency from 240 kHz and 350 kHz to synchronize to the internal oscillator. Tying SYNC to either VL or GND sets the frequency to 200 kHz and to REF sets the frequency to 300 kHz. Operation at 300 kHz is typically used to minimize output passive component sizes. Slower switching speeds of 200 kHz may be needed for lower input voltages. Internal VL and REF A 5 V linear regulator supplies power to the internal logic circuitry. The regulator is available for external use from pin VL, able to source 5 mA. A 4.7 µF capacitor should be connected between VL and GND. To increase efficiency, when the 5 V switching supply has voltage greater than 4.5 V, VL is internally switched over to the output of the 5 V switching supply and the linear regulator is turned off. The 5 V linear regulator provides power to the internal 3.3 V bandgap reference (REF). The 3.3 V reference can supply 5 mA to an external load, connected to pin REF. Between REF and GND connect a capacitor, 0.22 µF plus 1 µF per mA of load current. The switching outputs will vary with the reference; therefore, placing a load on the REF pin will cause the main outputs to decrease slightly, within the specified regulation tolerance. VL and REF supplies stay on as long as V+ is greater than 4.5 V, even if the switching supplies are not enabled. This feature is necessary when using the micropower regulators to keep memory alive during shutdown. Both linear regulators can be connected to their respective switching supply outputs. For example, REF would be tied to the output of the 3.3 V and VL to 5 V. This will keep the main supplies up in standby mode, provided that each load current in shutdown is not larger than 5 mA. Fault Protection The 3.3 V and 5 V switching controllers are shut down when one of the linear regulators drops below 85 % of its nominal value; that is, shut down will occur when VL < 4.0 V or REF < 2.8 V. www.vishay.com 12 Document Number: 70190 S11-0975-Rev. G, 16-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9130 Vishay Siliconix DESIGN CONSIDERATIONS Inductor Design Three specifications are required for inductor design: inductance (L), peak inductor current (ILPEAK), and coil resistance (RL). The equation for computing inductance is: Where: CF = Output filter capacitance (F) VREF = Reference voltage, 3.3 V; VOUT = Output voltage, 3.3 V or 5 V; RCS = Sense resistor (); GBWP = Gain-bandwidth product, 60 kHz; ESRCF = Output filter capacitor ESR (). Both minimum capacitance and maximum ESR requirements must be met. In order to get the low ESR, a capacitance value of two to three times greater than the required minimum may be necessary. The equation for output ripple in continuous current mode is: L V OUT VIN(MAX)- VOUT VIN(MAX) (f) IOUT (LIR) Where: VOUT = Output voltage (3.3 V or 5 V); VIN(MAX) = Maximum input voltage (V); f = Switching frequency, normally 300 kHz; IOUT = Maximum dc load current (A); LIR = Ratio of inductor peak-to-peak ac current to average dc load current, typically 0.3. When LIR is higher, smaller inductance values are acceptable, at the expense of increased ripple and higher losses. The peak inductor current (ILPEAK) is equal to the steadystate load current (IOUT) plus one half of the peak-to-peak ac current (ILPP). Typically, a designer will select the ac inductor current to be 30 % of the steady-state current, which gives ILPEAK equal to 1.15 times IOUT. The equation for computing peak inductor current is: VOUT(RPL) ILPP(MAX) x ESRCF + 1 2 x f x CF The equations for capacitive and resistive components of the ripple in pulse-skipping mode are: VOUT(RPL)(C) (4) 10- 4 (L) RCS 2 C F x 1+ 1 VOUT VIN - VOUT Volts VOUT(RPL)(R) (0.02) ESRCF Volts R CS ILPEAK IOUT + VOUT VIN(MAX) - VOUT (2)(f)(L) VIN(MAX) The total ripple, VOUT(RPL), can be approximated as follows: if VOUT(RPL)(R) < 0.5 VOUT(RPL)(C), then VOUT(RPL) = VOUT(RPL)(C), otherwise, VOUT(RPL) = 0.5 VOUT(RPL)(C) + VOUT(RPL)(R). Lower Voltage Input The application circuit shown here can be easily modified to work with 5.5 V to 12 V input voltages. Oscillation frequency should be set at 200 kHz and increase the output capacitance to 660 µF on the 5 V output to maintain stable performance up to 2 A of load current. Operation on the 3.3 V supply will not be affected by this reduced input voltage. OUTPUT CAPACITORS The output capacitors determine loop stability and ripple voltage at the output. In order to maintain stability, minimum capacitance and maximum ESR requirements must be met according to the following equations: CF and, VREF VOUT RCS (2)(π)(GBWP) ESRCF VOUT RCS VREF Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?70190. Document Number: 70190 S11-0975-Rev. G, 16-May-11 www.vishay.com 13 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix SSOP: 28-LEAD (5.3 MM) (POWER IC ONLY) 28 15 −B− E1 E 1 14 −A− e D GAUGE PLANE R A2 A − C− c 0.25 L SEATING PLANE L1  A1 0.076 C SEATING PLANE b 0.12 M A B C S MILLIMETERS Dim A A1 A2 b c D E E1 e L L1 R  Min 1.73 0.05 1.68 0.25 0.09 10.07 7.60 5.20 0.63 0.09 0_ Nom 1.88 0.13 1.75 0.30 0.15 10.20 7.80 5.30 0.65 BSC 0.75 1.25 BSC 0.15 4_ Max 1.99 0.21 1.78 0.38 0.20 10.33 8.00 5.40 0.95 −−− 8_ ECN: S-40080—Rev. A, 02-Feb-04 DWG: 5915 Document Number: 72810 28-Jan-04 www.vishay.com 1 Legal Disclaimer Notice Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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