0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
SI9243AEY-T1-E3

SI9243AEY-T1-E3

  • 厂商:

    VISHAY

  • 封装:

  • 描述:

    SI9243AEY-T1-E3 - Single-Ended Bus Transceiver - Vishay Siliconix

  • 数据手册
  • 价格&库存
SI9243AEY-T1-E3 数据手册
Si9243A Vishay Siliconix Single-Ended Bus Transceiver DESCRIPTION The Si9243AEY is a monolithic bus transceiver designed to provide bidirectional serial communication in automotive diagnostic applications. The device incorporates protection against overvoltages and short circuits to VBAT. The transceiver pin is protected and can be driven beyond the VBAT voltage. The RX output is capable of driving CMOS or 1 x LSTTL load. The Si9243AEY is built on the Vishay Siliconix BiC/DMOS process. This process supports bipolar transistors, CMOS, and DMOS. An epitaxial layer prevents latchup. The Si9243AEY is available in a 8-pin SO package and operates over the automotive temperature range (- 40 °C to 125 °C). The Si9243AEY is available in both standard and lead (Pb)-free packages. FEATURES • Operating Power Supply Range 6 V  VBAT  36 V • Reverse Battery Protection Down to VBAT - 24 V • Standby Mode With Very Low Current Consumption IBAT(SB) = 1 µA at VDD = 0.5 V • Low Quiescent Current in OFF Condition IBAT = 120 µA and IDD  10 A • ISO 9141 Compatible • Overtemperature Shutdown Function For K Output • Defined K Output OFF for Open GND • Defined Receive Output Status for Open K Input • Defined K Output OFF for TX Input Open • Open Drain Fault Output • 2 kV ESD • Typical Transmit Speeds of 200 kBaud PIN CONFIGURATION AND FUNCTIONAL BLOCK DIAGRAM GND VDD VBAT VDD RXL VDD + L - L RXK + K + VBAT/2 VDD K Logic and Fault Detect Circuitry (See State Diagram and Truth Table) K TX Document Number: 70788 S11-0975-Rev. F, 16-May-11 www.vishay.com 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9243A Vishay Siliconix OUTPUT TABLE AND STATE DIAGRAMS Over Temp INPUTS A=0 STATE VARIABLE A 1 1 1 1 0 1 1 1 B 1 1 1 1 1 0 1 1 OUTPUT TABLE K 0 1 0 1 HiZ HiZ 1 0 RXK RXL 0 1 0 1 K K 1 0 0 1 1 0 L L 1 0 Over Temp Short Circuit Receive Mode Comments Power On A=1 Over Temp . TX Short Circuit TX 0 1 0 1 X 0 L 0 1 1 0 L L 1 0 Power On B=1 B=0 TX Note: Over Temp is an internal condition, not meant to be a logic signal. 1 1 X = "1" or "0" HiZ = High Impedance State ABSOLUTE MAXIMUM RATINGS Parameter Voltages Referenced to Ground Voltage On VBAT Voltage K, L Voltage Difference V(VBAT, K, L) Voltage On Any Pin (Except VBAT , K, L) or Max. Current Voltage on VDD K Pin Only, Short Circuit Duration (to VBAT or GND) Operating Temperature (TA) Junction and Storage Temperature Thermal Impedance (JA) - 24 to 45 - 16 to (VBAT + 1) 55 - 0.3 V to (VDD + 0.3 V) or 10 7 Continuous - 40 to 125 - 55 to 150 125 °C °C/W mA V V Limit Unit Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING RANGE Parameter Voltages Referenced to Ground VDD VBAT K, L Digital Inputs 4.5 to 5.5 6 to 36 6 to 36 0 to VDD V Limit Unit www.vishay.com 2 Document Number: 70788 S11-0975-Rev. F, 16-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9243A Vishay Siliconix SPECIFICATIONS Parameter Transmitter and Logic Levels TX Input Low Voltage TX Input High Voltage TX Input Capacitanced TX Input Pull-up Resistance K Transmit RL = 510  ± 5 %, VBAT = 6 to 18 K Output Low Voltage VOLK RL = 1 k ± 5 %, VBAT = 16 to 36 RL = 510  ± 5 %, VBAT = 4.5 K Output High Voltage K Rise, Fall Times K Output Sink Resistance K Output Capacitanced Receiver L and K Input High Voltage L and K Input Hysteresisc, d L and K Input Currents RXL and RXK Output Low Voltage RXL and RXK Pull-up Resistance RXK Turn On Delay VOHK tr, tf Rsi CO VIH VHYS IIH VOLR RRX td(on) RL = 510  ± 5 %, VBAT = 6 V to 18 V CL = 10 nF, See Test Circuit RL = 1 k ± 5 %, VBAT = 16 V to 36 V CL = 4.7 nF, See Test Circuit RL = 510  ± 5 %, VBAT = 6 V to 18 V CL = 10 nF, See Test Circuit RL = 1 k ± 5 %, VBAT = 16 V to 36 V CL = 4.7 nF, See Test Circuit TX = 0 V, VBAT  16 V VIHT  VTX, VIHK  VK, VIHL VL VBAT  12 V VDD  0.5 V, VBAT  12 V VDD  5.5 V, TX = 0 V VIHT  VTX, VIHK  VK, VIHL VL VBAT  12 V RL = 510 , CL = 10 nF 6 V < VBAT < 16 V, CRX = 20 pF 6 V < VBAT < 16 V, RK = 510 , CK  1.3 nF Temperature Rising TX = 4 VIH= VBAT VILK, VILL = 0.35 VBAT IOLR = 1 mA RL = 510  ± 5 %, VBAT = 4.5 to 18 RL = 1 k ± 5 %, VBAT = 16 to 36 See Test Circuit TX = 0 V Full Full Full Full Full Full Full Full Full Full Full Full Full Full Full Full Full 5 3 3 3 3 0.65 VBAT 0.05 VBAT 20 0.4 20 10 10 µs 10 10 0.95 VBAT 0.95 VBAT 9.6 110 20 µs  pF 0.2 VBAT 0.2 VBAT 1.2 V Symbol Test Conditions Unless Specified VDD = 4.5 V to 5.5 V VBAT = 6 V to 36 V Limits - 40 to 125 °C Temp.a Full Full Full VDD = 5.5 V, TX = 1.5 V, 3.5 V Full 10 20 3.5 10 40 Min.b Typ.c Max.b 1.5 Unit VILT VIHT CINT RTX V pF k V µA V k RXK Turn Off Delay td(off) Supplies Bat Supply Current On Bat Supply Current Off Bat Supply Current Standby Logic Supply Current On Logic Supply Current Off Miscellaneous TX Transmit Baud Rate RXL and RXK Receive Baud Rate Transmission Frequency TX Minimum Pulse Widthd, e Over Temperature Shutdownd c IBAT(on) IBAT(off) IBAT(SB) IDD(on) IDD(off) Full Full Full Full Full 1.2 120
SI9243AEY-T1-E3 价格&库存

很抱歉,暂时无法提供与“SI9243AEY-T1-E3”相匹配的价格&库存,您可以联系我们找货

免费人工找货