SIHFB20N50K

IRFB20N50K, SiHFB20N50K Vishay Siliconix Power MOSFET PRODUCT SUMMARY VDS (V) RDS(on) (Ω) Qg (Max.) (nC) Qgs (nC) Qgd (nC) Configuration VGS = 10 V 110 33 54 Single D FEATURES 500 0.21 • Low Gate Charge Qg Results in Simple Drive Requirement • Improved Gate, Avalanche and Dynamic dV/dt Ruggedness Available RoHS* COMPLIANT • Fully Characterized Capacitance and Avalanche Voltage and Current • Low RDS(on) • Lead (Pb)-free Available TO-220 APPLICATIONS • Switch Mode Power Supply (SMPS) G S G D S N-Channel MOSFET • Uninterruptible Power Supply • High Speed Power Switching • Hard Switched and High Frequency Circuits ORDERING INFORMATION Package Lead (Pb)-free SnPb TO-220 IRFB20N50KPbF SiHFB20N50K-E3 IRFB20N50K SiHFB20N50K ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Currenta Linear Derating Factor Single Pulse Avalanche Energyb Repetitive Avalanche Currenta EAS IAR EAR TC = 25 °C PD dV/dt TJ, Tstg for 10 s 6-32 or M3 screw VGS at 10 V TC = 25 °C TC = 100 °C SYMBOL VDS VGS ID IDM LIMIT 500 ± 30 20 12 80 2.2 330 20 28 280 6.9 - 55 to + 150 300d 10 W/°C mJ A mJ W V/ns °C N A UNIT V Repetitive Avalanche Energya Maximum Power Dissipation Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque Notes a. Repetitive rating; pulse width limited by maximum junction temperature. b. Starting TJ = 25 °C, L = 1.6 mH, RG = 25 Ω, IAS = 20 A. c. ISD ≤ 20 A, dI/dt ≤ 350 A/µs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91101 S-Pending-Rev. A, 11-Aug-08 www.vishay.com 1 WORK-IN-PROGRESS IRFB20N50K, SiHFB20N50K Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER Maximum Junction-to-Ambient Case-to-Sink, Flat, Greased Surface Maximum Junction-to-Case (Drain) SYMBOL RthJA RthCS RthJC TYP. 0.50 MAX. 58 0.45 °C/W UNIT SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance Dynamic Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge Forward Turn-On Time IS ISM VSD trr Qrr ton MOSFET symbol showing the integral reverse p - n junction diode D SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS ΔVDS/TJ VGS(th) IGSS IDSS RDS(on) gfs VGS = 0 V, ID = 250 µA Reference to 25 °C, ID = 1 mA VDS = VGS, ID = 250 µA VGS = ± 30 V VDS = 500 V, VGS = 0 V VDS = 400 V, VGS = 0 V, TJ = 125 °C VGS = 10 V ID = 1 2 A b VDS = 50 V, ID = 12 A VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 VDS = 1.0 V, f = 1.0 MHz VGS = 0 V VDS = 400 V, f = 1.0 MHz VDS = 0 V to 400 V ID = 20 A, VDS = 400 V see fig. 6 and 13b 500 3.0 11 0.61 0.21 - 5.0 ± 100 50 250 0.25 - V V/°C V nA µA Ω S Ciss Coss Crss Coss Coss eff. Qg Qgs Qgd td(on) tr td(off) tf VGS = 10 V - 2870 320 34 3480 85 160 22 74 45 33 110 33 54 ns nC pF VDD = 250 V, ID = 20 A RG = 7.5 Ω, VGS = 10 V, see fig. 10b - - 520 5.3 20 A 80 1.5 780 8.0 V ns µC G S TJ = 25 °C, IS = 20 A, VGS = 0 Vb TJ = 25 °C, IF = 20 A, dI/dt = 100 A/µsb Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature. b. Pulse width ≤ 400 µs; duty cycle ≤ 2 %. www.vishay.com 2 Document Number: 91101 S-Pending-Rev. A, 11-Aug-08 IRFB20N50K, SiHFB20N50K Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 100 VGS Top 15 V 12 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V Bottom 5.0 V 100.0 ID , Drain-to-Source Current (A) 10 ID, Drain-to-Source Current (A) T J = 150 °C 10.0 1 1.0 T J = 25 °C 0.1 5.0V 20 µs Pulse Width TJ = 25 °C 0.1 VDS = 50 V 0.0 0.01 0.1 1 10 100 20 ms Pulse width 5.0 6.0 7.0 8.0 9.0 10.0 VDS , Drain-to-Source Voltage (V) Fig. 1 - Typical Output Characteristics VGS , Gate-to-Source Voltage (V) Fig. 3 - Typical Transfer Characteristics 100 ID, Drain-to-Source Current (A) 10 rDS(on), Drain-to-Source On-Resistance (normalised) VGS Top 15 V 12 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V Bottom 5.0 V 3.5 I D = 20 A 3.0 2.5 2.0 1 5.0V 1.5 0.1 1.0 20 µs Pulse Width TJ = 25 °C 0.01 0.1 1 10 100 0.5 V GS = 10 V 0.0 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160 VDS , Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics TJ, Junction Temperature (°C) Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 91101 S-Pending-Rev. A, 11-Aug-08 www.vishay.com 3 IRFB20N50K, SiHFB20N50K Vishay Siliconix 100000 VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds shorted Crss = Cgd Coss = Cds + Cgd 100.0 10000 ISD, Reverse Drain Current (A) C, Capacitance (pF) TJ = 150 °C 10.0 Ciss 1000 Coss 100 1.0 Crss 10 1 10 100 1000 TJ = 25 °C 0.1 0.2 0.4 0.6 0.8 VGS = 0 V 1.0 1.2 VDS, Drain-to-Source Voltage (V) VSD, Source-to Drain Voltage (V) Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 7 - Typical Source-Drain Diode Forward Voltage 20 ? ? ? ??? 1000 VDS = 400 V VDS = 250 V VDS = 100 V Operation in this area limited by rDS(on) VGS, Gate-to-Source Voltage (V) 16 ID, Drain-to-Source Current (A) 100 12 10 100 µs 1 ms 8 1 TC = 25 °C TJ = 150 °C Single P u lse 1 10 100 10 ms 4 For test circuit see figure 13 0 0 20 40 60 80 100 120 0.1 1000 10000 QG, Total Gate Charge (nC) VDS, Drain-to-Source Voltage (V) Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 8 - Maximum Safe Operating Area www.vishay.com 4 Document Number: 91101 S-Pending-Rev. A, 11-Aug-08 IRFB20N50K, SiHFB20N50K Vishay Siliconix RD 20 VDS VGS D.U.T. + 16 RG - VDD ID, Drain Current (A) 12 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 8 Fig. 10a - Switching Time Test Circuit VDS 90 % 4 0 25 50 75 100 125 150 10 % VGS td(on) tr td(off) tf Fig. 9 - Maximum Drain Current vs. Case Temperature Fig. 10b - Switching Time Waveforms 1 D = 0.50 Thermal Response ( ZthJC) 0.1 0.20 0.10 0.01 0.02 0.01 Single Pulse (Thermal Response) P DM t1 t2 Notes: 1. Duty Factor D = t1/t2 2. Peak TJ = PDM x TthJC + TC 0.01 0.001 0.00001 0.0001 0.001 0.01 0.1 1 t1, Rectangular Pulse Duration (s) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case VDS 15 V tp VDS L Driver RG 20 V tp D.U.T IAS 0.01 Ω + A - VDD A A IAS Fig. 12b - Unclamped Inductive Waveforms Fig. 12a - Unclamped Inductive Test Circuit Document Number: 91101 S-Pending-Rev. A, 11-Aug-08 www.vishay.com 5 IRFB20N50K, SiHFB20N50K Vishay Siliconix 600 Top EAS, Single Pulse Avalanche Energy (mJ) 500 Bottom ID 9.4 A 17 A 20A 400 300 200 100 0 25 50 75 100 125 150 Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ 12 V VGS QGS QG 0.2 µF 0.3 µF QGD D.U.T. + - VDS VG VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit www.vishay.com 6 Document Number: 91101 S-Pending-Rev. A, 11-Aug-08 IRFB20N50K, SiHFB20N50K Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit D.U.T. + Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + + - RG • • • • dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test + VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 V* D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt VDD Re-applied voltage Inductor current Body diode forward drop Ripple ≤ 5 % ISD * VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91101. Document Number: 91101 S-Pending-Rev. A, 11-Aug-08 www.vishay.com 7 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1