TSOP-6

SQ3418EEV www.vishay.com Vishay Siliconix Automotive N-Channel 40 V (D-S) 175 °C MOSFET PRODUCT SUMMARY VDS (V) RDS(on) () at VGS = 10 V RDS(on) () at VGS = 4.5 V ID (A) Configuration TSOP-6 Top V iew 1 6 FEATURES 40 0.032 0.048 8 Single (1, 2, 5, 6) D • Halogen-free According to IEC 61249-2-21 Definition • TrenchFET® Power MOSFET • Typical ESD Protection 800 V • AEC-Q101 Qualifiedd • 100 % Rg and UIS Tested • Compliant to RoHS Directive 2002/95/EC 3 mm 2 5 (3) G 3 4 2.85 mm Marking Code: 8Bxxx (4) S N-Channel MOSFET ORDERING INFORMATION Package Lead (Pb)-free and Halogen-free TSOP-6 SQ3418EEV-T1-GE3 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Source Current (Diode Conduction) Pulsed Drain Currentb L = 0.1 mH TC = 25 °C TC = 125 °C Single Pulse Avalanche Current Single Pulse Avalanche Energy Maximum Power Dissipationb Operating Junction and Storage Temperature Range TC = 25 °Ca TC = 125 °C SYMBOL VDS VGS ID IS IDM IAS EAS PD TJ, Tstg LIMIT 40 ± 20 8 5 6 32 5 1.2 5 1.6 - 55 to + 175 mJ W °C A UNIT V THERMAL RESISTANCE RATINGS PARAMETER Junction-to-Ambient Junction-to-Foot (Drain) Notes a. Package limited. b. Pulse test; pulse width  300 μs, duty cycle  2 %. c. When mounted on 1" square PCB (FR-4 material). d. Parametric verification ongoing. PCB Mountc SYMBOL RthJA RthJF LIMIT 110 30 UNIT °C/W S11-2124-Rev. C, 07-Nov-11 1 Document Number: 65357 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ3418EEV www.vishay.com Vishay Siliconix SPECIFICATIONS (TC = 25 °C, unless otherwise noted) PARAMETER Static Drain-Source Breakdown Voltage Gate-Source Threshold Voltage Gate-Source Leakage VDS VGS(th) IGSS VGS = 0, ID = 250 μA VDS = VGS, ID = 250 μA VDS = 0 V, VGS = ± 12 V VDS = 0 V, VGS = ± 20 V VGS = 0 V Zero Gate Voltage Drain Current On-State Drain Currenta IDSS ID(on) VGS = 0 V VGS = 0 V VGS = 10 V VGS = 10 V Drain-Source On-State Resistancea RDS(on) VGS = 10 V VGS = 10 V VGS = 4.5 V Forward Transconductanceb gfs Ciss Coss Crss Qg Qgs Qgd Rg td(on) tr td(off) tf °Cb IF = 3 A, VGS = 0 0.8 32 1.2 A V ISM VSD VDD = 20 V, RL = 4  ID  5 A, VGEN = 10 V, Rg = 1  f = 1 MHz VGS = 4.5 V VDS = 20 V, ID = 4 A VGS = 0 V VDS = 25 V, f = 1 MHz Dynamicb Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Chargec Gate-Source Chargec Gate-Drain Chargec Gate Resistance Turn-On Delay Timec Rise Timec Turn-Off Delay Timec Fall Timec Pulsed Currenta Forward Voltage 1.2 528 112 76 7.1 1.7 3.7 2.4 8 8 15 7 660 140 95 11 3.6 12 12 23 11 ns  nC pF VDS = 40 V VDS = 40 V, TJ = 125 °C VDS = 40 V, TJ = 175 °C VDS5 V ID = 5 A ID = 5 A, TJ = 125 °C ID = 5 A, TJ = 175 °C ID = 4 A 40 1.5 10 2.0 0.026 0.040 13 2.5 ± 500 ±1 1 50 150 0.032 0.050 0.061 0.048 S  A μA V nA mA SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS = 15 V, ID = 4 A Source-Drain Diode Ratings and Characteristics TC = 25 Notes a. Pulse test; pulse width  300 μs, duty cycle  2 %. b. Guaranteed by design, not subject to production testing. c. Independent of operating temperature. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. S11-2124-Rev. C, 07-Nov-11 2 Document Number: 65357 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ3418EEV www.vishay.com TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted) 0.005 T J = 25 °C 0.004 Vishay Siliconix 10-2 10-3 10-4 10-5 10-6 10-7 10-8 T J = 25 °C T J = 150 °C IGSS - Gate Current (A) 0.003 0.002 0.001 IGSS - Gate Current (A) 10-9 0.000 0 6 12 18 24 30 10-10 0 6 VGS - Gate-Source Voltage (V) 12 18 24 VGS - Gate-Source Voltage (V) 30 Gate Current vs. Gate-Source Voltage 30 VGS = 10 V thru 5 V 24 Gate Current vs. Gate-Source Voltage 24 18 ID - Drain Current (A) 18 ID - Drain Current (A) 12 TC = 25 °C 6 TC = 125 °C 12 VGS = 4 V 6 VGS = 3 V 0 0 2 4 6 8 10 VDS - Drain-to-Source Voltage (V) 0 0 2 4 TC = - 55 °C 6 8 10 VGS - Gate-to-Source Voltage (V) Output Characteristics 10 Transfer Characteristics 25 8 ID - Drain Current (A) TC = 125 °C 6 gfs - Transconductance (S) 20 TC = - 55 °C TC = 25 °C 15 TC = 125 °C TC = 25 °C 4 10 2 5 TC = - 55 °C 0 0 1 2 3 4 VGS - Gate-to-Source Voltage (V) 5 0 0 2 4 6 ID - Drain Current (A) 8 10 Transfer Characteristics Transconductance S11-2124-Rev. C, 07-Nov-11 3 Document Number: 65357 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ3418EEV www.vishay.com TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted) 0.15 1000 Ciss 800 C - Capacitance (pF) Vishay Siliconix 0.12 RDS(on) - On-Resistance (Ω) 0.09 VGS = 4.5 V 0.06 VGS = 10 V 0.03 600 400 Coss 200 Crss 0.00 0 6 12 18 ID - Drain Current (A) 24 30 0 0 5 10 15 20 25 30 VDS - Drain-to-Source Voltage (V) 35 40 On-Resistance vs. Drain Current 5 Capacitance 2.0 RDS(on) - On-Resistance (Normalized) ID = 5 A 1.7 VGS - Gate-to-Source Voltage (V) 4 ID = 4 A VDS = 20 V 3 1.4 VGS = 10 V 2 1.1 1 0.8 0 0 2 4 6 8 Qg - Total Gate Charge (nC) 10 0.5 - 50 - 25 0 25 50 75 100 125 150 175 TJ - Junction Temperature (°C) Gate Charge 100 On-Resistance vs. Junction Temperature 0.25 10 IS - Source Current (A) TJ = 150 °C 1 0.20 RDS(on) - On-Resistance (Ω) 0.15 0.1 TJ = 25 °C 0.01 0.10 TJ = 150 °C 0.05 TJ = 25 °C 0.001 0.0 0.2 0.4 0.6 0.8 1.0 1.2 VSD - Source-to-Drain Voltage (V) 0.00 0 2 4 6 8 VGS - Gate-to-Source Voltage (V) 10 Source-Drain Diode Forward Voltage On-Resistance vs. Gate-Source Voltage S11-2124-Rev. C, 07-Nov-11 4 Document Number: 65357 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ3418EEV www.vishay.com TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted) Vishay Siliconix 0.6 60 ID = 1 mA VDS - Drain-to-Source Voltage (V) 175 0.3 57 VGS(th) Variance (V) 0.0 54 - 0.3 ID = 5 mA 51 - 0.6 ID = 250 μA - 0.9 48 - 1.2 - 50 - 25 0 25 50 75 100 TJ - Temperature (°C) 125 150 45 - 50 - 25 0 25 50 75 100 125 TJ - Junction Temperature (°C) 150 175 Threshold Voltage Drain-Source Breakdown vs. Junction Temperature 100 IDM Limited ID - Drain Current (A) 10 Limited by RDS(on)* 100 μs ID Limited 1 1 ms 10 ms 100 ms 1 s, 10 s, DC BVDSS Limited 0.1 TC = 25 °C Single Pulse 0.01 0.01 0.1 1 10 100 VDS - Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified Safe Operating Area S11-2124-Rev. C, 07-Nov-11 5 Document Number: 65357 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ3418EEV www.vishay.com THERMAL RATINGS (TA = 25 °C, unless otherwise noted) 1 Duty Cycle = 0.5 Vishay Siliconix Normalized Effective Transient Thermal Impedance 0.2 0.1 0.1 0.05 PDM t1 Notes: 0.02 t2 1. Duty Cycle, D = t1 t2 2. Per Unit Base = RthJA = 110 °C/W 3. TJM - TA = PDMZthJA(t) 4. Surface Mounted Single Pulse 0.01 10 -4 10 -3 10 -2 10 -1 1 Square Wave Pulse Duration (s) 10 100 1000 Normalized Thermal Transient Impedance, Junction-to-Ambient 1 Duty Cycle = 0.5 Normalized Effective Transient Thermal Impedance 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 10 -4 10 -3 10 -2 Square Wave Pulse Duration (s) 10 -1 1 Normalized Thermal Transient Impedance, Junction-to-Foot Note • The characteristics shown in the two graphs - Normalized Transient Thermal Impedance Junction-to-Ambient (25 °C) - Normalized Transient Thermal Impedance Junction-to-Foot (25 °C) are given for general guidelines only to enable the user to get a “ball park” indication of part capabilities. The data are extracted from single pulse transient thermal impedance characteristics which are developed from empirical measurements. The latter is valid for the part mounted on printed circuit board - FR4, size 1" x 1" x 0.062", double sided with 2 oz. copper, 100 % on both sides. The part capabilities can widely vary depending on actual application parameters and operating conditions. Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?65357. S11-2124-Rev. C, 07-Nov-11 6 Document Number: 65357 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix TSOP: 5/6−LEAD JEDEC Part Number: MO-193C e1 e1 5 4 6 5 4 E1 1 E 1 E1 E 2 3 -B- 2 3 -B- e b 0.15 M C B A e b 0.15 M C B A 5-LEAD TSOP -A- 6-LEAD TSOP 4x 1 R A2 A R 0.17 Ref c L2 D Gauge Plane Seating Plane 0.08 C Seating Plane L 4x 1 (L1) -C- A1 MILLIMETERS Dim A A1 A2 b c D E E1 e e1 L L1 L2 R Min 0.91 0.01 0.90 0.30 0.10 2.95 2.70 1.55 INCHES Min 0.036 0.0004 0.035 0.012 0.004 0.116 0.106 0.061 Nom 0.32 0.15 3.05 2.85 1.65 0.95 BSC Max 1.10 0.10 1.00 0.45 0.20 3.10 2.98 1.70 Nom 0.038 0.013 0.006 0.120 0.112 0.065 0.0374 BSC Max 0.043 0.004 0.039 0.018 0.008 0.122 0.117 0.067 1.80 0.32 1.90 0.60 Ref 0.25 BSC 2.00 0.50 0.071 0.012 0.075 0.024 Ref 0.010 BSC 0.079 0.020 0.10 0 4 8 0.004 0 4 7 Nom 8 7 Nom 1 ECN: C-06593-Rev. I, 18-Dec-06 DWG: 5540 Document Number: 71200 18-Dec-06 www.vishay.com 1 AN823 Vishay Siliconix Mounting LITTLE FOOTR TSOP-6 Power MOSFETs Surface mounted power MOSFET packaging has been based on integrated circuit and small signal packages. Those packages have been modified to provide the improvements in heat transfer required by power MOSFETs. Leadframe materials and design, molding compounds, and die attach materials have been changed. What has remained the same is the footprint of the packages. Since surface mounted packages are small, and reflow soldering is the most common form of soldering for surface mount components, “thermal” connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically. A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least 0.020 inches. The use of wide traces connected to the drain plane provides a low impedance path for heat to move away from the device. The basis of the pad design for surface mounted power MOSFET is the basic footprint for the package. For the TSOP-6 package outline drawing see http://www.vishay.com/doc?71200 and see http://www.vishay.com/doc?72610 for the minimum pad footprint. In converting the footprint to the pad set for a power MOSFET, you must remember that not only do you want to make electrical connection to the package, but you must made thermal connection and provide a means to draw heat from the package, and move it away from the package. In the case of the TSOP-6 package, the electrical connections are very simple. Pins 1, 2, 5, and 6 are the drain of the MOSFET and are connected together. For a small signal device or integrated circuit, typical connections would be made with traces that are 0.020 inches wide. Since the drain pins serve the additional function of providing the thermal connection to the package, this level of connection is inadequate. The total cross section of the copper may be adequate to carry the current required for the application, but it presents a large thermal impedance. Also, heat spreads in a circular fashion from the heat source. In this case the drain pins are the heat sources when looking at heat spread on the PC board. Figure 1 shows the copper spreading recommended footprint for the TSOP-6 package. This pattern shows the starting point for utilizing the board area available for the heat spreading copper. To create this pattern, a plane of copper overlays the basic pattern on pins 1,2,5, and 6. The copper plane connects the drain pins electrically, but more importantly provides planar copper to draw heat from the drain leads and start the process of spreading the heat so it can be dissipated into the ambient air. Notice that the planar copper is shaped like a “T” to move heat away from the drain leads in all directions. This pattern uses all the available area underneath the body for this purpose. 0.167 4.25 REFLOW SOLDERING Vishay Siliconix surface-mount packages meet solder reflow reliability requirements. Devices are subjected to solder reflow as a test preconditioning and are then reliability-tested using temperature cycle, bias humidity, HAST, or pressure pot. The solder reflow temperature profile used, and the temperatures and time duration, are shown in Figures 2 and 3. Ramp-Up Rate 0.014 0.35 0.026 0.65 0.074 1.875 0.122 3.1 +6_C/Second Maximum 120 Seconds Maximum 70 − 180 Seconds 240 +5/−0_C 20 − 40 Seconds +6_C/Second Maximum Temperature @ 155 " 15_C Temperature Above 180_C Maximum Temperature Time at Maximum Temperature 0.049 1.25 0.049 1.25 0.010 0.25 Ramp-Down Rate FIGURE 1. Recommended Copper Spreading Footprint Document Number: 71743 27-Feb-04 FIGURE 2. Solder Reflow Temperature Profile www.vishay.com 1 AN823 Vishay Siliconix 10 s (max) 255 − 260_C 1X4_C/s (max) 217_C 140 − 170_C 60 s (max) 3_C/s (max) 60-120 s (min) Pre-Heating Zone Reflow Zone 3-6_C/s (max) Maximum peak temperature at 240_C is allowed. FIGURE 3. Solder Reflow Temperature and Time Durations THERMAL PERFORMANCE A basic measure of a device’s thermal performance is the junction-to-case thermal resistance, Rqjc, or the junction-to-foot thermal resistance, Rqjf. This parameter is measured for the device mounted to an infinite heat sink and is therefore a characterization of the device only, in other words, independent of the properties of the object to which the device is mounted. Table 1 shows the thermal performance of the TSOP-6. On-Resistance vs. Junction Temperature 1.6 VGS = 4.5 V ID = 6.1 A 1.4 rDS(on) − On-Resiistance (Normalized) 1.2 TABLE 1. Equivalent Steady State Performance—TSOP-6 Thermal Resistance Rqjf 30_C/W 1.0 0.8 0.6 −50 −25 0 25 50 75 100 125 150 SYSTEM AND ELECTRICAL IMPACT OF TSOP-6 In any design, one must take into account the change in MOSFET rDS(on) with temperature (Figure 4). TJ − Junction Temperature (_C) FIGURE 4. Si3434DV www.vishay.com 2 Document Number: 71743 27-Feb-04 Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR TSOP-6 0.099 (2.510) (3.023) 0.039 (1.001) 0.020 (0.508) 0.019 (0.493) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index Return to Index APPLICATION NOTE www.vishay.com 26 (0.699) 0.028 (1.626) 0.064 0.119 Document Number: 72610 Revision: 21-Jan-08 Legal Disclaimer Notice Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk and agree to fully indemnify and hold Vishay and its distributors harmless from and against any and all claims, liabilities, expenses and damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that Vishay or its distributor was negligent regarding the design or manufacture of the part. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 11-Mar-11 www.vishay.com 1