W25Q10EWSNIG

W25Q10EW 1.8V 1M-BIT SERIAL FLASH MEMORY WITH 4KB SECTORS, DUAL AND QUAD SPI -1- Publication Release Date: December 06, 2017 Revision I W25Q10EW Table of Contents 1. 2. 4. 5. 6. 7. GENERAL DESCRIPTION ......................................................................................................... 5 FEATURES ................................................................................................................................. 5 PACKAGE TYPES AND PIN CONFIGURATIONS..................................................................... 6 4.1 Pin Configuration SOIC/VSOP 150-mil .......................................................................... 6 4.2 PAD Configuration USON 2x3-mm................................................................................. 6 4.3 Pin Description SOIC /VSOP 150-mil and USON 2x3-mm ............................................ 6 4.4 Ball Configuration WLCSP .............................................................................................. 7 4.5 Ball Description WLCSP ................................................................................................. 7 PIN DESCRIPTIONS .................................................................................................................. 8 5.1 Chip Select (/CS) ............................................................................................................ 8 5.2 Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3)............................... 8 5.3 Write Protect (/WP) ......................................................................................................... 8 5.4 HOLD (/HOLD)................................................................................................................ 8 5.5 Serial Clock (CLK) .......................................................................................................... 8 BLOCK DIAGRAM ...................................................................................................................... 9 FUNCTIONAL DESCRIPTION.................................................................................................. 10 7.1 SPI OPERATIONS ....................................................................................................... 10 7.1.1 7.1.2 7.1.3 7.1.4 7.2 WRITE PROTECTION .................................................................................................. 11 7.2.1 8. Standard SPI Instructions ............................................................................................... 10 Dual SPI Instructions ...................................................................................................... 10 Quad SPI Instructions ..................................................................................................... 10 Hold Function .................................................................................................................. 10 Write Protect Features .................................................................................................... 11 CONTROL AND STATUS REGISTERS ................................................................................... 12 8.1 STATUS REGISTER .................................................................................................... 12 8.2 8.1.1 8.1.2 8.1.3 8.1.4 8.1.5 8.1.6 8.1.7 8.1.8 8.1.9 BUSY .............................................................................................................................. 12 Write Enable Latch (WEL) .............................................................................................. 12 Block Protect Bits (BP2, BP1, BP0) ................................................................................ 12 Top/Bottom Block Protect (TB) ....................................................................................... 12 Sector/Block Protect (SEC) ............................................................................................. 12 Complement Protect (CMP) ............................................................................................ 12 Protection and Special One time Programming Setting(SRP and SRL) ......................... 13 Erase/Program Suspend Status (SUS) ........................................................................... 14 Security Register Lock Bits (LB[3:1]) – Volatile/Non-Volatile OTP Writable................. 14 8.1.10 8.1.11 8.1.12 Quad Enable (QE) ........................................................................................................ 14 Status Register Memory Protection (CMP = 0) ............................................................. 15 Status Register Memory Protection (CMP = 1) ............................................................. 16 INSTRUCTIONS ........................................................................................................... 17 8.2.1 8.2.2 8.2.3 8.2.4 8.2.5 Manufacturer and Device Identification ........................................................................... 17 Instruction Set Table 1 (Erase, Program Instructions)(1) ................................................. 18 Instruction Set Table 2 .................................................................................................... 18 Write Enable (06h) .......................................................................................................... 20 Write Enable for Volatile Status Register (50h) ............................................................... 21 -2- Publication Release Date: December 06, 2017 Revision I W25Q10EW 8.2.6 8.2.7 8.2.8 8.2.9 8.2.10 8.2.11 8.2.12 8.2.13 8.2.14 8.2.15 8.2.16 8.2.17 8.2.18 8.2.19 8.2.20 8.2.21 8.2.22 8.2.23 8.2.24 8.2.25 8.2.26 8.2.27 8.2.28 8.2.29 8.2.30 8.2.31 8.2.33 8.2.34 8.2.35 9. 10. Write Disable (04h) ......................................................................................................... 21 Read Status Register-1 (05h) and Read Status Register-2 (35h) ................................... 22 Write Status Register (01h),Status Register-2 (31h) ....................................................... 23 Read Data (03h) ............................................................................................................. 24 Fast Read (0Bh)............................................................................................................ 25 Fast Read Dual Output (3Bh) ....................................................................................... 26 Fast Read Quad Output (6Bh) ...................................................................................... 27 Fast Read Dual I/O (BBh) ............................................................................................. 28 Fast Read Quad I/O (EBh)............................................................................................ 29 Set Burst with Wrap (77h) ............................................................................................. 31 Page Program (02h) ..................................................................................................... 32 Quad Input Page Program (32h) ................................................................................... 33 Sector Erase (20h) ........................................................................................................ 34 32KB Block Erase (52h)................................................................................................ 35 64KB Block Erase (D8h) ............................................................................................... 36 Chip Erase (C7h / 60h) ................................................................................................. 37 Erase / Program Suspend (75h) ................................................................................... 38 Erase / Program Resume (7Ah) .................................................................................... 39 Power-down (B9h) ........................................................................................................ 40 Release Power-down / Device ID (ABh) ....................................................................... 41 Read Manufacturer / Device ID (90h) ........................................................................... 43 Read Manufacturer / Device ID Dual I/O (92h) ............................................................. 44 Read Manufacturer / Device ID Quad I/O (94h) ............................................................ 45 Read Unique ID Number (4Bh) ..................................................................................... 46 Read JEDEC ID (9Fh) .................................................................................................. 47 Read SFDP Register (5Ah)........................................................................................... 48 Erase Security Registers (44h) ..................................................................................... 49 Program Security Registers (42h) ................................................................................. 50 Read Security Registers (48h) ...................................................................................... 51 ELECTRICAL CHARACTERISTICS ......................................................................................... 52 9.1 Absolute Maximum Ratings(1) ....................................................................................... 52 9.2 Operating Ranges ......................................................................................................... 52 9.3 Power-up Timing and Write Inhibit Threshold .............................................................. 53 9.4 DC Electrical Characteristics: ....................................................................................... 54 9.5 AC Measurement Conditions ........................................................................................ 55 9.6 AC Electrical Characteristics: ....................................................................................... 56 9.7 AC Electrical Characteristics (cont’d) ........................................................................ 57 9.8 Serial Output Timing ..................................................................................................... 58 9.9 Serial Input Timing ........................................................................................................ 58 9.10 Hold Timing ................................................................................................................... 58 9.11 /WP Timing ................................................................................................................... 58 PACKAGE SPECIFICATION .................................................................................................... 59 10.1 8-Pin SOIC 150-mil (Package Code SN) ...................................................................... 59 10.2 8-Pin VSOP8 150-mil (Package Code SV) ................................................................... 60 10.3 8-Pad USON 2x3x0.6-mm^³ (Package Code UX) ....................................................... 61 -3- Publication Release Date: December 06, 2017 Revision I W25Q10EW 11. 12. 10.4 8-Ball WLCSP (Package Code BY) .............................................................................. 62 ORDERING INFORMATION..................................................................................................... 63 11.1 Valid Part Numbers and Top Side Marking .................................................................. 64 REVISION IISTORY.................................................................................................................. 65 -4- Publication Release Date: December 06, 2017 Revision I W25Q10EW 1. GENERAL DESCRIPTION The W25Q10EW (1M-bit) Serial Flash memories provide a storage solution for systems with limited space, pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial Flash devices. They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP) and storing voice, text and data. The device operates on a single 1.65V to 1.95V power supply with current consumption as low as 1µA for power-down. All devices are offered in spacesaving packages. The W25Q10EW array are organized into 512 programmable pages of 256-bytes each. Up to 256 bytes can be programmed at a time. The W25Q10EW have 32 erasable sectors, 4 erasable 32KB blocks and 2 erasable 64KB blocks respectively. The small 4KB sectors allow for greater flexibility in applications that require data and parameter storage. (See figure 2.) The W25Q10EW support the standard Serial Peripheral Interface (SPI), and a high performance Dual/Quad output as well as Dual/Quad I/O SPI: Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1 (DO), I/O2 (/WP), and I/O3 (/HOLD). SPI clock frequencies of up to 104MHz are supported allowing equivalent clock rates of 208MHz (104MHz x 2) for Dual I/O and 416MHz (104MHz x 4) for Quad I/O when using the Fast Read Dual/Quad I/O instructions. These transfer rates can outperform standard Asynchronous 8 and 16-bit Parallel Flash memories. A Hold pin, Write Protect pin and programmable write protect, with top, bottom or complement array control, provide further control flexibility. Additionally, the device supports JEDEC standard manufacturer and device identification with a 64-bit Unique Serial Number. 2. FEATURES  Family of SpiFlash Memories – 1M-bit/128K-byte – 256-byte per programmable page – Uniform 4KB Sectors, 32KB & 64KB Blocks  SPI with Single / Dual Outputs / I/O – Standard SPI: CLK, /CS, DI, DO, /WP, /Hold – Dual SPI: CLK, /CS, IO0, IO1, /WP, /Hold – Quad SPI: CLK, /CS, IO0, IO1, IO2, IO3  Data Transfer up to 50MB/second – Clock operation to 104MHz. – 208/416MHz equivalent Dual/Quad SPI – Auto-increment Read capability.  Flexible Architecture with 4KB sectors – Uniform Sector/Block Erase (4/32/64-kbytes) – Program one to 256 bytes < 1ms – Erase/Program Suspend & Resume – Min. 100K Program-Erase cycles per sector – More than 20-year data retention  Advanced Security Features – Power Supply Lock-Down – Speical OTP protection – Top/Bottom, Complement array protection – Discoverable Parameters (SFDP) Register – 3X256-Byte Security Registers with OTP locks – Volatile & Non-volatile Status Register Bits  Low Power, Wide Temperature Range – Single 1.65 to 1.95V supply –