CMT2219A
CMT2219A
300 – 960 MHz OOK/(G)FSK Receiver
Features
Applications
Low-Cost Consumer Electronics Applications
On-Line Registers Configuration
Home and Building Automation
Off-Line EEPROM Programming
Infrared Receiver Replacements
Optional Chip Feature Configuration Schemes
Frequency Range: 300 to 960 MHz
Industrial Monitoring and Controls
FSK, GFSK and OOK Demodulation
Remote Automated Meter Reading
Symbol Rate: 0.1 to 100 ksps
Remote Lighting Control System
Sensitivity: -109 dBm @ 9.6 ksps, FSK, 868.35 MHz
Wireless Alarm and Security Systems
4-wire SPI Interface
Remote Keyless Entry (RKE)
Direct, Buffer and Packet Mode Supported
Configurable Data Handler and 32-Byte FIFO
Manchester Decoding and Data De-Whitening
Supply Voltage: 1.8 to 3.6 V
Low Power Consumption: 5.7 mA
Low Sleep Current
Ordering Information
Part Number
Frequency
Package
MOQ
CMT2219A-EQR
868.35 MHz
QFN16
5,000 pcs
More Ordering Info: See Page35
60 nA when Sleep Timer Off
440 nA when Sleep Timer On
RoHS Compliant
16-pin QFN 3x3 Package
Descriptions
The CMT2219A is an ultra low power, high performance,
OOK and (G)FSK receiver for various 300 to 960 MHz
wireless
applications. It
TM
NextGenRF
is part
of
QFN16 (3 X3)
the CMOSTEK
family, which includes a complete line of
GPO2
CMT2219A operates from a supply voltage of 1.8 V to 3.6
GPO1
into the registers is generated by the smart RFPDK. The
VCOP
configured either by off-line EEPROM programming or
on-line registers writing. The configuration file to be written
VCON
transmitters, receivers and transceivers. All features can be
12
11
10
9
RFIN 14
7
XOUT
ksps symbol rate, 868.35 MHz), and only 60 nA sleep
GND 15
6
GPO3
VDD 16
5
GPO4
current for superior battery life. The device supports packet
handling, 32-byte FIFO, Manchester decoding and data
de-whitening for the received data processing. Besides the
demodulated data and the sync clock, the device can also
1
2
3
4
FCSB
while achieving -109 dBm receiving sensitivity (FSK, 9.6
SCL
XIN
SDA
8
CSB
GND 13
V, when it is always on, it consumes only 5.7 mA current
send out the power-on reset, the system clock, as well as 2
configurable interrupts for the external device. CMT2219A
CMT2219A Top View
receiver together with the CMT211xA transmitter enables a
powerful RF link.
Copyright © By CMOSTEK
Rev 0.9 | Page 1/40
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CMT2219A
Typical Application
GP1
10
11
9
GPO2
13
GPO1
ANT
GP2
VCOP
VCON
12
L2
XIN
GND
X1
8
J1
C2
VDD
1
C1
14
L1
15
VDD
RFIN
XOUT
U1
CMT2219A
GND
GPO3
CSB
7
SDA
C3
6
U2
GP3
SCL
VDD
5
4
FCSB
GP4
Note:
Connector J1 is used for
EEPROM Programming.
4
SCL
3
2
1
CSB
C0
SDA
GPO4
3
5
MCU
16
2
FCSB
SCL
SDA
CSB
Figure 1. CMT2219A Typical Application Schematic
Table 1. BOM of Typical Application
Designator
Value (Match to 50Ω ANT)
Value (Common Used ANT)
433.92 MHz
433.92 MHz
Descriptions
868.35 MHz
Unit
Manufacturer
868.35 MHz
CMT2219A, 300 – 960
U1
MHz OOK/(G)FSK
-
-
-
CMOSTEK
26
26
MHz
EPSON
receiver
U2
X1
L1
L2
MCU
±20 ppm, SMD32*25 mm,
crystal
±5%, 0603 multi-layer chip
inductor
±5%, 0603 multi-layer chip
inductor
27
6.8
33
6.8
nH
Murata LQG18
22
3.9
22
3.9
nH
Murata LQG18
3.3
2.7
2.7
2.7
pF
Murata GRM15
C1
±0.25 pF, 0402 NP0, 50 V
C0
±20%, 0402 X7R, 25 V
0.1
0.1
uF
Murata GRM15
C2, C3
±5%, 0402 NP0, 50 V
27
27
pF
Murata GRM15
Rev 0.9 | Page 2/40
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CMT2219A
Abbreviations
Abbreviations used in this data sheet are described below.
ADC
Analog to Digital Converter
NP0
Negative-Positive-Zero
AFC
Automatic-Frequency-Control
NC
Not Connected
AGC
Automatic Gain Control
OOK
On-Off Keying
AN
Application Notes
PC
Personal Computer
BER
Bit Error Rate
PCB
Printed Circuit Board
BOM
Bill of Materials
PLL
Phase Lock Loop
BSC
Basic Spacing between Centers
PN9
Pseudorandom Noise 9
BT
bandwidth-time product
POR
Power On Reset
BW
Bandwidth
PUP
Power Up
CRC
Cyclic Redundancy Check
QFN
Quad Flat No-lead
DC
Direct Current
RESV
Reserved
EEPROM
Electrically Erasable Programmable Read-Only
RF
Radio Frequency
Memory
RFPDK
RF Products Development Kit
ESD
Electro-Static Discharge
RoHS
Restriction of Hazardous Substances
ESR
Equivalent Series Resistance
RSSI
Received Signal Strength Indicator
Ext
Extended
Rx
Receiving, Receiver
FIFO
First In First Out
SAR
Successive Approximation Register
FSK
Frequency-Shift Keying
SMD
Surface Mounted Devices
GFSK
Gauss frequency Shift Keying
SPI
Serial Port Interface
GPO
General Purpose Output
SR
Symbol Rate
HEX
Hexadecimal
STBY
Standby
IF
Intermediate Frequency
TH
Threshold
LNA
Low Noise Amplifier
Tx
Transmission, Transmitter
LO
Local Oscillator
Typ
Typical
LPOSC
Low Power Oscillator
USB
Universal Serial Bus
Max
Maximum
VCO
Voltage Controlled Oscillator
MCU
Microcontroller Unit
WOR
Wake-On Radio
Min
Minimum
XOSC
Crystal Oscillator
MOQ
Minimum Order Quantity
XTAL/Xtal
Crystal
NA
Not Applicable/Not Available
Rev 0.9 | Page 3/40
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CMT2219A
Table of Contents
1. Electrical Characteristics ............................................................................................................................................ 6
1.1 Recommended Operation Conditions ................................................................................................................... 6
1.2 Absolute Maximum Ratings................................................................................................................................... 6
1.3 Receiver Specifications ......................................................................................................................................... 7
1.4 Crystal Oscillator ................................................................................................................................................... 8
1.5 LPOSC .................................................................................................................................................................. 8
2. Pin Descriptions .......................................................................................................................................................... 9
3. Typical Performance Characteristics ....................................................................................................................... 10
4. Typical Application Schematic ................................................................................................................................. 11
5. Functional Descriptions ............................................................................................................................................ 12
5.1 Overview ............................................................................................................................................................. 12
5.2 Modulation, Frequency and Symbol Rate ........................................................................................................... 12
5.3 Embedded EEPROM and RFPDK ...................................................................................................................... 13
5.4 All Configurable Options ..................................................................................................................................... 13
5.5 Internal Blocks Description .................................................................................................................................. 17
5.5.1 RF Front-end and AGC ............................................................................................................................ 17
5.5.2 IF Filter..................................................................................................................................................... 17
5.5.3 RSSI ........................................................................................................................................................ 17
5.5.4 SAR ADC ................................................................................................................................................. 17
5.5.5 Crystal Oscillator ...................................................................................................................................... 17
5.5.6 Frequency Synthesizer ............................................................................................................................ 18
5.5.7 LPOSC..................................................................................................................................................... 18
5.5.8 OOK Demodulation .................................................................................................................................. 18
5.5.9 (G)FSK Demodulation.............................................................................................................................. 18
5.6 SPI Interface ....................................................................................................................................................... 19
5.6.1 Register Read & Write Operation............................................................................................................. 19
5.6.2 FIFO Read Operation .............................................................................................................................. 20
5.7 Operation States, Timing and Power .................................................................................................................. 21
5.7.1 Power-Up Sequence ................................................................................................................................ 21
5.7.2 Operating States ...................................................................................................................................... 21
5.8 GPOs and Interrupts ........................................................................................................................................... 23
5.9 Data Handling ..................................................................................................................................................... 25
5.9.1 Direct Mode ............................................................................................................................................. 25
5.9.2 Buffer Mode ............................................................................................................................................. 26
5.9.3 Packet Mode ............................................................................................................................................ 26
5.10 Receiver Operation Control ................................................................................................................................. 27
5.11 User Registers .................................................................................................................................................... 28
5.11.1 Configuration Bank .................................................................................................................................. 28
5.11.2 Control Bank ............................................................................................................................................ 28
6. Ordering Information ................................................................................................................................................. 35
7. Package Outline......................................................................................................................................................... 36
Rev 0.9 | Page 4/40
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CMT2219A
8. Top Marking ............................................................................................................................................................... 37
8.1 CMT2219A Top Marking ..................................................................................................................................... 37
9. Other Documentations .............................................................................................................................................. 38
10. Document Change List.............................................................................................................................................. 39
11. Contact Information .................................................................................................................................................. 40
Rev 0.9 | Page 5/40
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CMT2219A
1. Electrical Characteristics
VDD = 3.3 V, TOP = 25 ℃, FRF = 868.35 MHz, sensitivities are measured in receiving a PN9 sequence and matching to 50 Ω
impedance, with the BER of 0.1%. All measurements are performed using the board CMT2219A-EM V1.0, unless otherwise
noted.
1.1 Recommended Operation Conditions
Table 2. Recommended Operation Conditions
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Operation Voltage Supply
VDD
1.8
3.6
V
Operation Temperature
TOP
-40
85
℃
Supply Voltage Slew Rate
1
mV/us
1.2 Absolute Maximum Ratings
Table 3. Absolute Maximum Ratings
Parameter
Symbol
Conditions
[1]
Min
Max
Unit
Supply Voltage
VDD
-0.3
3.6
V
Interface Voltage
VIN
-0.3
VDD + 0.3
V
Junction Temperature
TJ
-40
125
℃
Storage Temperature
TSTG
-50
150
℃
Soldering Temperature
TSDR
255
℃
[2]
Lasts at least 30 seconds
ESD Rating
Human Body Model (HBM)
Latch-up Current
@ 85 ℃
-2
2
kV
-100
100
mA
Notes:
[1]. Stresses above those listed as “absolute maximum ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device under these conditions is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
[2]. The CMT2219A is high-performance RF integrated circuits with VCON/P pins having an ESD rating < 2 kV HBM.
Handling and assembly of this device should only be done at ESD-protected workstations.
Caution! ESD sensitive device. Precaution should be used when handling the device in order
to prevent permanent damage.
Rev 0.9 | Page 6/40
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CMT2219A
1.3 Receiver Specifications
Table 4. Receiver Specifications
Parameter
Frequency Range
Symbol
FRF
Symbol Rate
SR
Deviation
FDEV
Bandwidth-Time Product
(G) FSK Sensitivity
Level
OOK Working Current
FSK Working Current
300
960
MHz
0.1
40
ksps
(G)FSK demodulation
0.1
100
ksps
200
kHz
-
-
(G)FSK
1
-
433.92 MHz, SR = 1 ksps
-113
dBm
S868.35-OOK
868.35 MHz, SR = 1 ksps
-110
dBm
S915-OOK
915 MHz, SR = 1 ksps
-109
dBm
S315-FSK
315 MHz, SR = 9.6 ksps, FDEV = 19.2 kHz
-112
dBm
S433.92-FSK
433.92 MHz, SR = 9.6 ksps, FDEV = 19.2 kHz
-111
dBm
S868.35-FSK
868.35 MHz, SR = 9.6 ksps, FDEV = 19.2 kHz
-109
dBm
915 MHz, SR = 9.6 ksps, FDEV = 19.2 kHz
-109
dBm
10
dBm
315 MHz, OOK
3.5
mA
433.92 MHz, OOK
3.8
mA
868.35 MHz, OOK
5.2
mA
915 MHz, OOK
5.4
mA
315 MHz, FSK
4.0
mA
433.92 MHz, FSK
4.3
mA
868.35 MHz, FSK
5.7
mA
915 MHz, FSK
5.9
mA
When sleep timer is turned on
440
nA
When sleep timer is turned off
60
nA
24.8
Hz
150
us
PLVL
IDD-OOK
IDD-FSK
FRES
TLOCK
BI
From XOSC settled
SR = 1 ksps, ±1 MHz offset, CW interference
52
dB
SR = 1 ksps, ±2 MHz offset, CW interference
74
dB
75
dB
35
dB
-25
dBm
SR = 1 ksps, ±10 MHz offset, CW
interference
Image Rejection Ratio
Input 3rd Order Intercept
Point
Receiver Bandwidth
0.5
S433.92-OOK
Frequency Resolution
Blocking Immunity
Unit
dBm
ISLEEP
Settle Time
Max
-114
Sleep Current
Frequency Synthesizer
Typ
315 MHz, SR = 1 ksps
S915-FSK
Saturation Input Signal
Min
OOK demodulation
BT
S315-OOK
OOK Sensitivity
Conditions
IMR
IIP3
IF = 280 kHz
Two tone test at 1 MHz and 2 MHz offset
frequency. Maximum system gain settings
BW
Receiver Start-up Time
TSTART-UP
Receiver Wake-up Time
TWAKE-UP
50
From power up to receive, in Always Receive
Mode
From sleep to receive, in Duty-Cycle Receive
Mode
Rev 0.9 | Page 7/40
500
kHz
7.3
ms
0.61
ms
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CMT2219A
1.4 Crystal Oscillator
Table 5. Crystal Oscillator Specifications
Parameter
Symbol
[1]
Crystal Frequency
Conditions
FXTAL
Min
26
Crystal Tolerance[2]
Typ
Max
Unit
26
26
MHz
±20
Load Capacitance
CLOAD
Crystal ESR
Rm
XTAL Startup Time[3]
tXTAL
10
15
ppm
20
60
400
pF
Ω
us
Notes:
[1]. The CMT2219A can directly work with external 26 MHz reference clock input to XIN pin (a coupling capacitor is required)
with peak-to-peak amplitude of 0.3 to 0.7 V.
[2]. This is the total tolerance including (1) initial tolerance, (2) crystal loading, (3) aging, and (4) temperature dependence.
The acceptable crystal tolerance depends on RF frequency and channel spacing/bandwidth.
[3]. This parameter is to a large degree crystal dependent.
1.5 LPOSC
Table 6. LPOSC Specifications
Parameter
Symbol
[1]
Calibrated Frequency
FLPOSC
Frequency Accuracy
Temperature Coefficient
Conditions
After calibration
[2]
Supply Voltage Coefficient[3]
Initial Calibration Time
tLPOSC-CAL
Min
Typ
Max
Unit
1
kHz
1
%
-0.02
%/°C
+0.5
%/V
4
ms
Notes:
[1]. The LPOSC is automatically calibrated to the crystal oscillator during the PUP state, and is periodically calibrated since
then.
[2]. Frequency drifts when temperature changes after calibration.
[3]. Frequency drifts when supply voltage changes after calibration.
Rev 0.9 | Page 8/40
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CMT2219A
VCON
VCOP
GPO1
GPO2
2. Pin Descriptions
12
11
10
9
7
XOUT
GND 15
6
GPO3
VDD 16
5
GPO4
1
2
3
4
FCSB
RFIN 14
SCL
XIN
SDA
8
CSB
GND 13
Figure 2. CMT2219A Pin Assignments
Table 7. CMT2219A Pin Descriptions
Pin Number
Name
I/O
Descriptions
1
CSB
I
2
SDA
IO
3
SCL
I
4
FCSB
I
5
GPO4
O
General purpose output, options are: DOUT (Default), INT1, INT2 and DCLK
6
GPO3
O
General purpose output, options are: CLKO (Default), INT1, INT2 and DOUT
7
XOUT
O
Crystal oscillator output
4-wire SPI chip select input, active low, internally pulled high
4-wire SPI data input and output
4-wire SPI clock input, internally pulled low
4-wire SPI FIFO select input, active low. leave floating when programming the
EEPROM, internally pulled high
8
XIN
I
Crystal oscillator input or external reference clock input
9
GPO2
O
General purpose output, options are: INT1 (Default), INT2 and DCLK
10
GPO1
O
General purpose output, options are: nRSTO (Default), INT1, INT2 and DOUT
IO
VCO tank, connected to an external inductor
11
VCOP
12
VCON
13, 15
GND
I
Ground
14
RFIN
I
RF signal input to the LNA
16
VDD
I
Power supply input
Rev 0.9 | Page 9/40
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CMT2219A
3. Typical Performance Characteristics
Current vs. Temperature
6.60
5.50
6.20
Current Consumption （mA）
Current Consumption (mA)
Current vs. Supply Voltage
6.00
5.00
4.50
4.00
3.50
868.35 MHz
3.00
433.92 MHz
2.50
2.00
5.80
868.35MHz/3.6V
5.40
868.35MHz/3.3V
868.35MHz/1.8V
5.00
433.92MHz/3.6V
433.92MHz/3.3V
4.60
433.92MHz/1.8V
4.20
3.80
3.40
1.60
1.85
2.10
2.35
2.60
2.85
3.10
3.35
3.60
3.85
-50
-30
Supply Voltage (V)
-10
10
30
50
70
90
Temperature (℃)
Figure 3. Current vs. Voltage, FRF = 433.92 /
868.35 MHz, OOK, SR = 1 ksps
Figure 4. Current vs. Temperature, FRF =
433.92 / 868.35 MHz, FSK, SR = 1 ksps
Sensitivity vs. Temperature
Sensitivity vs. Supply Voltage
-108
-107.0
-108.0
-109
Sensitivity (dBm)
Sensitivity (dBm)
-109.0
-110.0
868.35 MHz
-111.0
433.92 MHz
-112.0
-110
-111
-112
868.35 MHz
-113.0
433.92 MHz
-113
-114.0
-115.0
-114
1.6
1.9
2.2
2.5
2.8
3.1
3.4
3.7
4
-50
-30
-10
10
30
50
70
90
Temperature (℃)
Supply Voltage (V)
Figure 5. Sensitivity vs. Supply Voltage, SR
= 1 ksps, OOK, BER = 0.1%
Figure 6. Sensitivity vs. Temperature, FRF = 433.92 /
868.35 MHz, FSK, VDD = 3.3 V, SR = 1 ksps, BER = 0.1%
Sensitivity vs. Symbol Rate
Sensitivity vs. BER
-108
-90
-109
Sensitivity (dBm)
Sensitivity (dBm)
-95
-100
-105
868.35 MHz
-110
433.92 MHz
-110
-111
-112
-113
-115
-114
-120
0
5
10
15
20
25
30
35
40
-115
0.01%
Symbol Rate (ksps)
868.35 MHz
433.92 MHz
0.10%
1.00%
10.00%
Bit Error Rate
Figure 7. Sensitivity vs. SR, FRF = 433.92 /
868.35 MHz, OOK, VDD = 3.3 V, BER = 0.1%
Figure 8. Sensitivity vs. BER, FRF = 433.92 /
868.35 MHz, VDD = 3.3 V, SR = 1 ksps
Rev 0.9 | Page 10/40
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CMT2219A
4. Typical Application Schematic
GP1
L2
9
GPO2
GPO1
VCOP
13
10
11
12
VCON
ANT
GP2
GND
XIN
RFIN
XOUT
X1
8
J1
C2
VDD
1
C1
14
L1
15
VDD
U1
CMT2219A
GND
GPO3
CSB
7
SDA
C3
6
U2
GP3
SCL
VDD
5
4
FCSB
GP4
Note:
Connector J1 is used for
EEPROM Programming.
4
SCL
3
2
1
CSB
C0
SDA
GPO4
3
5
MCU
16
2
FCSB
SCL
SDA
CSB
Figure 9. Typical Application Schematic
Notes:
1.
Connector J1 is a must for the CMT2219A EEPROM access during development or manufacture stage.
2.
The general layout guidelines are listed below. For more design details, please refer to “AN107 CMT221x Schematic and
PCB Layout Design Guideline”.
Use as much continuous ground plane metallization as possible.
Use as many grounding vias (especially near to the GND pins) as possible to minimize series parasitic inductance
between the ground pour and the GND pins.
3.
Avoid using long and/or thin transmission lines to connect the components.
Place C0 as close to the CMT2219A as possible for better filtering.
The table below shows the BOM of typical application.
Table 8. BOM of Typical Application
Designator
Value (Match to 50Ω ANT)
Value (Common Used ANT)
433.92 MHz
433.92 MHz
Descriptions
868.35 MHz
Unit
Manufacturer
868.35 MHz
CMT2219A, 300 – 960
U1
MHz OOK/(G)FSK
-
-
-
CMOSTEK
26
26
MHz
EPSON
receiver
U2
X1
L1
L2
MCU
±20 ppm, SMD32*25 mm,
crystal
±5%, 0603 multi-layer chip
inductor
±5%, 0603 multi-layer chip
inductor
27
6.8
33
6.8
nH
Murata LQG18
22
3.9
22
3.9
nH
Murata LQG18
3.3
2.7
2.7
2.7
pF
Murata GRM15
C1
±0.25 pF, 0402 NP0, 50 V
C0
±20%, 0402 X7R, 25 V
0.1
0.1
uF
Murata GRM15
C2, C3
±5%, 0402 NP0, 50 V
27
27
pF
Murata GRM15
Rev 0.9 | Page 11/40
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CMT2219A
5. Functional Descriptions
AGC
I-LMT
I-MXR
RFIN
FCSB
Image
Rejection
Band-pass
Filter
LNA
GND
DEMOD
RSSI
Radio
Controller
SAR
4-wire SPI,
FIFO
Interface
CSB
SCL
AFC & AGC
SDA
Q-MXR
Q-LMT
VCO
EEPROM
Loop
Filter
LO GEN
PFD/CP
26 MHz
GPO1
LPOSC
LDOs
GPO2
Divider
IO Control
VDD
GND
Bandgap
AFC & Σ-Δ Modulator
XOSC
GPO3
GPO4
POR
VCON
XIN
VCOP
XOUT
Figure 10. Functional Block Diagram
5.1 Overview
The CMT2219A is an ultra low power, high performance, OOK and (G)FSK RF receiver for various 300 to 960 MHz wireless
applications. It is part of the CMOSTEK NextGenRFTM family, which includes a complete line of transmitters, receivers and
transceivers. The device is based on a fully integrated, low-IF receiver architecture. The low-IF architecture facilitates a very low
external component count and does not suffer from powerline - induced interference problems. The RF signal coming from
antenna is amplified, down-converted, filtered and further amplified in analog domain before sending into the digital demodulator.
The synthesizer contains a VCO and a low noise fractional-N PLL with an output frequency resolution of 24.8 Hz. The VCO
operates at 2x the Local Oscillator (LO) frequency to reduce spurious emissions. Every analog block is calibrated on each
Power-on Reset (POR) to the internal reference voltage. The calibration helps the device to finely work under different
temperatures and supply voltages. The baseband filtering and demodulation is done by the digital demodulator. The device
supports packet handling, 32-byte FIFO, Manchester decoding and data de-whitening for the received data processing. Besides
the demodulated data and the sync clock, the device can also send out the power-on reset, the system clock, as well as 2
configurable interrupts for the external device.
The 4-wire SPI interface is not only used for configuring the device by programming the EEPROM, but also controlling the device
by the external MCU. All features can be configured either by off-line EEPROM programming or on-line registers writing. The
configuration file to be written into the registers is generated by the smart RFPDK. The RF Frequency, symbol rate and other
product features are all configurable. This saves the cost and simplifies the design, development and manufacture. The
CMT2219A operates from 1.8 to 3.6 V so that it can finely work with most batteries to their useful power limits. The receive
current is only 5.7 mA while achieving -109 dBm receiving sensitivity (FSK @ 868.35 MHz FRF, 9.6 ksps SR), and only 60 nA
sleep current for superior battery life. The CMT2219A receiver together with the CMT2119A transmitter enables a powerful RF
link.
5.2 Modulation, Frequency and Symbol Rate
The CMT2219A supports OOK demodulation with the symbol rate from 0.1 to 40 ksps and (G)FSK demodulation with the symbol
rate from 0.1 to 100 ksps. It continuously covers the frequency range from 300 to 960 MHz, including the license free ISM
frequency band around 315 MHz, 433.92 MHz, 868.35 MHz and 915 MHz. The internal frequency synthesizer contains a
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CMT2219A
high-purity VCO and a low noise fractional-N PLL with an output frequency resolution of 24.8 Hz. See the table below for the
demodulation, frequency and symbol rate information.
Table 9. Modulation, Frequency and Symbol Rate
Parameter
Demodulation
Value
Unit
OOK, FSK and GFSK
-
300 to 960
MHz
24.8
Hz
OOK: 0.1 to 40
ksps
(G)FSK: 0.1 to 100
ksps
Frequency
Frequency Resolution
Symbol Rate
5.3 Embedded EEPROM and RFPDK
The RFPDK is a PC application developed to help the user to configure the CMOSTEK NextGenRFTM products in the most
intuitional way. The user only needs to connect the USB Programmer between the PC and the device, fill in/select the proper
value of each parameter on the RFPDK, and click the “Burn” button to program the configurations into the device. The
configurations of the device will then remain unchanged until the next programming. No external MCU control is required in the
application program.
The RFPDK also allows the user to save the active configuration into a list by clicking on the “List” button, so that the saved
configuration can be directly reloaded from the list in the future. Furthermore, it supports exporting the configuration into a
hexadecimal file by clicking on the “Export” button. This file can be used to burn the same configuration into a large amount of
devices during the mass production, or used as an HEX file to load into the external MCU program for on-line configuration using
registers. See the figure below for the accessing of the EEPROM.
CMT2219A
RFPDK
EEPROM
CSB
Interface
SCL
SDA
CMOSTEK USB
Programmer
Figure 11. Accessing Embedded EEPROM
For more details of the CMOSTEK USB Programmer and the RFPDK, please refer to “AN103 CMT211xA-221xA One-Way RF
Link Development Kits Users Guide”.
5.4 All Configurable Options
Besides the demodulation, frequency and symbol rate, more options can be used to customize the device. The following is a
table of all the configurable options. On the RFPDK, the Basic Mode only contains a few options allowing the user to perform
easy and fast configurations. The Advanced Mode shows all the options that allow the user to customize the device in a deeper
level. The options in “Basic Mode” are a subset of that in the “Advanced Mode”.
All the details of these parameters will be given in the document “AN138 CMT2219A Configuration Guideline”. In this datasheet,
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CMT2219A
only main features are introduced. Remember that there are two methods to load all these parameters into the device:
Off-line Configuration
Use the RFPDK to directly burn (program) them into the embedded EEPROM of the device. The configuration retains until the
next programming. This is called the off-line configuration.
On-line Configuration
Use the RFPDK to export a HEX file of these parameters, load the content of the HEX file into the external MCU program then
writes the content into the Configuration Bank of the User Registers (See Chapter 5.11) at the beginning of the applications. The
configuration retains until the power down of the device. This is called the on-line configuration.
Either of these method works. To save the external MCU’s effort, method 1 can be used. To save the EEPROM programming
step in the manufacturing stage, method 2 can be used. The table below shows all the configurable parameters.
Table 10. Configurable Parameters on RFPDK
Category
Parameters
Frequency
Demodulation
Descriptions
The receive radio frequency, the range is from 300 to 960
MHz, with resolution of 0.01 MHz.
The demodulation type, the options are: OOK or (G)FSK
demodulation.
Default
868.35 MHz
(G)FSK
The receiver symbol rate, the range is from 0.1 to 40 ksps
Symbol Rate
2.4 ksps
resolution of 0.1 ksps.
RF
Settings
for OOK and from 0.1 to 100.0 ksps for (G)FSK, with
Squelch TH
The threshold of the squelch circuit to suppress the noise,
the range is from 0 to 255.
The sum of the crystal frequency tolerance of the Tx and
Xtal Tol. | Rx BW
the Rx, the range is from 0 to ±300 ppm. And the
calculated BW is configured and displayed.
Xtal Stabilizing
Time
0
This turns on/off the sleep timer.
310 us
Passive
Off
The sleep time has the range from 3 to 134,152,192 ms.
Sleep Time
It is only available when Active mode is selected or Sleep
10 ms
Timer is on in Passive mode.
Operation
Settings
Rx Timer
This turns on/off the receive timer.
Off
The receive time has the range from 0.04 to 2,683,043.00
Rx Time
ms. It is only available when Active mode is selected or
Basic
Advanced
Basic
Advanced
Basic
using on-line configuration.
Sleep Timer
Advanced
Advanced
or 2480 us.
using off-line configuration or works in Passive mode by
Basic
100 kHz
This determines that the chip works in Active mode by
Operation Mode
Basic
Advanced
±10 ppm |
Time for the device to wait for the crystal to get settled
after power up. The options are: 78, 155, 310, 620, 1240
Mode
1 ms
Rx Timer is on in Passive mode.
Basic
Advanced
Basic
Advanced
Basic
Advanced
Basic
Advanced
Basic
Advanced
Basic
Advanced
The extended receive time has the range from 0.04 to
Rx Time Ext
2,683,043.00 ms. It is only available when Wake-On
200.00 ms
Advanced
Off
Advanced
Radio is turned on and the Rx Timer is turned on.
Rx Early-Exit
Turn on/off the Rx early exit function, the options are: on
or off.
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CMT2219A
Category
Parameters
Descriptions
State After Rx
This defines the state to which the device will switch after
Exit
the Rx Early Exit. The options are: STBY or TUNE.
System Clock
Turn on/off the system clock output on CLKO, the options
Output
are: on or off.
Default
Mode
STBY
Advanced
Off
Advanced
6.500 MHz
Advanced
Off
Advanced
The system clock output frequency, the options are:
13.000, 6.500, 4.333, 3.250, 2.600, 2.167, 1.857, 1.625,
System Clock
Frequency
1.444, 1.300, 1.182, 1.083, 1.000, 0.929, 0.867, 0.813,
0.765, 0.722, 0.684, 0.650, 0.619, 0.591, 0.565, 0.542,
0.520, 0.500, 0.481, 0.464, 0.448, 0.433, 0.419 or 0.406
MHz. It is only available when System Clock Output is
turned on.
Wake-On Radio
Turn on/off the wake-on radio function, the options are:
on or off.
The condition to wake on the radio, the option is:
Wake-On
Extended by Preamble, or Extended by Preamble then
Extended by
Condition
Sync Word. It is only available when Wake-On Radio is
Preamble
Advanced
turned on.
Demod Method
The OOK demodulation methods, the options are: Peak
TH, or Fixed TH.
Peak TH
Advanced
50
Advanced
On
Advanced
1
Advanced
The threshold value when the Demod Method is “Fixed
Fixed Demod TH
TH”, the minimum input value is the value of Squelch
Threshold set on the RFPDK, the maximum value is 255.
OOK
Peak Drop
Settings
Peak Drop Step
Turn on/off the RSSI peak drop function, the options are
on, or off.
The RSSI peak drop step size, the options are: 1, 2, 3, 5,
6, 9, 12 or 15.
The RSSI peak drop rate, the options are: 1 step/4
Peak Drop Rate
symbols, 1 step/2 symbols, 1 step/1 symbol, or 1 step/0.5
symbol.
AGC
Automatic Gain Control, the options are: on or off.
1 step/4
symbols
On
Advanced
Advanced
The (G)FSK frequency deviation. The minimum value of
the deviation is equal to Xtal Tolerance (ppm) x
Deviation
Frequency (MHz) / 0.7. The maximum value of deviation
35 kHz
is equal to 220 kHz - Xtal Tolerance (ppm) x Frequency
Basic
Advanced
(MHz).
This parameter allows the user to select the method to
Sync Clock Type
Settings
perform the clock data recovery. The options are: tracing
Counting
Advanced
0: F-low
Basic
1:F-high
Advanced
21
Advanced
or counting.
(G)FSK
Data
Representation
To select whether the frequency “F-high” represent data 0
or 1. The options are: 0: F-high 1:F-low, or
0: F-low 1:F-high.
This is the relative threshold to trigger the (G)FSK
Rising Relative
TH
demodulation. It is measured in terms of RSSI code. The
options are: 0, 3, 6, 9, 12, 15, 18, 21, 24, 27, 30, 36, 42,
54, 66, or 90.
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CMT2219A
Category
Parameters
Falling Relative
TH
AFC
Data Mode
Packet Type
Descriptions
Default
Mode
255
Advanced
On
Advanced
This is the relative threshold to shut down the (G)FSK
demodulation. It is measured in terms of RSSI code. The
range is from 0 to 255.
Turn on/off the Automatic Frequency Control function.
The options are: On or Off.
The data acquisition mode, the options are: Direct, Buffer
or Packet.
The device can support two packet types. The options
are: Fixed length or Variable length.
Packet
Fixed Length
Basic
Advanced
Basic
Advanced
This defines the FIFO threshold that once it is reached,
FIFO Threshold
an interrupt is generated to notify the external MCU. The
32
range is from 1 to 32, in terms of the FIFO address.
De-Whitening
Seed
Basic
Advanced
This parameter is only available when DC-Free Data
Decode is not set to “None”. The initial seed for the data
NA
de-whitening polynomial. The range is from 0 to 255.
Basic
Advanced
The options of DC-free data decoding are None,
DC-Free Decode
Manchester 1 (01=one, 10=zero), Manchester 2 (10=
None
one, 01=zero), or Data De-whitening.
Preamble
The size of the valid preamble, the options are: None,
1-byte, 2-byte, 3-byte, or 4-byte.
2-byte
Basic
Advanced
Basic
Advanced
The size of the Sync Word, the options are: None, 1-byte,
Sync Size
2-byte, 3-byte, or 4-byte. This option cannot be set to
3-byte
“None” in buffer mode.
Basic
Advanced
This parameter is only available when Sync Size is not
Decode
set to “None”. It defines the value of the Sync Word, the
Settings
Sync Value
range is from 0 to 2N-1, where N is determined by Sync
0
Size. For example, if Sync Size is 1-byte, N is 8; if Sync
Basic
Advanced
Size is 2-byte, N is 16, etc.
The number of bits tolerated for the Sync Word
Sync Tolerance
recognition. The options are: None, 1 Error, 2 Errors or 3
None
Errors.
Basic
Advanced
The options for the Node ID detection are: None, Detect
Node ID Options
Node ID, Detect Node ID and 0x00, or Detect Node ID,
None
0x00 and 0xFF
Basic
Advanced
This parameter is only available when the Node ID
Node ID Value
Options is not set to “None”. It defines the value of the
NA
Node ID. The range is from 0 to 255.
Data Length
CRC Options
This defines the number of bytes of data in a fixed length
packet. The range is from 0 to 32.
The options for the CRC are: None, CCITT or IBM.
32
None
This parameter is only available when CRC Options is not
CRC Seed
set to “None”. It defines the initial seed for the CRC
polynomial. The range is from 0 to 65535.
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NA
Basic
Advanced
Basic
Advanced
Basic
Advanced
Basic
Advanced
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CMT2219A
5.5 Internal Blocks Description
5.5.1 RF Front-end and AGC
The CMT2219A features a low-IF receiver. The RF front-end of the receiver consists of a Low Noise Amplifier (LNA), I/Q mixer
and a wide-band power detector. Only a low-cost inductor and a capacitor are required for matching the LNA to any common
used antennas. The input RF signal induced on the antenna is amplified and down-converted to the IF frequency for further
processing.
By means of the wide-band power detector and the attenuation networks built around the LNA, the Automatic Gain Control (AGC)
loop regulates the RF front-end’s gain to get the best system linearity, selectivity and sensitivity performance, even though the
receiver suffers from strong out-of-band interference.
5.5.2 IF Filter
The signals coming from the RF front-end are filtered by the fully integrated 3rd-order band-pass image rejection IF filter which
achieves over 35 dB image rejection ratio typically. The IF center frequency is dynamically adjusted to enable the IF filter to
locate to the right frequency band, thus the receiver sensitivity and out-of-band interference attenuation performance are kept
optimal despite the manufacturing process tolerances. The IF bandwidth is automatically computed according to the three basic
system parameters input from the RFPDK: RF frequency, Xtal tolerance, and symbol rate.
5.5.3 RSSI
The subsequent multistage I/Q Log amplifiers enhance the output signal from IF filter before it is fed for demodulation. Receive
Signal Strength Indicator (RSSI) generators are included in both Log amplifiers which produce DC voltages that are directly
proportional to the input signal level in both of I and Q path. The resulting RSSI is a sum of both these two paths. Extending from
the nominal sensitivity level, the RSSI achieves over 66 dB dynamic range.
The CMT2219A integrates a patented DC-offset cancellation engine. The receiver sensitivity performance benefits a lot from the
novel, fast and accurate DC-offset removal implementation.
5.5.4 SAR ADC
The on-chip 8-bit SAR ADC digitalizes the RSSI output. When receiving a FSK or GFSK modulated signal, the digitized RSSI is
used to turn on and off the (G)FSK demodulator. When receiving an OOK modulated signal, it is used for OOK demodulation in
the digital domain.
5.5.5 Crystal Oscillator
The crystal oscillator is used as the reference clock for the PLL frequency synthesizer and system clock for the digital blocks. A
26 MHz crystal should be used with appropriate loading capacitors (C2 and C3 in Figure 9, Page 11). The values of the loading
capacitors depend on the total load capacitance CL specified for the crystal. The total load capacitance seen between the XIN
and XOUT pin should equal CL for the crystal to oscillate at 26 MHz.
CL =
1
+ Cparasitic
1
1
+
C3
C2
The parasitic capacitance is constituted by the input capacitance and PCB tray capacitance. The ESR of the crystal should be
within the specification in order to ensure a reliable start-up. An external signal source can easily be used in place of a
conventional XTAL and should be connected to the XIN pin. The incoming clock signal is recommended to have a peak-to-peak
swing in the range of 300 mV to 700 mV and AC-coupled to the XIN pin.
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CMT2219A
5.5.6 Frequency Synthesizer
A fractional-N frequency synthesizer is used to generate the LO frequency for the down conversion I/Q mixer. The frequency
synthesizer is fully integrated except the VCO tank inductor which enables the ultra low-power receiver system design. Using the
26 MHz reference clock provided by the crystal oscillator or the external clock source, it can generate any receive frequency
between 300 to 960 MHz with a frequency resolution of 24.8 Hz.
The VCO always operates at 2x of LO frequency. A high Q (at VCO frequency) tank inductor should be chosen to ensure the
VCO oscillates at any conditions meanwhile burns less power and gets better phase noise performance. In addition, properly
layout the inductor matters a lot of achieving a good phase noise performance and less spurious emission. The recommended
VCO inductors for different LO frequency bands are shown as bellow.
Table 11. VCO Inductor for Common Used Frequency Bands
LO Frequency Band (MHz)
315
433.92
868.35
915
VCO Inductor (nH)
33
22
3.9
3.9
Multiple subsystem calibrations are performed dynamically to ensure the frequency synthesizer operates reliably in any working
conditions.
5.5.7 LPOSC
An internal 1 kHz low power oscillator is integrated in the CMT2219A. It generates a clock to drive the sleep timer to periodically
wake the device up from sleep state. The Sleep Time can be configured from 3 to 134,152,192 ms (more than 37 hours) when
the device works in duty-cycle receive mode. Since the frequency of the LPOSC drifts when the temperature and supply voltage
change, it is automatically calibrated during the PUP state, and is periodically calibrated since then. The calibration scheme
allows the LPOSC to maintain its frequency tolerance to less than ±1%.
5.5.8 OOK Demodulation
The OOK demodulation is done by comparing the RSSI to a demodulation threshold. The threshold is an 8-bit binary value that is
comparable to the 8-bit digitized RSSI. There are two methods of OOK demodulation supported: Fixed TH and Peak TH. The
symbol rate range for the OOK demodulation is from 0.1 to 40 ksps. More details of the OOK demodulation can be found in the
document “AN138 CMT2219A Configuration Guideline”.
5.5.9 (G)FSK Demodulation
High-performance (G)FSK demodulation is supported. The symbol rate range for the (G)FSK demodulation is from 0.1 to 100
ksps. The device supports a wide range of deviations. The deviation is the maximum instantaneous difference between the
modulated frequency and the nominal carrier frequency Fo.
Deviation
F-low = Fo - FDEV
Deviation
Fo
F-high = Fo + FDEV
Figure 12. (G)FSK Deviation
A proper selection of the deviation is regarding to the modulation index and the frequency error between the TX and the RX. The
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CMT2219A
modulation index is given by:
Modulation Index
=
Deviation x 2
Symbol Rate
The value of crystal tolerance dominates the frequency error:
Frequency Error
>=
Xtal Tolerance x Frequency
By obeying the following rules, the RFPDK automatically computed the minimum value of the deviation that can be configured.
Deviation
>=
Deviation
>=
Symbol Rate x 2
Frequency Error
0.7
This means the Modulation Index cannot be less than 1. Also, the deviation must be larger than the frequency error in order to
guarantee the reception. The RFPDK also computes the maximum value of the deviation that can be configured. The following
rule is obeyed:
Deviation
0.5 SCL cycle
> 0.5 SCL cycle
CSB
FCSB
SCL
SDA
7
X
6
5
r/w = 1
4
3
2
1
0
7
6
register address
5
4
3
2
1
X
0
register read data
Figure 13. SPI Read Register Timing
> 0.5 SCL cycle
> 0.5 SCL cycle
CSB
FCSB
SCL
SDA
7
X
6
5
r/w = 0
4
3
2
1
7
0
register address
6
5
4
3
2
1
0
X
register write data
Figure 14. SPI Write Register Timing
5.6.2 FIFO Read Operation
When reading the 32-byte FIFO, the internal read pointer will automatically increment after each byte is read out. The MCU must
pull the FCSB to low for at least 1 SCL cycle before issuing the first rising edge of SCL. After issuing the last falling edge of SCL,
the MCU must wait for at least 2 us before pulling the FCSB back to high. Furthermore, the MCU must pull up the FCSB for at
least 4 us before reading the next byte of the FIFO. It allows the internal circuit to generate the FIFO interrupts according to the
current status.
> 2 us
> 1 SCL cycle
> 4 us
> 1 SCL cycle
> 2 us
CSB
FCSB
SCL
SDA
X
7
6
5
4
3
2
1
0
X
7
6
FIFO read data
5
4
3
2
1
0
X
FIFO read data
Figure 15. SPI Read FIFO Timing
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CMT2219A
5.7 Operation States, Timing and Power
5.7.1 Power-Up Sequence
The chip operation starts from a valid power-on reset. It usually takes about 0.5 ms for the valid power-on reset to release. Once
the POR is released the crystal oscillator start oscillating. The time taken for the crystal oscillator to get stable is fixed at 2.5 ms in
the first power-up. After the crystal gets stable, it takes about 6.5 ms for the chip to perform the internal blocks calibrations. The
calibrations are only performed once at the beginning of one power-on cycle.
VDD
POR
Time
POR Release
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