74HC594PW-Q100J

74HC594-Q100; 74HCT594-Q100 8-bit shift register with output register Rev. 2 — 13 June 2016 Product data sheet 1. General description The 74HC594-Q100; 74HCT594-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). The 74HC594-Q100; 74HCT594-Q100 is an 8-bit, non-inverting, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Separate clocks (SHCP and STCP) and direct overriding clears (SHR and STR) are provided on both the shift and storage registers. A serial output (Q7S) is provided for cascading purposes. Both the shift and storage register clocks are positive-edge triggered. If both clocks are connected together, the shift register is always one count pulse ahead of the storage register. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits  Automotive product qualification in accordance with AEC-Q100 (Grade 1)  Specified from 40 C to +85 C and from 40 C to +125 C  Synchronous serial input and output  Complies with JEDEC standard No.7A  8-bit parallel output  Shift and storage registers have independent direct clear and clocks  Independent clocks for shift and storage registers  100 MHz (typical)  ESD protection:  MIL-STD-883, method 3015 exceeds 2000 V  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) 3. Applications  Serial-to parallel data conversion  Remote control holding register 74HC594-Q100; 74HCT594-Q100 Nexperia 8-bit shift register with output register 4. Ordering information Table 1. Ordering information Type number Package 74HC594D-Q100 Temperature range Name Description Version 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 74HCT594D-Q100 74HC594PW-Q100 5. Functional diagram  '6  6+&3 67$*(6+,)75(*,67(5  6+5   67&3  675 %,76725$*(5(*,67(5         4 4 4 4 4 4 4 4 Fig 1. 46 PEF Functional diagram 6+&3 67&3 675    '6 6+5 Fig 2. Logic symbol 74HC_HCT594_Q100 Product data sheet 46 6+5 5    & 5 65*  4  4  4  4   4   4   4  4   67&3  6+&3 '6  & '  '      675  PEF 4 4 4 4 4 4 4 4 46 PEF Fig 3. IEC logic symbol All information provided in this document is subject to legal disclaimers. Rev. 2 — 13 June 2016 © Nexperia B.V. 2017. All rights reserved 2 of 25 74HC594-Q100; 74HCT594-Q100 Nexperia 8-bit shift register with output register 67$*(672 67$*( '6 ' ' 4 67$*( 4 ' 46 4 ))6+ ))6+ &3 &3 5 5 6+&3 6+5 ' ' 4 ))67 4 ))67 &3 &3 5 5 67&3 675 4 Fig 4. 4 4 4 4 4 4 4 PEF Logic diagram 6+&3 '6 67&3 6+5 675 4 4 4 4 46 PEF Fig 5. Timing diagram 74HC_HCT594_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 13 June 2016 © Nexperia B.V. 2017. All rights reserved 3 of 25 74HC594-Q100; 74HCT594-Q100 Nexperia 8-bit shift register with output register 6. Pinning information 6.1 Pinning +&4 +&74 4   9&& 4   4 4   '6 4   675 4   67&3 4   6+&3 4   6+5 *1'   +&4 46 4  4   9&&  4 4   '6 4   675 4   67&3 4   6+&3 4   6+5 *1'  DDD Fig 6.  46 DDD Pin configuration SO16 Fig 7. Pin configuration TSSOP16 6.2 Pin description Table 2. Pin description Symbol Pin Description Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7 15, 1, 2, 3, 4, 5, 6, 7 parallel data output GND 8 ground (0 V) Q7S 9 serial data output SHR 10 shift register reset (active LOW) SHCP 11 shift register clock input STCP 12 storage register clock input STR 13 storage register reset (active LOW) DS 14 serial data input VCC 16 supply voltage 74HC_HCT594_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 13 June 2016 © Nexperia B.V. 2017. All rights reserved 4 of 25 74HC594-Q100; 74HCT594-Q100 Nexperia 8-bit shift register with output register 7. Functional description Table 3. Function table[1] Function Input SHR STR SHCP STCP DS Clear shift register L X X X X Clear storage register X L X X X Load DS into shift register stage 0, advance previous stage data to the next stage H X  X H or L Transfer shift register data to storage register and outputs Qn X H X  X Shift register one count pulse ahead of storage register H H   X [1] H = HIGH voltage level; L = LOW voltage level;  = LOW-to-HIGH transition; X = don’t care. 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions Min Max Unit 0.5 +7.0 V - 20 mA - 20 mA Serial data output Q7S - 25 mA Parallel data output - 35 mA Serial data output Q7S - 50 mA input clamping current VI < 0.5 V or VI > VCC + 0.5 V [1] IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V [1] IO output current VO = 0.5 V to VCC + 0.5 V IIK ICC supply current IGND ground current total power dissipation Ptot [2] - 70 mA Serial data output Q7S - 50 mA Parallel data output - 70 mA 65 +150 C - 500 mW storage temperature Tstg [1] Parallel data output Tamb = 40 C to +125 C [2] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SO16 package: above 70 C the value of Ptot derates linearly with 8 mW/K. For TSSOP16 package: Ptot derates linearly with 5.5 mW/K above 60 C. 74HC_HCT594_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 13 June 2016 © Nexperia B.V. 2017. All rights reserved 5 of 25 74HC594-Q100; 74HCT594-Q100 Nexperia 8-bit shift register with output register 9. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit 2.0 5.0 6.0 V Type 74HC594-Q100 VCC supply voltage VI input voltage 0 - VCC V VO output voltage 0 - VCC V Tamb ambient temperature 40 +25 +125 C tr rise time VCC = 2.0 V - - 1000 ns fall time tf VCC = 4.5 V - 6.0 500 ns VCC = 6.0 V - - 400 ns VCC = 2.0 V - - 1000 ns VCC = 4.5 V - 6.0 500 ns VCC = 6.0 V - - 400 ns 4.5 5.0 5.5 V 0 - VCC V Type 74HCT594-Q100 VCC supply voltage VI input voltage VO output voltage Tamb ambient temperature tr rise time tf fall time 0 - VCC V 40 +25 +125 C VCC = 4.5 V - 6.0 500 ns VCC = 4.5 V - 6.0 500 ns Conditions Min Typ Max Unit VCC = 2.0 V 1.5 1.2 - V VCC = 4.5 V 3.15 2.4 - V 10. Static characteristics Table 6. Static characteristics type 74HC594-Q100 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = 25 C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VCC = 6.0 V 4.2 3.2 - V VCC = 2.0 V - 0.8 0.5 V VCC = 4.5 V - 2.1 1.35 V VCC = 6.0 V - 2.8 1.8 V IO = 4.0 mA; VCC = 4.5 V 3.98 4.32 - V IO = 5.2 mA; VCC = 6.0 V 5.48 5.81 - V IO = 6.0 mA; VCC = 4.5 V 3.98 4.32 - V IO = 7.8 mA; VCC = 6.0 V 5.48 5.81 - V VI = VIH or VIL Serial data output Q7S Parallel data outputs 74HC_HCT594_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 13 June 2016 © Nexperia B.V. 2017. All rights reserved 6 of 25 74HC594-Q100; 74HCT594-Q100 Nexperia 8-bit shift register with output register Table 6. Static characteristics type 74HC594-Q100 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit VOL LOW-level output voltage VI = VIH or VIL IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 V IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 V IO = 6.0 mA; VCC = 4.5 V - 0.15 0.26 V Serial data output Q7S Parallel data outputs IO = 7.8 mA; VCC = 6.0 V - 0.16 0.26 V II input leakage current VI = VCC or GND; VCC = 6.0 V - - 0.1 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 8.0 A Ci input capacitance - 3.5 - pF VCC = 2.0 V 1.5 - - V VCC = 4.5 V 3.15 - - V Tamb = 40 C to +85 C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VCC = 6.0 V 4.2 - - V VCC = 2.0 V - - 0.5 V VCC = 4.5 V - - 1.35 V VCC = 6.0 V - - 1.8 V IO = 4.0 mA; VCC = 4.5 V 3.84 - - V IO = 5.2 mA; VCC = 6.0 V 5.34 - - V IO = 6.0 mA; VCC = 4.5 V 3.84 - - V IO = 7.8 mA; VCC = 6.0 V 5.34 - - V IO = 4.0 mA; VCC = 4.5 V - - 0.33 V IO = 5.2 mA; VCC = 6.0 V - - 0.33 V IO = 6.0 mA; VCC = 4.5 V - - 0.33 V IO = 7.8 mA; VCC = 6.0 V - - 0.33 V VI = VIH or VIL Serial data output Q7S Parallel data outputs VOL LOW-level output voltage VI = VIH or VIL Serial data output Q7S Parallel data outputs II input leakage current VI = VCC or GND; VCC = 6.0 V - - 1.0 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 80 A 74HC_HCT594_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 13 June 2016 © Nexperia B.V. 2017. All rights reserved 7 of 25 74HC594-Q100; 74HCT594-Q100 Nexperia 8-bit shift register with output register Table 6. Static characteristics type 74HC594-Q100 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit VCC = 2.0 V 1.5 - - VCC = 4.5 V 3.15 - - V VCC = 6.0 V 4.2 - - V VCC = 2.0 V - - 0.5 V VCC = 4.5 V - - 1.35 V VCC = 6.0 V - - 1.8 V IO = 4.0 mA; VCC = 4.5 V 3.7 - - V IO = 5.2 mA; VCC = 6.0 V 5.2 - - V IO = 6.0 mA; VCC = 4.5 V 3.7 - - V IO = 7.8 mA; VCC = 6.0 V 5.2 - - V IO = 4.0 mA; VCC = 4.5 V - - 0.4 V IO = 5.2 mA; VCC = 6.0 V - - 0.4 V IO = 6.0 mA; VCC = 4.5 V - - 0.4 V IO = 7.8 mA; VCC = 6.0 V - - 0.4 V Tamb = 40 C to +125 C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage V VI = VIH or VIL Serial data output Q7S Parallel data outputs VOL LOW-level output voltage VI = VIH or VIL Serial data output Q7S Parallel data outputs II input leakage current VI = VCC or GND; VCC = 6.0 V - - 1.0 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 160 A 74HC_HCT594_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 13 June 2016 © Nexperia B.V. 2017. All rights reserved 8 of 25 74HC594-Q100; 74HCT594-Q100 Nexperia 8-bit shift register with output register Table 7. Static characteristics type 74HCT594-Q100 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit Tamb = 25 C VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 V VOH HIGH-level output voltage VI = VIH or VIL 3.98 4.32 - V 3.98 4.32 - V - 0.15 0.26 V Serial data output Q7S IO = 4.0 mA; VCC = 4.5 V Parallel data outputs IO = 6.0 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL Serial data output Q7S IO = 4.0 mA; VCC = 4.5 V Parallel data outputs IO = 6.0 mA; VCC = 4.5 V - 0.16 0.26 V II input leakage current VI = VCC or GND; VCC = 5.5 V - - 0.1 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 8.0 A ICC additional supply current per input pin; VI = VCC  2.1 V and other inputs at VCC or GND; IO = 0 A; VCC = 4.5 V to 5.5 V pins SHR, SHCP, STCP, STR - 150 540 A pin DS - 25 90 A - 3.5 - pF VCC = 4.5 V to 5.5 V 2.0 - - V - - 0.8 V 3.84 - - V 3.84 - - V - - 0.33 V IO = 6.0 mA; VCC = 4.5 V - - 0.33 V Ci input capacitance Tamb = 40 C to +85 C VIH HIGH-level input voltage VIL LOW-level input voltage VCC = 4.5 V to 5.5 V VOH HIGH-level output voltage VI = VIH or VIL Serial data output Q7S IO = 4.0 mA; VCC = 4.5 V Parallel data outputs IO = 6.0 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL Serial data output IO = 4.0 mA; VCC = 4.5 V Parallel data outputs II input leakage current VI = VCC or GND; VCC = 5.5 V - - 1.0 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 80 A 74HC_HCT594_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 13 June 2016 © Nexperia B.V. 2017. All rights reserved 9 of 25 74HC594-Q100; 74HCT594-Q100 Nexperia 8-bit shift register with output register Table 7. Static characteristics type 74HCT594-Q100 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit ICC additional supply current per input pin; VI = VCC  2.1 V and other inputs at VCC or GND; IO = 0 A; VCC = 4.5 V to 5.5 V pins SHR, SHCP, STCP, STR - - 675 A pin DS - - 112.5 A Tamb = 40 C to +125 C VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL 3.7 - - V 3.7 - - V - - 0.4 V IO = 6.0 mA; VCC = 4.5 V - - 0.4 V Serial data output Q7S IO = 4.0 mA; VCC = 4.5 V Parallel data outputs IO = 6.0 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL Serial data output Q7S IO = 4.0 mA; VCC = 4.5 V Parallel data outputs II input leakage current VI = VCC or GND; VCC = 5.5 V - - 1.0 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 160 A ICC additional supply current per input pin; VI = VCC  2.1 V and other inputs at VCC or GND; IO = 0 A; VCC = 4.5 V to 5.5 V pins SHR, SHCP, STCP, STR - - 735 A pin DS - - 122.5 A 74HC_HCT594_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 13 June 2016 © Nexperia B.V. 2017. All rights reserved 10 of 25 74HC594-Q100; 74HCT594-Q100 Nexperia 8-bit shift register with output register 11. Dynamic characteristics Table 8. Dynamic characteristics type 74HC594-Q100 GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 14. Symbol Parameter tpd 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max VCC = 2.0 V - 44 150 - 185 - 225 ns VCC = 4.5 V - 16 30 - 37 - 45 ns VCC = 5.0 V; CL = 15 pF - 13 - - - - - ns VCC = 6.0 V - 14 26 - 31 - 38 ns VCC = 2.0 V - 44 150 - 185 - 225 ns VCC = 4.5 V - 16 30 - 37 - 45 ns VCC = 5.0 V; CL = 15 pF - 13 - - - - - ns VCC = 6.0 V - 14 26 - 31 - 38 ns HIGH to LOW SHR to Q7S; propagation see Figure 12 delay VCC = 2.0 V - 39 150 - 185 - 225 ns VCC = 4.5 V - 14 30 - 37 - 45 ns VCC = 5.0 V; CL = 15 pF - 11 - - - - - ns VCC = 6.0 V - 12 26 - 31 - 38 ns - 39 125 - 155 - 185 ns VCC = 4.5 V - 14 25 - 31 - 37 ns VCC = 5.0 V; CL = 15 pF - 11 - - - - - ns VCC = 6.0 V - 12 21 - 26 - 31 ns - 19 75 - 95 - 110 ns - 7 15 - 19 - 22 ns - 6 13 - 16 - 19 ns VCC = 2.0 V - 14 60 - 75 - 90 ns VCC = 4.5 V - 5 12 - 15 - 18 ns VCC = 6.0 V - 4 10 - 13 - 15 ns [1] propagation d SHCP to Q7S; elay see Figure 8 STCP to Qn; see Figure 9 tPHL STR to Qn; see Figure 13 VCC = 2.0 V tTHL HIGH to LOW see Figure 8 output Serial data output Q7S transition VCC = 2.0 V time VCC = 4.5 V VCC = 6.0 V Parallel data outputs 74HC_HCT594_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 13 June 2016 © Nexperia B.V. 2017. All rights reserved 11 of 25 74HC594-Q100; 74HCT594-Q100 Nexperia 8-bit shift register with output register Table 8. Dynamic characteristics type 74HC594-Q100 …continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 14. Symbol Parameter tTLH 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max - 19 75 - 95 - 110 ns - 7 15 - 19 - 22 ns - 6 13 - 16 - 19 ns VCC = 2.0 V - 14 60 - 75 - 90 ns VCC = 4.5 V - 5 12 - 15 - 18 ns VCC = 6.0 V - 4 10 - 13 - 15 ns VCC = 2.0 V 80 10 - 100 - 120 - ns VCC = 4.5 V 16 4 - 20 - 24 - ns VCC = 6.0 V 14 3 - 17 - 20 - ns VCC = 2.0 V 80 10 - 100 - 120 - ns VCC = 4.5 V 16 4 - 20 - 24 - ns VCC = 6.0 V 14 3 - 17 - 20 - ns VCC = 2.0 V 80 14 - 100 - 120 - ns VCC = 4.5 V 16 5 - 20 - 24 - ns VCC = 6.0 V 14 4 - 17 - 20 - ns VCC = 2.0 V 100 10 - 125 - 150 - ns VCC = 4.5 V 20 4 - 25 - 30 - ns VCC = 6.0 V 17 3 - 21 - 26 - ns VCC = 2.0 V 100 14 - 125 - 150 - ns VCC = 4.5 V 20 5 - 25 - 30 - ns VCC = 6.0 V 17 4 - 21 - 26 - ns VCC = 2.0 V 100 17 - 125 - 150 - ns VCC = 4.5 V 20 6 - 25 - 30 - ns VCC = 6.0 V 17 5 - 21 - 26 - ns LOW to HIGH see Figure 8 output Serial data output Q7S transition VCC = 2.0 V time VCC = 4.5 V VCC = 6.0 V Parallel data outputs tW pulse width SHCP (HIGH or LOW); see Figure 8 STCP (HIGH or LOW); see Figure 9 SHR and STR (HIGH or LOW); see Figure 12 and Figure 13 tsu set-up time DS to SHCP; see Figure 10 SHR to STCP; see Figure 11 SHCP to STCP; see Figure 9 74HC_HCT594_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 13 June 2016 © Nexperia B.V. 2017. All rights reserved 12 of 25 74HC594-Q100; 74HCT594-Q100 Nexperia 8-bit shift register with output register Table 8. Dynamic characteristics type 74HC594-Q100 …continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 14. Symbol Parameter th trec fmax hold time 25 C Conditions Min Typ Max Min Max Min Max VCC = 2.0 V 25 8 - 30 - 35 - ns VCC = 4.5 V 5 3 - 6 - 7 - ns VCC = 6.0 V 4 2 - 5 - 6 - ns DS to SHCP; see Figure 10 recovery time SHR to SHCP and STR to STCP; see Figure 12 and Figure 13 maximum frequency VCC = 2.0 V 50 14 - 65 - 75 - ns VCC = 4.5 V 10 5 - 13 - 15 - ns VCC = 6.0 V 9 4 - 11 - 13 - ns VCC = 2.0 V 6.0 30 - 4.8 - 4.0 - MHz VCC = 4.5 V 30 92 - 24 - 20 - MHz VCC = 5.0 V; CL = 15 pF - 100 - - - - - MHz 35 109 - 28 - 24 - MHz - 84 - - - - - pF SHCP or STCP; see Figure 8 and Figure 9 VCC = 6.0 V CPD [1] [2] 40 C to +85 C 40 C to +125 C Unit power dissipation capacitance VI = GND to VCC; VCC = 5 V; fi = 1 MHz [2] tpd is the same as tPHL and tPLH. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL  VCC2  fo) = sum of outputs. 74HC_HCT594_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 13 June 2016 © Nexperia B.V. 2017. All rights reserved 13 of 25 74HC594-Q100; 74HCT594-Q100 Nexperia 8-bit shift register with output register Table 9. Dynamic characteristics type 74HCT594-Q100 GND = 0 V; VCC = 4.5 V; tr = tf = 6 ns; CL = 50 pF; see Figure 14. Symbol Parameter tpd 25 C Conditions Min Typ Max Min Max Min Max - 18 32 - 40 - 48 ns - 15 - - - - - ns - 18 32 - 40 - 48 ns VCC = 5.0 V; CL = 15 pF - 15 - - - - - ns HIGH to LOW SHR to Q7S; propagation see Figure 12 delay VCC = 5.0 V; CL = 15 pF - 17 30 - 38 - 45 ns - 14 - - - - - ns - 17 30 - 38 - 45 ns - 14 - - - - - ns - 7 15 - 19 - 22 ns - 5 12 - 15 - 18 ns - 7 15 - 19 - 22 ns - 5 12 - 15 - 18 ns SHCP (HIGH or LOW); see Figure 8 16 4 - 20 - 24 - ns STCP (HIGH or LOW); see Figure 9 16 4 - 20 - 24 - ns SHR and STR (HIGH or LOW); see Figure 12 and Figure 13 16 6 - 20 - 24 - ns DS to SHCP; see Figure 10 20 4 - 25 - 30 - ns SHR to STCP; see Figure 11 20 6 - 25 - 30 - ns SHCP to STCP; see Figure 9 20 7 - 25 - 30 - ns DS to SHCP; see Figure 10 5 3 - 6 - 7 - ns propagation delay [1] SHCP to Q7S; see Figure 8 VCC = 5.0 V; CL = 15 pF STCP to Qn; see Figure 9 tPHL STR to Qn; see Figure 13 VCC = 5.0 V; CL = 15 pF tTHL 40 C to +85 C 40 C to +125 C Unit HIGH to LOW see Figure 8 output Serial data output Q7S transition time VCC = 4.5 V Parallel data outputs VCC = 4.5 V tTLH LOW to HIGH see Figure 8 output Serial data output Q7S transition time VCC = 4.5 V Parallel data outputs VCC = 4.5 V tW tsu th pulse width set-up time hold time 74HC_HCT594_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 13 June 2016 © Nexperia B.V. 2017. All rights reserved 14 of 25 74HC594-Q100; 74HCT594-Q100 Nexperia 8-bit shift register with output register Table 9. Dynamic characteristics type 74HCT594-Q100 …continued GND = 0 V; VCC = 4.5 V; tr = tf = 6 ns; CL = 50 pF; see Figure 14. Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max trec recovery time SHR to SHCP and STR to STCP; see Figure 12 and Figure 13 10 5 - 13 - 15 - ns fmax maximum frequency SHCP or STCP; see Figure 8 and Figure 9 30 92 - 24 - 20 - MHz VCC = 5.0 V; CL = 15 pF - 100 - - - - - MHz - 89 - - - - - pF CPD [1] [2] power dissipation capacitance VI = GND to VCC  1.5 V; VCC = 5 V; fi = 1 MHz [2] tpd is the same as tPHL and tPLH. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL  VCC2  fo) = sum of outputs. 12. Waveforms IPD[ 6+&3LQSXW 90 W: W3/+ 46RXWSXW W3+/ 90 W7/+ W7+/ DDH Measurement points are given in Table 10. tPLH and tPHL are the same as tpd. tTLH = LOW to HIGH output transition time; tTHL = HIGH to LOW output transition time. Fig 8. The shift clock (SHCP) to output (Q7S) propagation delays, the shift clock pulse width, the maximum shift clock frequency, and output transition times 74HC_HCT594_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 13 June 2016 © Nexperia B.V. 2017. All rights reserved 15 of 25 74HC594-Q100; 74HCT594-Q100 Nexperia 8-bit shift register with output register 6+&3LQSXW 90 WVX IPD[ 90 67&3LQSXW W: W3+/ W3/+ 4QRXWSXWV 90 POD Measurement points are given in Table 10. tPLH and tPHL are the same as tpd. Fig 9. The storage clock (STCP) to output (Qn), propagation delays, the storage clock pulse width, the maximum storage clock pulse frequency and the shift clock to storage clock set-up time 90 6+&3LQSXW W VX W VX WK WK 90 '6LQSXW 90 4RXWSXW DDH Measurement points are given in Table 10. The shaded areas indicate when the input is permitted to change for predictable output performance. Fig 10. The data set-up time and hold times for DS input to SHCP 74HC_HCT594_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 13 June 2016 © Nexperia B.V. 2017. All rights reserved 16 of 25 74HC594-Q100; 74HCT594-Q100 Nexperia 8-bit shift register with output register 6+5LQSXW 90 WVX 90 67&3LQSXW 90 4QRXWSXWV PEF Measurement points are given in Table 10. Fig 11. The set-up time shift reset (SHR) to storage clock (STCP) 6+5LQSXW 90 W: WUHF 90 6+&3LQSXW W3+/ 46RXWSXW 90 PEF Measurement points are given in Table 10. tPLH and tPHL are the same as tpd. Fig 12. The shift reset (SHR) pulse width, the shift reset to output (Q7S) propagation delay and the shift reset to shift clock (SHCP) recovery time 74HC_HCT594_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 13 June 2016 © Nexperia B.V. 2017. All rights reserved 17 of 25 74HC594-Q100; 74HCT594-Q100 Nexperia 8-bit shift register with output register 90 675LQSXW W: WUHF 90 67&3LQSXW W3+/ 90 4QRXWSXWV PEF Measurement points are given in Table 10. tPLH and tPHL are the same as tpd. Fig 13. The storage reset (STR) pulse width, the storage reset to output (Qn) propagation delay and the storage reset to storage clock (STCP) recovery time Table 10. Measurement points Type Input Output VM VM 74HC594-Q100 0.5  VCC 0.5  VCC 74HCT594-Q100 1.3 V 1.3 V 74HC_HCT594_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 13 June 2016 © Nexperia B.V. 2017. All rights reserved 18 of 25 74HC594-Q100; 74HCT594-Q100 Nexperia 8-bit shift register with output register 9, W:  QHJDWLYH SXOVH 90 9 WI WU WU WI 9,  SRVLWLYH SXOVH 9 90  90 90  W: 9&& 9&& * 9, 92 5/ 6 RSHQ '87 &/ 57 DDG Test data is given in Table 11. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator CL = Load capacitance including jig and probe capacitance RL = Load resistor S1 = Test selection switch Fig 14. Test circuit for measuring switching times Table 11. Test data Type Input VI tr, tf CL RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ 74HC594-Q100 VCC 6 ns 15 pF, 50 pF 1 k open GND VCC 74HCT594-Q100 3V 6 ns 15 pF, 50 pF 1 k open GND VCC 74HC_HCT594_Q100 Product data sheet Load S1 position All information provided in this document is subject to legal disclaimers. Rev. 2 — 13 June 2016 © Nexperia B.V. 2017. All rights reserved 19 of 25 74HC594-Q100; 74HCT594-Q100 Nexperia 8-bit shift register with output register 13. Package outline 62SODVWLFVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP 627 ' ( $ ; F \ +( Y 0 $ =   4 $ $ $  $ SLQLQGH[ ș /S  /  H Z 0 ES   GHWDLO; PP VFDOH ',0(16,216LQFKGLPHQVLRQVDUHGHULYHGIURPWKHRULJLQDOPPGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = PP                                                 LQFKHV         ș R R 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPLQFKPD[LPXPSHUVLGHDUHQRWLQFOXGHG 5()(5(1&(6 287/,1( 9(56,21 ,(& -('(& 627 ( 06 -(,7$ (8523($1 352-(&7,21 ,668('$7(   Fig 15. Package outline SOT109-1 (SO16) 74HC_HCT594_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 13 June 2016 © Nexperia B.V. 2017. All rights reserved 20 of 25 74HC594-Q100; 74HCT594-Q100 Nexperia 8-bit shift register with output register 76623SODVWLFWKLQVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP ' 627 ( $ ; F \ +( Y 0 $ =   4 $ SLQLQGH[ $  $ $ ș /S /   H GHWDLO; Z 0 ES   PP VFDOH ',0(16,216PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = ș PP                            R R 1RWHV 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 3ODVWLFLQWHUOHDGSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 287/,1( 9(56,21 627 5()(5(1&(6 ,(& -('(& -(,7$ (8523($1 352-(&7,21 ,668('$7(   02 Fig 16. Package outline SOT403-1 (TSSOP16) 74HC_HCT594_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 13 June 2016 © Nexperia B.V. 2017. All rights reserved 21 of 25 74HC594-Q100; 74HCT594-Q100 Nexperia 8-bit shift register with output register 14. Abbreviations Table 12. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model LSTTL Low-Power Schottky Transistor-Transistor Logic MM Machine Model TTL Transistor-Transistor Logic 15. Revision history Table 13. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT594_Q100 v.2 20160613 Product data sheet - 74HC_HCT594_Q100 v.1 Modifications: 74HC_HCT594_Q100 v.1 74HC_HCT594_Q100 Product data sheet • Added type number 74HC594PW-Q100 (SOT403-1). 20120802 Product data sheet - All information provided in this document is subject to legal disclaimers. Rev. 2 — 13 June 2016 - © Nexperia B.V. 2017. All rights reserved 22 of 25 74HC594-Q100; 74HCT594-Q100 Nexperia 8-bit shift register with output register 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nexperia.com. 16.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet. 16.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia. In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia. Right to make changes — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. 74HC_HCT594_Q100 Product data sheet Suitability for use in automotive applications — This Nexperia product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of a Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. All information provided in this document is subject to legal disclaimers. Rev. 2 — 13 June 2016 © Nexperia B.V. 2017. All rights reserved 23 of 25 Nexperia 74HC594-Q100; 74HCT594-Q100 8-bit shift register with output register No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com 74HC_HCT594_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 13 June 2016 © Nexperia B.V. 2017. All rights reserved 24 of 25 Nexperia 74HC594-Q100; 74HCT594-Q100 8-bit shift register with output register 18. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 © General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 6 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 20 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 22 Legal information. . . . . . . . . . . . . . . . . . . . . . . 23 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 23 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Contact information. . . . . . . . . . . . . . . . . . . . . 24 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Nexperia B.V. 2017. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 13 June 2016