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TSM110NB04LDCR RLG

TSM110NB04LDCR RLG

  • 厂商:

    TAIWANSEMICONDUCTOR(台半)

  • 封装:

    TDFN8

  • 描述:

    DUAL N-CHANNEL POWER MOSFET 40V,

  • 数据手册
  • 价格&库存
TSM110NB04LDCR RLG 数据手册
TSM110NB04LDCR Taiwan Semiconductor Dual N-Channel Power MOSFET 40V, 48A, 11mΩ FEATURES KEY PERFORMANCE PARAMETERS ● Low RDS(ON) to minimize conductive losses PARAMETER VALUE UNIT VDS 40 V ● Logic level ● Low gate charge for fast power switching ● 100% UIS and Rg tested ● RoHS Compliant ● Halogen-free according to IEC 61249-2-21 RDS(on) (max) VGS = 10V 11 VGS = 4.5V 16 mΩ Qg 12 nC APPLICATIONS ● BLDC Motor Control ● Battery Power Management ● DC-DC Converter ● Secondary Synchronous Rectification PDFN56 Dual Note: MSL 1 (Moisture Sensitivity Level) per J-STD-020 ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted) PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current TC = 25°C (Note 1) Pulsed Drain Current (Note 2) Single Pulse Avalanche Current (Note 2) Single Pulse Avalanche Energy Total Power Dissipation LIMIT UNIT VDS 40 V VGS ±20 V ID TA = 25°C Total Power Dissipation SYMBOL TC = 25°C TC = 125°C TA = 25°C TA = 125°C Operating Junction and Storage Temperature Range 48 10 A IDM 192 A IAS EAS 16 38 A mJ PD PD 48 9.6 2 0.4 W W TJ, TSTG - 55 to +150 °C SYMBOL MAXIMUM UNIT Junction to Case Thermal Resistance RӨJC 2.6 °C/W Junction to Ambient Thermal Resistance RӨJA 61 °C/W THERMAL PERFORMANCE PARAMETER Thermal Performance Note: RӨJA is the sum of the junction-to-case and case-to-ambient thermal resistances. The casethermal reference is defined at the solder mounting surface of the drain pins. RӨJC is guaranteed by design while RӨCA is 2 determined by the user’s board design. The RӨJA limit presented here is based on mounting on a 1 in pad of 2 oz copper. 1 Version: A2001 TSM110NB04LDCR Taiwan Semiconductor ELECTRICAL SPECIFICATIONS (TA = 25°C unless otherwise noted) PARAMETER CONDITIONS SYMBOL MIN TYP MAX UNIT Static Drain-Source Breakdown Voltage VGS = 0V, ID = 250µA BVDSS 40 -- -- V Gate Threshold Voltage VGS = VDS, ID = 250µA VGS(TH) 1 1.6 2.5 V Gate-Source Leakage Current VGS = ±20V, VDS = 0V IGSS -- -- ±100 nA -- -- 1 -- -- 100 -- 8 11 -- 11 16 gfs -- 34 -- Qg -- 23 -- Qg -- 12 -- Qgs -- 4 -- Qgd -- 6 -- Ciss -- 1269 -- Coss -- 142 -- Crss -- 82 -- Rg 0.7 2.2 4.4 td(on) -- 1 -- tr -- 20 -- td(off) -- 13 -- tf -- 13 -- VSD -- -- 1.2 V VGS = 0V, VDS = 40V Drain-Source Leakage Current IDSS VGS = 0V, VDS = 40V TJ = 125°C Drain-Source On-State Resistance VGS = 10V, ID = 10A (Note 3) VGS = 4.5V, ID = 8A Forward Transconductance Dynamic (Note 3) RDS(on) VDS = 10V, ID = 10A µA mΩ S (Note 4) VGS = 10V, VDS = 20V, Total Gate Charge ID = 10A Total Gate Charge VGS = 4.5V, VDS = 20V, Gate-Source Charge ID = 8A Gate-Drain Charge Input Capacitance VGS = 0V, VDS = 20V, Output Capacitance f = 1.0MHz Reverse Transfer Capacitance Gate Resistance Switching f = 1.0MHz nC pF Ω (Note 4) Turn-On Delay Time Turn-On Rise Time VGS = 10V, VDS = 20V, Turn-Off Delay Time ID = 10A, RG = 2Ω Turn-Off Fall Time ns Source-Drain Diode Forward Voltage (Note 3) VGS = 0V, IS = 10A Reverse Recovery Time IS = 10A , trr -- 15 -- ns Reverse Recovery Charge dI/dt = 100A/μs Qrr -- 7 -- nC Notes: 1. 2. 3. 4. Silicon limited current only. L = 0.3mH, VGS = 10V, VDD = 25V, RG = 25Ω, IAS = 16A, Starting TJ = 25°C Pulse test: Pulse Width ≤ 300µs, duty cycle ≤ 2%. Switching time is essentially independent of operating temperature. ORDERING INFORMATION ORDERING CODE PACKAGE PACKING TSM110NB04LDCR RLG PDFN56 Dual 2,500pcs / 13” Reel 2 Version: A2001 TSM110NB04LDCR Taiwan Semiconductor CHARACTERISTICS CURVES (TA = 25°C unless otherwise noted) Output Characteristics Transfer Characteristics 30 30 ID, Drain Current (A) 18 ID, Drain Current (A) VGS=10V VGS=7V VGS=5V VGS=4.5V VGS=4V VGS=3.5V 24 12 VGS=3V 6 24 18 25℃ 12 -55℃ 6 150℃ 0 0 0 1 2 3 4 0 1 On-Resistance vs. Drain Current 3 4 Gate-Source Voltage vs. Gate Charge 0.016 10 0.014 VGS=4.5V 0.012 0.01 0.008 VGS=10V 0.006 0.004 0.002 0 6 12 18 24 VDS=20V ID=10A 8 6 4 2 0 30 0 5 2 VGS=10V ID=10A 1.6 1.4 1.2 1 0.8 0.6 0.4 -75 -50 -25 0 25 50 75 15 20 25 100 125 150 On-Resistance vs. Gate-Source Voltage RDS(on), Drain-Source On-Resistance (Ω) On-Resistance vs. Junction Temperature 1.8 10 Qg, Gate Charge (nC) ID, Drain Current (A) RDS(on), Drain-Source On-Resistance (Normalized) 2 VGS, Gate to Source Voltage (V) VGS, Gate to Source Voltage (V) RDS(ON), Drain-Source On-Resistance (Ω) VDS, Drain to Source Voltage (V) TJ, Junction Temperature (°C) 0.04 0.035 0.03 0.025 0.02 0.015 ID=10A 0.01 0.005 0 3 4 5 6 7 8 9 10 VGS, Gate to Source Voltage (V) 3 Version: A2001 TSM110NB04LDCR Taiwan Semiconductor CHARACTERISTICS CURVES (TA = 25°C unless otherwise noted) Capacitance vs. Drain-Source Voltage BVDSS (Normalized) Drain-Source Breakdown Voltage 1800 C, Capacitance (pF) 1600 1400 CISS 1200 1000 800 600 CRSS 400 COSS 200 0 0 10 20 30 ID=1mA 1.1 1 0.9 0.8 40 -75 VDS, Drain to Source Voltage (V) Maximum Safe Operating Area, Junction-to-Case -50 -25 0 25 50 75 100 125 150 TJ, Junction Temperature (°C) Source-Drain Diode Forward Current vs. Voltage 100 IS, Reverse Drain Current (A) 1000 ID, Drain Current (A) BVDSS vs. Junction Temperature 1.2 RDS(ON) 100 10 SINGLE PULSE RӨJC=2.6°C/W TC=25°C 1 10 25℃ -55℃ 150℃ 1 0.1 0.1 1 10 100 0.2 0.4 0.6 0.8 1 1.2 VSD, Body Diode Forward Voltage (V) VDS, Drain to Source Voltage (V) Normalized Thermal Transient Impedance, Junction-to-Case Normalized Effective Transient Thermal Impedance, ZӨJC 10 SINGLE PULSE RӨJC=2.6°C/W 1 Duty=0.5 Duty=0.2 Duty=0.1 Duty=0.05 Duty=0.02 Duty=0.01 Single 0.1 0.01 0.0001 0.001 Notes: Duty = t1 / t2 TJ = TC + PDM x ZӨJC x RӨJC 0.01 0.1 t, Square Wave Pulse Duration (sec) 4 Version: A2001 TSM110NB04LDCR Taiwan Semiconductor PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters) PDFN56 Dual SUGGESTED PAD LAYOUT (Unit: Millimeters) MARKING DIAGRAM TSC 110NB04LD YWWLF Y WW L F = Year Code = Week Code (01~52) = Lot Code (1~9,A~Z) = Factory Code 5 Version: A2001 TSM110NB04LDCR Taiwan Semiconductor Notice Specifications of the products displayed herein are subject to change without notice. TSC or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. Purchasers are solely responsible for the choice, selection, and use of TSC products and TSC assumes no liability for application assistance or the design of Purchasers’ products. Information contained herein is intended to provide a product description only. No license, express or implied, to any intellectual property rights is granted by this document. Except as provided in TSC’s terms and conditions of sale for such products, TSC assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of TSC products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify TSC for any damages resulting from such improper use or sale. 6 Version: A2001
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