VBM16R08
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/$IBOOFM07 %4
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• Low gate charge Qg results in simple drive
requirement
600
RDS(on) ()
VGS = 10 V
Qg max. (nC)
0.8
• Improved gate, avalanche and dynamic dV/dt
ruggedness
49
Qgs (nC)
13
Qgd (nC)
20
Configuration
Available
• Fully characterized capacitance and avalanche voltage
and current
Single
APPLICATIONS
• Switch mode power supply (SMPS)
D
• Uninterruptible power supply
• High speed power switching
TO-220AB
APPLICABLE OFF LINE SMPS TOPOLOGIES
G
• Active clamped forward
• Main switch
D
G
S
S
N-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
Drain-Source Voltage
VDS
600
Gate-Source Voltage
VGS
± 30
Continuous Drain Current
VGS at 10 V
TC = 25 °C
TC = 100 °C
Pulsed Drain Currenta
ID
UNIT
V
8.0
5.8
A
IDM
37
1.3
W/°C
Single Pulse Avalanche Energy b
EAS
290
mJ
Repetitive Avalanche Current a
IAR
8.0
A
EAR
17
mJ
PD
170
W
dV/dt
5.0
V/ns
TJ, Tstg
-55 to +150
Linear Derating Factor
Repetitive Avalanche
Energy a
Maximum Power Dissipation
TC = 25 °C
Peak Diode Recovery dV/dt c
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak temperature) d
Mounting Torque
for 10 s
6-32 or M3 screw
300
°C
10
lbf · in
1.1
N·m
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting TJ = 25 °C, L = 6.8 mH, Rg = 25 , IAS = 9.2 A (see fig. 12).
c. ISD 9.2 A, dI/dt 50 A/μs, VDD VDS, TJ 150 °C.
d. 1.6 mm from case.
1
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THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum Junction-to-Ambient
RthJA
-
62
Case-to-Sink, Flat, Greased Surface
RthCS
0.50
-
Maximum Junction-to-Case (Drain)
RthJC
-
0.75
UNIT
°C/W
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
VDS
VGS = 0 V, ID = 250 μA
600
-
-
V
VDS/TJ
Reference to 25 °C, ID = 1 mA
-
660
-
mV/°C
VGS(th)
VDS = VGS, ID = 250 μA
2.0
-
4.0
V
Gate-Source Leakage
IGSS
VGS = ± 30 V
-
-
± 100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = 600 V, VGS = 0 V
-
-
25
VDS = 480 V, VGS = 0 V, TJ = 125 °C
-
-
250
Gate-Source Threshold Voltage
Drain-Source On-State Resistance
Forward Transconductance
RDS(on)
ID = 5.5 A b
VGS = 10 V
gfs
VDS = 50 V, ID = 5.5 A
μA
-
0.8
-
5.5
-
-
S
Dynamic
Input Capacitance
Ciss
VGS = 0 V,
-
1400
-
Output Capacitance
Coss
VDS = 25 V,
-
180
-
Reverse Transfer Capacitance
Crss
f = 1.0 MHz, see fig. 5
-
7.1
-
Output Capacitance
Coss
VDS = 1.0 V, f = 1.0 MHz
-
1957
-
VDS = 480 V, f = 1.0 MHz
-
49
-
VDS = 0 V to 480 V
-
96
-
-
-
49
-
-
13
-
-
20
-
13
-
-
25
-
-
30
-
Effective Output Capacitance
Total Gate Charge
VGS = 0 V
Coss eff.
Qg
VGS = 10 V
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Turn-On Delay Time
td(on)
Rise Time
Turn-Off Delay Time
tr
Fall Time
tf
Rg
see fig. 6 and 13 b
VDD = 300 V, ID = 8.0 A
td(off)
Gate Input Resistance
ID = 8.0A, V DS = 400 V
Rg = 9.1 , RD = 35.5 , see fig.
10 b
f = 1 MHz, open drain
-
22
-
0.5
-
3.2
-
-
9.2
-
-
37
pF
nC
ns
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward Current a
Body Diode Voltage
IS
ISM
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
TJ = 25 °C, IS = 8.0 A, VGS = 0
S
Vb
TJ = 25 °C, IF = 8.0 A, dI/dt = 100 A/μs b
-
-
1.5
V
-
530
800
ns
-
3.0
4.4
μC
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width 300 μs; duty cycle 2 %.
c. Coss effective is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDS.
2
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
100
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.7V
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
10
1
4.7V
20µs PULSE WIDTH
TJ = 25 °C
0.1
0.1
1
10
10
TJ = 150 ° C
TJ = 25 ° C
1
0.1
4.0
100
VDS , Drain-to-Source Voltage (V)
I D , Drain-to-Source Current (A)
10
4.7V
20µs PULSE WIDTH
TJ = 150 ° C
10
100
RDS(on) , Drain-to-Source On Resistance
(Normalized)
3.0
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.7V
1
7.0
8.0
9.0
10.0
ID = 8.0A
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 10V
0
20
40
60
80 100 120 140 160
TJ , Junction Temperature ( °C)
VDS , Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
6.0
Fig. 3 - Typical Transfer Characteristics
TOP
1
5.0
VGS , Gate-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
100
V DS = 50V
20µs PULSE WIDTH
Fig. 4 - Normalized On-Resistance vs. Temperature
3
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10000
V GS = 0V,
f = 1MHz
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd
Coss = Cds + C gd
1000
Ciss
100
ISD , Reverse Drain Current (A)
C, Capacitance (pF)
100000
Coss
100
10
Crss
1
10
TJ = 150 ° C
1
TJ = 25 ° C
0.1
0.2
A
1
10
100
1000
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
1.0
1.2
Fig. 7 - Typical Source-Drain Diode Forward Voltage
1000
ID = 9.2A
OPERATION IN THIS AREA LIMITED
BY RDS(on)
400V
VDS = 480V
VDS = 300V
VDS = 120V
16
100
ID , Drain Current (A)
VGS , Gate-to-Source Voltage (V)
0.7
VSD ,Source-to-Drain Voltage (V)
V DS , Drain-to-Source Voltage (V)
20
V GS = 0 V
0.5
12
8
10us
10
100us
1ms
1
10ms
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
0
10
20
30
40
50
0.1
TC = 25 ° C
TJ = 150 ° C
Single Pulse
10
100
1000
QG , Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 8 - Maximum Safe Operating Area
4
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10000
VBM16R08
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RD
VDS
10.0
VGS
D.U.T.
RG
+
ID , Drain Current (A)
8.0
- VDD
10V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
6.0
Fig. 10a - Switching Time Test Circuit
4.0
VDS
90 %
2.0
0.0
25
50
75
100
125
150
10 %
VGS
TC , Case Temperature ( ° C)
t d(on)
tr
t d(off) t f
Fig. 10b - Switching Time Waveforms
Fig. 9 - Maximum Drain Current vs. Case Temperature
Thermal Response (Z thJC )
1
D = 0.50
0.20
0.1
0.01
0.00001
0.10
PDM
0.05
t1
0.02
0.01
t2
SINGLE PULSE
(THERMAL RESPONSE)
0.0001
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (s)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
5
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V DS
tp
15 V
Driver
L
VDS
D.U.T.
RG
+
V
- DD
IAS
20 V
tp
A
0.01 W
I AS
Fig. 12b - Unclamped Inductive Waveforms
EAS , Single Pulse Avalanche Energy (mJ)
Fig. 12a - Unclamped Inductive Test Circuit
600
ID
4.1A
5.8A
9.2A
TOP
500
BOTTOM
400
300
200
100
0
25
50
75
100
125
150
Starting TJ , Junction Temperature ( °C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
QG
50 kΩ
12 V
10 V
0.2 µF
0.3 µF
QGS
Q GD
+
D.U.T.
VG
-
VDS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
Fig. 13b - Gate Charge Test Circuit
6
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Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
+
-
-
Rg
•
•
•
•
dV/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
+
-
VDD
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Inductor current
VDD
Body diode forward drop
Ripple ≤ 5 %
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
7
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TO-220-1
A
E
DIM.
Q
H(1)
D
3
2
L(1)
1
M*
L
b(1)
INCHES
MIN.
MAX.
MIN.
MAX.
A
4.24
4.65
0.167
0.183
b
0.69
1.02
0.027
0.040
b(1)
1.14
1.78
0.045
0.070
F
ØP
MILLIMETERS
c
0.36
0.61
0.014
0.024
D
14.33
15.85
0.564
0.624
E
9.96
10.52
0.392
0.414
e
2.41
2.67
0.095
0.105
e(1)
4.88
5.28
0.192
0.208
F
1.14
1.40
0.045
0.055
H(1)
6.10
6.71
0.240
0.264
0.115
J(1)
2.41
2.92
0.095
L
13.36
14.40
0.526
0.567
L(1)
3.33
4.04
0.131
0.159
ØP
3.53
3.94
0.139
0.155
Q
2.54
3.00
0.100
0.118
ECN: X15-0364-Rev. C, 14-Dec-15
DWG: 6031
Note
• M* = 0.052 inches to 0.064 inches (dimension including
protrusion), heatsink hole for HVM
C
b
e
J(1)
e(1)
8
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