WD1305E20-6/TR

WD1305E20 WD1305E20 18V, 2A, High-Efficiency, Synchronous Step-Down Http//:www.sh-willsemi.com Converter Descriptions The WD1305E20 is a high efficiency, 500kHz switch frequency, synchronous step-down DC-DC converter with delivering 2A current capability. The WD1305E20 operates over a wide input voltage range from 4.5V to 18V and integrates main switch and synchronous switch with very low RDS(ON) to minimize the conduction loss. SOT-23-6L BST SW 6 2 GND VIN 5 3 FB EN 4 control mode which provides very fast load transient 1 The WD1305E20 applies Constant-on-time (COT) response and easy loop design. The WD1305E20 integrates full protections features including short-circuit protection, over-current protection, under voltage protection and thermal shutdown to make the part operating safely. The WD1305E20 is available in SOT-23-6L package. Pin configuration (Top view) Standard product is Pb-free and Halogen-free. Features Wide input voltage range of 4.5V to 18V ⚫ Integrate 140mΩ (High Side) / 110mΩ (Low Side) 1 2 Low RDS(ON) Power MOSFETs ⚫ 70µA Low Quiescent Current ⚫ High-efficiency synchronous-mode Operation ⚫ Power save mode at light load ⚫ Fast load transient response with COT control 3 Over-current protection and Hiccup ⚫ Output adjustable from 0.6V 5 4 1305 EI mode ⚫ 6 1305 EIYW ⚫ = Device Code = Special code Y = Year code W = Week code Marking Applications ⚫ Set Top Box ⚫ Access Point Router ⚫ DSL Modem、Security Cameras ⚫ Flat-Panel Televisions and Monitors Will Semiconductor Ltd. Order information Device Package Shipping WD1305E20-6/TR SOT-23-6L 3000/Reel&Tape 1 Feb, 2018 - Rev. 1.0 WD1305E20 Typical Applications BST Cin 4.7uF VIN ON/OFF EN WD1305E20 VIN =4.5~18V GND SW Cbst=0.1uF VOUT=3.3V L1:4.7uH C1 R1 100K 6.8pF Cout 22uF FB R2 22.1K Fig1 Schematic Diagram Pin Descriptions No. Symbol Description 1 BST Bootstrap pin. Connect a capacitor between SW and BST pins to form a floating supply across the high-side switch driver. Use a 0.1µF BST capacitor. 2 GND System Ground pin. Reference ground of the regulated output voltage: requires extra care during PCB layout. Connect to GND with copper traces and vias. 3 FB Converter feedback input. Connect to output voltage with feedback resistor divider. 4 EN Enable input control pin. To active high for automatic start-up, EN can be connected to VIN directly or through a resistor. 5 VIN Supply Voltage pin. Requires a cap to decouple the input rail. Connect using a wide PCB trace. 6 SW Switch Output pin. Connect using a wide PCB trace. Will Semiconductor Ltd. 2 Feb, 2018 - Rev. 1.0 WD1305E20 Block Diagram BST VIN EN Bias & Voltage reference BST Regulator VCC Regulator HS Driver Ramp Ton Timer HS MOS (NCH) SW Logic Control Iss VCC COMP LS MOS (NCH) LS Driver FB Valley Current Comparator GND Absolute Maximum Ratings(1) Parameter Symbol Value Unit VIN pin voltage range VIN -0.3～+20 V EN pin voltage range - -0.3～VIN V VSW -0.3～(VIN(Max)+0.3) V (VSW– 0.3) ~ (VSW + 6) V - -0.3~ 6 V PD 0.5 W RθJA 250 oC/W RθJC 110 oC/W Maximum Junction Temperature TJ 150 oC Lead temperature(Soldering, 10s) TL 260 oC Operating ambient temperature Topr -40 ~ 85 oC Storage temperature Tstg -55 ~ 150 oC HBM 5500 V CDM 2000 V SW pin voltage range (DC) BST pin voltage range(DC) All Other Pins Voltage Power Dissipation – SOT23-6L (Note 2) Thermal Characteristics ESD Classification Note (1): Exceeding these ratings may damage the device. Note (2): The maximum allowable power dissipation is a function of the maximum junction temperature T J(MAX), the junction-to-ambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by P D(MAX) = (TJ(MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. θ JA is tested based on EV5303-1.0 board. Will Semiconductor Ltd. 3 Feb, 2018 - Rev. 1.0 WD1305E20 Recommended Operation Conditions (3) Symbol VIN VOUT Operating Junction Temp. (TJ) Characteristics Supply Voltage Output Voltage Operating temperature Min 4.5 VFB -40 Typ 12 Max 18 8 125 - Unit V V ℃ Note (3): The device is not guaranteed to function outside of its operating conditions. Electronics Characteristics (Ta=25oC, VIN=12V, unless otherwise noted) Parameter Input Voltage Range VIN Under Voltage Lockout Threshold Standby Supply Current Shutdown Supply Current Symbol Conditions VIN VUVLO IQ ISHDN Min. Typ. 4.5 Max. 18 Rising 4.15 Falling 3.85 Units V 4.45 V VFB = 105%, IOUT = 0A 70 100 uA VEN = 0V, Vin=12V 2 5 uA 0.6 2% V Feedback reference Voltage VFB -2% Inductor valley Current Limit ILIM VIN = 12V, VOUT = 5V 2.4 A Oscillator Frequency fOSC VFB or VOUT in regulation 500 kHz RDS(ON) of HS FET RPFET ISW = 100mA 0.14 Ω RDS(ON) of LS FET RNFET ISW = −100mA 0.11 Ω Feedback Leakage Current IFB SW Leakage Current ILSW EN Rising Threshold VENH EN falling Threshold VENL EN Leakage Current IEN VFB=0.85V VIN = 12V, VSW = 0V or 12V ±30 nA ±5 uA 1.4 V 0.4 VIN = 12V, VEN = 0V 1 VIN = 12V, VEN = VIN 1 2 V uA Min On Time 50 nS Min Off Time 100 nS Soft Start Time 800 uS 19 V 18.5 V 15 uS 155 oC 25 oC Input OVP Shutdown Over Voltage VOVP Rising Falling 18 Protection Blanking Time Over Temperature Protection TOTP OTP Hysteresis Note (4): Guaranteed by design and engineering sample characterization. Will Semiconductor Ltd. 4 Feb, 2018 - Rev. 1.0 WD1305E20 Typical Characteristics 100 100 90 90 80 80 70 70 Efficiency (%) Efficiency (%) (Ta=25℃, VIN=12V，VEN=3V , VOUT =5V, L1=4.7uH, CIN=4.7uF, COUT=22μF, C1=6.8pF, unless otherwise noted) 60 50 40 30 VIN=5V VIN=12V VIN=15V VOUT=3.3V 20 10 0 1 10 100 60 50 40 30 VIN=6V VIN=12V VIN=15V VOUT=5V 20 10 0 1000 1 10 Load Current(mA) Efficieny VS.Load Current 5.4 3.45 5.3 5.2 Output Voltage (V) Output Voltage (V) 3.40 3.35 3.30 3.25 3.20 3.15 VIN=5V VIN=12V VIN=15V VOUT=3.3V 3.10 3.05 0 500 1000 1500 Output Current(mA) Output Voltage vs. Output Current 5.0 4.9 4.8 VIN=6V VIN=12V VIN=15V VOUT=5V 4.7 4.5 2000 0 500 1000 1500 Output Current(mA) Output Voltage vs. Output Current 2000 600 5.15 Oscillator Frequency(KHz) 590 5.10 5.05 5.00 4.95 4.90 4.85 VIN=9V VIN=12V VIN=15V VOUT=5V,IO=1A 4.80 4.75 4.70 -40 5.1 4.6 5.20 Output Voltage (V) 1000 Load Current(mA) Efficieny VS.Load Current 3.50 3.00 100 -20 0 20 40 60 80 570 560 550 540 530 520 VIN=9V VIN=12V VIN=15V VOUT=5V,IO=1A 510 500 490 -40 100 o -20 0 20 40 60 80 o Temperature( C) Output Voltage vs. Temperature Will Semiconductor Ltd. 580 Temperature( C) Oscillator Frequency vs. Temperature 5 Feb, 2018 - Rev. 1.0 100 120 3.0 110 2.5 Shutdown Current(uA) Quiescent Current(uA) WD1305E20 100 90 80 70 60 6 8 10 12 14 2.0 1.5 1.0 0.5 0.0 16 6 8 10 12 14 16 Input Voltage (V) Shutdown Current vs. Input Voltage Input Voltage (V) Quiescent Current vs. Input Voltage Oscillator Frequency(KHz) 630 615 600 585 570 555 540 525 Vout=5V Iout=1A 510 495 6 8 10 12 14 16 Input Voltage (V) Oscillator Frequency VS. Input Voltage Ripple, VIN=12V, VO=3.3V,VEN=3.0V,IO=2A Will Semiconductor Ltd. Ripple, VIN=12V, VO=5V,VEN=3.0V,IO=2A 6 Feb, 2018 - Rev. 1.0 WD1305E20 VIN=12V, VO=5V,VEN=3.0V,IO=2A, EN On VIN=12V, VO=5V,VEN=3.0V,IO=2A, EN OFF VIN= VEN=12V,VO=5V,IO=1mA,VIN ON VIN= VEN=12V,VO=5V,IO=2A,VIN ON VIN=12V,VO=3.3V,VEN=3.0V,IO=1mA-2A Will Semiconductor Ltd. VIN=12V,VO=5V,VEN=3.0V,IO=1mA-2A 7 Feb, 2018 - Rev. 1.0 WD1305E20 Operation Informations Drive EN to GND to place the WD1305E20 in Control Mode shutdown mode. In shutdown mode, the reference, The WD1305E20 step-down converter operates control circuit, main switch, and synchronous switch with typically 500KHz constant on time at moderate turn off and the output becomes high impedance. to heavy load currents. Both the upper and lower Input current falls to 1.8μA (Typ.) during shutdown synchronous N-channel MOSFET switches are mode. internal. The converter uses a proprietary fast constant on time control (FCOT) scheme to achieve Over Temperature Protection (OTP) good line and load transient response. The FCOT™ As soon as the junction temperature (TJ) exceeds mode control combines adaptive on-time control 155oC with shutdown. In this mode, the high-side and low-side an internal pseudo-fixed compensation frequency and circuit low for external (Typ.), the device goes into thermal MOSFET are turned off. component count configuration with both low ESR and ceramic output capacitors. It is stable even with virtually no ripple at the output. At the beginning of each cycle, the high-side MOSFET is turned on. This MOSFET is turned off after internal one shot timer expires. This one shot duration is set proportional to the converter input voltage-VIN and inversely proportional to the output voltage-VO to maintain a pseudo-fixed frequency over the input voltage range. The one-shot timer is reset and the high-side MOSFET is turned on again when a internal pseudo ramp is fallen below the output of internal error amplifier. Short-Circuit Protection WD1305E20 provides cycle by cycle current limit, the inductor valley current need to drop below the current limit before the next pulse can be fired. Dropout Operation Once the input voltage comes close to the nominal output voltage, the upper switch is turned on for one or more cycles. Every 20-30us, low side FET is turned on briefly to refresh Cboot. Thus the voltage difference between BST and SW can be kept high enough to fully turn on the upper FET. The output voltage will then be determined by the input voltage minus the voltage drop across the upper N-channel MOSFET and the inductor. Shutdown Mode Will Semiconductor Ltd. 8 Feb, 2018 - Rev. 1.0 WD1305E20 Application Informations Inductor Core Selection External component selection for the application Different core materials and shapes will change the circuit depends on the load current requirements. size/current and price/current relationship of an Certain tradeoffs between different performance inductor. Toroid or shielded pot cores in ferrite or parameters can also be made. permalloy materials are small and don’t radiate Output Voltage Setting The output voltage can be calculated as: V OUT  R1   = 0.6  1 + R 2   The external resistive divider is connected to the output. The sum of R1 and R2 should be between 10kΩ to 1 MΩ, to keep the network robust against much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. The choice of which style inductor to use often depends more on the price vs. size requirements requirements and any radiated than on what the field EMI WD1305E20 requires to operate. Input Capacitor Selection noise. An external feed forward capacitor C1 is Capacitor ESR is a major contributor to input ripple required for optimum load transient response. The in high-frequency DC-DC converters. Ordinary value of C1 should be in the range between 6.8pF aluminum electrolytic capacitors have high ESR and and 22pF. If Vout is 3.3V, R1=100k is chosen, then should be avoided. Low-ESR tantalum or polymer using the equation, R2 can be calculated to be capacitors are better and provide a compact 22.1k. solution for space constrained surface mount Route the FB line away from noise sources, such as designs. Ceramic capacitors have the lowest overall the inductor or the SW line. ESR. The input filter capacitor reduces peak currents and noise at the input voltage source. Inductor Selection Connect a low ESR bulk capacitor (4.7μF to 10μF) The WD1305E20 high switching frequency allows to the input. Select this bulk capacitor to meet the the use of a physically small inductor. The inductor input ripple requirements and voltage rating rather ripple current is determined by than capacitance value. Use the following equation I L = VOUT  VOUT  1 −  ( f )( L)  VIN  to calculate the maximum RMS input current: I RMS = Where △IL is the peak-to-peak inductor ripple I OUT VOUT  (VIN − VOUT ) VIN current and f is the switching frequency. The inductor peak-to-peak current ripple is typically set to be 40% of the maximum dc load current. Using this guideline and solving for L,  VOUT  VOUT L= 1 −  f (40% I LOAD ( MAX ) )  VIN  It is important to ensure that the inductor is capable Output Capacitor Selection Ceramic capacitors with low-ESR values have the lowest output voltage ripple and are recommended. At nominal load current, the device operates in PWM mode, and the RMS ripple current is calculated as: of handling the maximum peak inductor current, ILPK, I LPK I = I LOAD ( MAX ) + L 2 Will Semiconductor Ltd. VOUT VIN 1 = VOUT   L f 2 3 1− determined by I RMSCout At nominal load current, the device operates in 9 Feb, 2018 - Rev. 1.0 WD1305E20 PWM mode, and the overall output voltage ripple is the sum of the voltage spike caused by the output components or near the switch node (SW). 6. If high impedance traces are routed near high capacitor ESR plus the voltage ripple caused by current and/or the SW node, place a ground charging and discharging the output capacitor: plane shield between the traces. VOUT  VIN  1 V = VOUT   + ESR  L f  8  COUT  f  1− At light load currents, the converter operates in pulse skipping mode, and the output voltage ripple is dependent on the capacitor and inductor values. Larger output capacitor and inductor values minimize the voltage ripple in PSM operation and tighten dc output accuracy in PSM operation. PC Board Layout Considerations A good circuit board layout aids in extracting the most performance from the WD1305E20. Poor circuit layout degrades the output ripple and the electromagnetic interference (EMI) or electromagnetic compatibility (EMC) performance. The evaluation board layout is optimized for the WD1305E20. Use this layout for best performance. If this layout needs changing, use the following guidelines: 1. Use separate analog and power ground planes. Connect the sensitive analog circuitry (such as voltage divider components) to analog ground; connect the power components (such as input and output bypass capacitors) to power ground. Connect the two ground planes together near the load to reduce the effects of voltage dropped on circuit board traces. Locate CIN as close to the VIN pin as possible, and use separate input bypass capacitors for the analog. 2. Route the high current path from CIN, through L, to the SW and PGND pins as short as possible. 3. Keep high current traces as short and as wide as possible. 4. Place the feedback resistors as close as possible to the FB pin to prevent noise pickup. 5. Avoid routing high impedance traces, such as FB, near the high Will Semiconductor Ltd. current traces and 10 Feb, 2018 - Rev. 1.0 WD1305E20 PACKAGE OUTLINE DIMENSIONS SOT-23-6L D b E1 E L1 L L2 θ e c e1 SIDE VIEW A2 A1 A TOP VIEW Symbol SIDE VIEW Dimensions in Millimeters Min. Typ. Max. A - - 1.45 A1 0 - 0.15 A2 0.90 1.10 1.30 b 0.30 0.40 0.50 c 0.10 - 0.21 D 2.72 2.92 3.12 E 2.60 2.80 3.00 E1 1.40 1.60 1.80 e 0.85 0.95 1.05 e1 1.80 1.90 2.00 L 0.30 - 0.60 L1 0.59Ref L2 0.25Ref θ Will Semiconductor Ltd. 0︒ - 11 8︒ Feb, 2018 - Rev. 1.0 WD1305E20 TAPE AND REEL INFORMATION Reel Dimensions RD Reel Dimensions Tape Dimensions W P1 Quadrant Assignments For PIN1 Orientation In Tape Q1 Q2 Q1 Q2 Q3 Q4 Q3 Q4 RD Reel Dimension W Overall width of the carrier tape P1 Pitch between successive cavity centers Pin1 Pin1 Quadrant Will Semiconductor Ltd. User Direction of Feed 7inch 13inch 1 8mm 12mm 16mm 2mm 4mm 8mm Q1 Q2 Q3 12 Q4 Feb, 2018 - Rev. 1.0