NE6053CQ1

NE6053 Qi v1.2 Compliant Wireless Power Receiver Description The NE6053 is a highly integrated WPC compliant wireless power receiver IC for portable applications. This device receives an AC power signal from a compatible wireless transmitter and converts it into a regulated 5V output, which can be used to charge batteries for mobile devices. Power delivery is limited to 5W in accordance with the Qi specification. The power path is implemented with low resistive devices to ensure low power dissipation. ter na l The NE6053 integrates a high-efficiency synchronous full-bridge rectifier, which output is regulated by a LDO before being sent out. It also implements control circuits used to modulate the load to transmit WPC-compliant messages to the transmitter for the connection establishment and power control during the power transfer state. This messages transfer is compliant with Qi standard version 1.2. or In The device includes over-temperature/voltage protection and a Foreign Object Detection (FOD) method to protect the base station and mobile device from over-heating in the presence of a metallic foreign object. NE6053 dF Transmitter Drivers Rectifier LDO de nti a lP DC to AC rep are Power Communication Controller .C on fi Controller orp Figure 1. Wireless Power Consortium (WPC or Qi) Inductive Power System yC Features Sil erg  Single-Chip 5W solution or Wireless Power Consortium (WPC) “Qi” compliant power receiver  Conforms to WPC specification 1.2 specifications  Integrated synchronous full bridge rectifier  Over-Temperature/Voltage protection  Embedded MCU, OTP, RAM and ADC  Foreign Object Detection (FOD) Applications  Cell phones, smart phones  Headsets  Battery packs  Portable media players NE6053 Rev.1.0 © 2019 Silergy Corp.  Digital cameras  Remote controls  GPS  Other portable devices Silergy Corp. Confidential- Prepared for Customer Use Only 1 All Rights Reserved. LOAD NE6053 Typical Application Circuit CVDD5 CISNS ISENSE VDD5 ADCVDD5 CVDD18 VDD18 RECTO CRECT USBI CCLMP1 CLMP1 OUT CCOMM1 5V out COMM1 CBOOT1 RBOOT1 na l COUT BOOT1 C1 AC1 AC2 ILIM RBOOT2 CBOOT2 R1 ter C2 or In COIL D1 STAT R2 BOOT2 ITERM CCOMM2 COMM2 TS R3 dF CCLMP2 NTC* CLMP2 rep are GND Figure 2. Typical Application Circuit lP *Note: Please refer Section Thermal Sensing for NTC resistor network design Marking1 Ambient Temp Shipping Carrier MPQ QFN55-32 5X5X0.75mm -20 to +85 oC Tape and Reel 3000 -20 to +85 oC Tape and Reel 3000 CSP40 5X8 Ball Array .C NE6053CC1 NE6053 LLLLLLL YYWWZZX NE6053 LLLLLLL YYWWZZX Package on fi Part Number NE6053CQ1 de nti a Ordering Information orp Absolute Maximum Ratings Sil erg yC Table 1. Absolute Maximum Ratings Input Voltage Output Current Output Sink Current ESD Rating(All) NE6053 Rev.1.0 © 2019 Silergy Corp. AC1, AC2 COM1, COM2, CLMP1, CLMP2, RECTO BOOT1, BOOT2 STAT, ILIM, ITERM, TS, OUT, ISENSE, VDD5, ADCVDD5 VDD18 AC1, AC2 OUT STAT COMM1, COMM2,CLMP1,CLMP2 HBM MM Values Min Max -0.7 17 Unites V -0.3 17 V -0.3 22 V -0.3 6 V -0.3 -0.3 6 2 2 1.5 15 1 ±2 ±200 V V A(RMS) A mA A KV V Silergy Corp. Confidential- Prepared for Customer Use Only 2 All Rights Reserved. NE6053 Table 2. ELECTRICAL CHARACTERISTICS mV VRECT rising 15 V 3.8 V orp Trig voltage of clamp function VCLAMP_HYS Hysteresis on clamp voltage RDS_ON, Turn on resistance of CLMP1 and CLMP2 CLAMP Full Bridge Rectifier Voltage between AC1 and VAC AC2 IRECT Rectifier switch current ILOAD =1000 mA 5.044 1 ms 5.2 5.356 V 1500 mA 150 o 15 o C C 1.32 V 0.44 V 1.5 Ω 2 Kb/s VRECT rising 16 V VRECT falling 9 V 1 Ω VRECT > 5V Sil erg yC VCLAMP mA 16 Signaling frequency on COMM pin CLAMP PIN ter Iload=0mA na l 300 .C ON,COMM fCOMM VRECT falling on fi Temperature Protection Internal thermal shutdown temperature TJ Internal thermal shutdown hysteresis External thermal shutdown VTS_HOT threshold (Hot) External thermal shutdown VTS_COLD threshold (Cold) COMM PIN RDSCOMM1 and COMM2 UNITS V or In Hysteresis on UVLO Overvoltage protection for OVP rectifier voltage Rectifier under voltage VRECT-DPM protection, restricts IOUT at VRECT-DPM \Quiescent Current Active chip quiescent IQ current Output Short Circuit Deglitch time before disable tDGL output OUTPUT Regulated output voltage VOUT-REG (TA= -20 to +85 oC) IOUT Current limit range MAX 3.4 rep are VUVLO_HYS TYP VRECT rising lP Under voltage lock-out MIN de nti a UVLO CONDITIONS dF (TA= 25 oC, unless otherwise noted) SYMBOL DESCRIPTION System 17 V 1.6 A RDS-ON,HS High side 80 mΩ RDS-ON,LS Low side 80 mΩ fOP Operating frequency 100 205 KHz Note: IMAX=1A NE6053 Rev.1.0 © 2019 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 3 All Rights Reserved. NE6053 PGNDB RECTO ISENSE OUT USBI RSVD9 RSVD8 RSVD7 32 31 30 29 28 27 26 25 Pin Configuration & Description AC1 1 AC2 2 BOOT1 3 BOOT2 4 21 COMM1 5 20 ADCVDD5 COMM2 6 19 TS CLMP1 7 CLMP2 8 AGNDB na l 22 ter VDD5 OUT OUT AC2 BOO T1 RECT OUT OUT PG N D BOO T2 NC ISEN SE AGN DB on fi RECT .C ITERM 17 ILIM 16 OUT NC PG N D STAT ITER M AVD D5 yC orp 18 AGNDA 15 DGND USBI PG N D 6 COM M1 COM M2 RSVD 5 ILIM ADC_ VDD5 7 CLM P2 RSVD 2 RSVD 4 VDD1 8 TS 8 CLM P1 RSVD 1 RSVD 3 DGN D AGN DA erg STAT or In RECT A 5 Sil 23 32 QFN B -Bottom View- NE6053 Rev.1.0 © 2019 Silergy Corp. RSVD6 dF 14 RSVD4 AC2 lP 2 VDD1P8 12 AC1 13 11 RSVD3 AC1 RSVD5 10 RSVD2 1 4 C de nti a D rep are 9 RSVD1 E 3 24 5x8 CSP Silergy Corp. Confidential- Prepared for Customer Use Only 4 All Rights Reserved. NE6053 Pin Functions PIN No. Name Type 1 AC1 I AC input power from receiver coil antenna 2 AC2 I AC input power from receiver coil antenna 3 BOOT1 O 4 BOOT2 O 5 COMM1 O 6 COMM2 O 7 CLMP1 O 8 CLMP2 O 9 RSVD1 O Reserved pin, keep floating. 10 RSVD2 I Reserved pin , tie to ground. 11 RSVD3 I Reserved pin , tie to ground. 12 RSVD4 I Reserved pin , tie to ground. 13 RSVD5 I Reserved pin , tie to ground. 14 VDD18 I/O 15 DGND Digital Ground 16 AGNDA Analog Ground 17 ILIM I/O 18 ITERM I/O 19 TS 20 ADCVDD5 21 VDD5 22 AGNDB 23 STAT I/O 24 RSVD6 O Reserved pin, keep floating. 25 RSVD7 O Reserved pin, keep floating. 26 RSVD8 O Reserved pin, keep floating. 27 RSVD9 O Reserved pin, keep floating. 28 USBI I Wire charge Voltage input pin. When this pin is high voltage, Out will be shutdown. 29 OUT PWR de nti a lP rep are dF or In ter na l Bootstrap pin for driving high-side FETs of FBR. Connect a 10nF ceramic capacitor from BOOT1 to AC1. Bootstrap pin for driving high-side FETs of FBR. Connect a 10nF ceramic capacitor from BOOT2 to AC2. Open-drain output used to communicate with primary by varying reflected impedance. Connect through a 22nF capacitor to AC1 for capacitive load modulation. Open-drain output used to communicate with primary by varying reflected impedance. Connect through a 22nF capacitor to AC2 for capacitive load modulation. Open drain FET which is utilized for a non-power dissipative overvoltage AC clamp protection. When the RECTO voltage goes above 15 V, the switch will be turned on and the capacitor will act as a low impedance to protect the IC from damage. If used, CLMP1 is required to be connected to AC1 0.47µF capacitor. Open drain FET which is utilized for a non-power dissipative overvoltage AC clamp protection. When the RECTO voltage goes above 15 V, the switch will be turned on and the capacitor will act as a low impedance to protect the IC from damage. If used, CLMP2 is required to be connected to AC2 0.47 µF capacitor. .C on fi 1.8V Power orp ILIM: I/O pin to set output current limit. Connect a 2KΩ resistor to ground. Please refer Current Limit section. ITERM: I/O pin to program termination threshold. Connect a resistor to ground. Please refer Charge Done section. yC I erg I/O I/O Sil NE6053 Rev.1.0 © 2019 Silergy Corp. Description Temperature sensor input. Please refer Thermal Sensing section. ADC 5V Power Analog 5V Power Analog Ground STAT: Open-drain status output – active when output current is being delivered to the load (i.e. when the output of the supply is enabled). Output pin, delivers power to the load. Silergy Corp. Confidential- Prepared for Customer Use Only 5 All Rights Reserved. NE6053 PIN No. Name Type Description 30 ISENSE I Input for the received power measurement. 31 RECTO O Filter capacitor for the internal synchronous rectifier. Connect a ceramic capacitor to PGNDB. Depending on the power levels, the value may be 4.7 µF to 22 µF. 32 PGNDB Ground Pin of HV circuit Simplified Block Diagram VDD5 RECTO OUT na l VDD18 LDO LDO Rectifier Control rep are BOOT1 Current Sense BOOT2 lP COMM1 COMM2 de nti a Digital Core on fi OSC AGNDA AGNDB ILIM ADC ITERM PGNDB ADCVDD5 Figure 3. Simplified block diagram Sil erg yC orp DGND .C CLMP2 STAT TS Thermal Sense CLMP1 ISENSE dF AC2 or In LDO AC1 ter USBI NE6053 Rev.1.0 © 2019 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 6 All Rights Reserved. NE6053 Principle of Operation A wireless system consists of a primary side (also referred to as the power transmitter or base station) and a secondary side equipment (also referred to as a power receiver). The primary side functions as a charging pad whereas the secondary side is usually used as a power source to charge the battery in a mobile device. Both primary and secondary sides have coils, which are tightly coupled to transfer power magnetically. The primary side is powered by a DC source. A switching circuit converts the DC power into AC before delivering it to the primary coil. This AC power induces magnetic fluxes in the primary coil, which can be picked up by the secondary coil when placed nearby the primary coil. The AC power on the secondary coil is then rectified and regulated before being sent out to charge a battery. or In ter na l A digital communication channel is established as soon as the secondary equipment is powered up from the secondary coil. The power receiver will then send data to the transmitter at a rate of 2KHz by changing the load of the secondary coil. The changes of the load impedance and are reflected to the primary coil. By monitoring the current or voltage change at the primary side, the data can be recovered. dF The data is used by the receiver to convey certain messages to the transmitter, including the type of the receiver device, the power it requires, received power measurements for Foreign Object Detection (FOD), and power control during the power transfer state. Control over the amount of power transferred is achieved by changing the frequency, the duty cycle or the phase of the switching signal, which drives the primary coil. rep are The transmitter is powered off most of the time. It wakes up occasionally to see if a Qi compliant mobile device is present. If a mobile device is detected and authenticated, the primary remains powered up. The mobile device maintains full control over the amount of power to be transferred from the transmitter using communication packets. lP Functional Description de nti a Overview .C on fi The simplified block diagram of the NE6053 is shown in Figure 3. An external inductor and two capacitors transfer energy from the transmitter's coil through the NE6053's AC1 and AC2 pins to be full-wave-rectified and stored on a capacitor connected to RECTO. Until the voltage across the capacitor exceeds the threshold of the UVLO(VRECT), the rectification is performed by the body diodes of the Synchronous Full Bridge Rectifier FETs. After the internal biasing circuit is enabled, the SFBR Control and Drivers block operates the MOSFET switches in the rectifier for increased efficiency. An internal ADC monitors the voltage at RECTO and the load current, and the NE6053 sends instructions to the wireless power transmitter to increase or decrease the amount of power transferred or to terminate power transmission. The voltages at the outputs of the voltage regulators and the internal temperature are also monitored to ensure proper operation. orp Rectifier Sil Power Control erg yC When the VDD5 and VDD18 UVLOs have been released, the full-bridge rectifier switches to synchronous mode to more efficiently transfer energy from the transmitter to the load at RECTO. NE6053 monitors the RECTO voltage. If the voltage at RECTO exceeds about 16V, the clamp circuit turns on two internal FETs to connect AC1 and AC2 to ground through external capacitors, shunting current from the secondary coil away from the NE6053. The clamp is released when the voltage at RECTO falls to about 8V. The voltage at RECTO and the current through the rectifier are sampled periodically by sensing circuit and digitized by the ADC. The digital equivalents of the voltage and current are supplied to the MCU, which decides whether the loading conditions on RECTO indicate that a change in the operating point is required. If the load is heavy enough to bring the voltage at RECTO below its target, the transmitter is instructed to move its frequency lower, closer to resonance. If the voltage at RECTO is higher than its target, the transmitter is instructed to increase its frequency. Modulator In WPC communication, the Power Receiver communicates to the Power Transmitter using backscatter modulation. For this purpose, the Power Receiver modulates the amount of power, which it draws from the Power Signal. The Power Transmitter detects this as a modulation of the current through and/or voltage across the Primary Cell. In other words, the Power Receiver and Power Transmitter use an amplitude modulated Power Signal to provide a Power Receiver to Power Transmitter communications channel. Modulation can be done NE6053 Rev.1.0 © 2019 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 7 All Rights Reserved. NE6053 with either AC Modulation, using internal switches to connect external capacitors from AC1 and AC2 to ground, or DC Modulation, which connects an internal resistor from RECTO to ground. The communication protocol is covered in the Communication section of this datasheet. In NE6053, Capacitive Modulation is used as the communication method. The amplitude changes in TX coil voltage or current can be detected by the transmitter’s decoder. The resulting signal observed by the TX. Cs AC1 VRECT Cm Ls Cd GND na l AC2 AC2 dF AC1 COMM1 COMM2 rep are COMM Drive or In ter Figure 4. Capacitive Modulation The NE6053 is a capacitive load modulation as shown in Figure 4 and 5. In this case, a capacitor is connected from COMM1 to AC1 and from COMM2 to AC2. When the COMM switches are closed there is effectively a 22nF capacitor connected between AC1 and AC2. Connecting a capacitor in between AC1 and AC2 modulates the impedance seen by the coil, which will be reflected in the primary as a change in current. GND lP Figure 5. Capacitive Load Modulation de nti a COMMUNICATION The WPC protocol uses a differential bi-phase encoding scheme to modulate the data bits onto the TX coil voltage/current. Each data bit is aligned at a full period of 0.5ms (tCLK) or 2k Hz. An encoded ONE results in two transitions during the bit period and an encoded ZERO results in a single transition. See Figure 6 for an example of the differential bi-phase encoding. orp .C on fi tCLK ONE ZERO ONE ZERO ONE ONE ZERO ZERO Sil erg yC Figure 6. Differential Bi-phase Encoding Scheme (WPC volume 1: Low Power, Part 1 Interface Definition) The bits are sent LSB first and use an 11-bit asynchronous serial format for each portion of the packet. This includes one start bit, n-data bytes, a parity bit, and a single stop bit. The start bit is always ZERO and the parity bit is odd. The stop bit is always ONE. Figure 7 shows the details of the asynchronous serial format. START b0 b1 b2 b3 b4 b5 b6 b7 Parity Stop Figure 7. Asynchronous Serial Formatting (WPC volume 1: Low Power, Part 1 Interface Definition) Each packet format is organized as shown in Figure 8. Preamble Header Message Checksum Figure 8. Packet Format (WPC volume 1: Low Power, Part 1 Interface Definition) NE6053 Rev.1.0 © 2019 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 8 All Rights Reserved. NE6053 Thermal Sensing NE6053 includes a ratiometric external temperature sense function. The temperature sense function has two ratiometric thresholds which represent a hot and cold condition. An external temperature sensor is recommended in order to provide safe operating conditions for the receiver product. This pin is best used for monitoring the surface that can be exposed to the end user (e.g. place the NTC resistor closest to the user). Figure 9 allows for any NTC resistor to be used with the given VHOT and VCOLD thresholds. VTSB(2.2V) 20KΩ R2 na l TS R1 R3 or In ter NTC dF Figure 9. NTC Circuit Used for Safe Operation of the Wireless Receiver Power Supply rep are The resistors R1 and R3 can be solved by resolving the system of equations at the desired temperature thresholds. The two equations are: R3(RNTC|TCOLD+R1) R3+(RNTC|TCOLD+R1) R3(RNTC|TCOLD+R1) lP %VCOLD= de nti a R3+(RNTC|TCOLD+R1) x100 +R2 R3(RNTC|THOT+R1) R3+(RNTC|THOT+R1) %VHOT= R3(RNTC|THOT+R1) RNTC|TCOLD=R0 e RNTC|THOT=R0 e +R2 β(1/TCOLD-1/T0) β(1/THOT-1/T0) yC orp .C Where on fi R3+(RNTC|THOT+R1) x100 erg where, TCOLD and THOT are the desired temperature thresholds in degrees Kelvin. RO is the nominal resistance and β is the temperature coefficient of the NTC resistor. RO is fixed at 20kΩ. Sil An example solution is provided: • R1 = 4.23kΩ • R3 = 66.8kΩ where the chosen parameters are: • %VHOT = 19.6% • %VCOLD = 58.7% • TCOLD = –10°C • THOT = 100°C • β = 3380 • RO = 10kΩ NE6053 Rev.1.0 © 2019 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 9 All Rights Reserved. NE6053 Charge Done - 1 (ITERM) NE6053 uses ITERM pin to set the termination threshold of output current. When the output current is smaller than the set ITERM value, NE6053 will send EPT packet to TX to stop the power transfer. The Table 4-1 is the relation between the termination threshold (ITERM) and voltage of ITERM pin. When the relative external resistor is connected between ITERM and ground, the voltage of ITERM pin is the value in the second column and the termination threshold (ITERM) in the first column will be set. The resistor value should be selected as the third column or as close to it as possible. For this application, the voltage of ITERM pin should be within the value between 0.5V to 1.1V ITERM pin Voltage (mV) External Resistor R11 (KΩ) 50 620 62 100 820 82 150 1000 100 External Resistor R12 (KΩ) ter ITERM (mA) na l Table 4-1. Termination Threshold Setting Table or In N/A N/A de nti a lP rep are dF N/A Figure 10-1. External Resistor for ITERM Application on fi Charge Done - 2 (Full Charged) .C ITERM pin also work as a digital input pin for charge done function. The FC input should be pulled low when normal operating. When the FC input is pulled high, NE6053 will send EPT packet to TX to indicate the portable device is Full Charged (FC) and stop power transfer. The external resistors vary with different highlevel voltage of FC input. External Resistor R12 (KΩ) 18 12 3.9 2 Sil erg yC orp Table 4-2. FC Setting Table High-level Input Voltage of FC (V) External Resistor R11 (KΩ) 5 10 3.3 10 2.5 10 1.8 10 Figure 10-2. External Resistor for Full Charged Application NE6053 Rev.1.0 © 2019 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 10 All Rights Reserved. NE6053 Current Limit (ILIM) The NE6053 includes a means of providing hardware overcurrent protection by means of an analog current regulation loop. The hardware current limit provides an extra level of safety by clamping the maximum allowable output current (e.g. a current compliance). An external resistor RLIM is connected between ILIM and ground. The Table 5 is the relation between the current limitation (ILIM) and the value of the external resistor. For low power application (less than 2W), the current limitation should be set to 0.64A to ensure adequate system efficiency. Table 5. Current Limitation Setting Power Class 2W 5W 5W 5W 5W ter na l RLIM(ohm) 47k 75k 100k 130k 160k or In LIM(LDO)(A) 0.64 0.8 0.96 1.13 1.3 rep are dF End Power Transfer Packet (WPC Header 0x02) The WPC allows for a special command for the receiver to terminate power transfer from the transmitter termed End Power Transfer (EPT) packet. Table 6 specifies the v1.1 reasons column and their corresponding data field value. The condition column corresponds to the methodology used by NE6053 to send equivalent message. Table 6. EPT Table de nti a lP Condition Not Sent I(OUT) < ITERM for 30s or Charge done TJ > 150°C TS < VHOT, TS > VCOLD V(RECTO)>15V SCP Not Sent Not Sent Not Sent .C No Response Value 0x00 0x01 0x02 0x03 0x04 33 0x06 0x07 0x08 on fi Message Unknown Charge Complete Internal OT Over Temperature Over Voltage Over Current Battery Failure Reconfigure orp Oscillator Sil erg yC An internal Ring oscillator generates the frequencies at which the MCU and other analog blocks operate. It is also used to control the modulation data rate. NE6053 Rev.1.0 © 2019 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 11 All Rights Reserved. NE6053 Sil erg yC orp .C on fi de nti a lP rep are dF or In ter na l Detailed System Diagram( Have NOT wired power path) NE6053 Rev.1.0 © 2019 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 12 All Rights Reserved. NE6053 Detailed System Diagram( Have wired power path) Sil erg yC orp .C on fi de nti a lP rep are dF or In ter na l QFN NE6053 Rev.1.0 © 2019 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 13 All Rights Reserved. NE6053 on fi de nti a lP rep are dF or In ter na l CSP Sil erg yC orp .C Marking NE6053 Rev.1.0 © 2019 Silergy Corp. Powered by TCPDF (www.tcpdf.org) Silergy Corp. Confidential- Prepared for Customer Use Only 14 All Rights Reserved.