SN74HC259N

XBLW SN74HC/HCT259 8-bit addressable latch General Description The SN74HC/HCT259 is an 8-bit addressable latch. The device features four modes of operation. In the addressable latch mode, data on the D input is written into the latch addressed by the inputs A0 to A3. The addressed latch will follow the data input, non-addressed latches will retain their previous states. In memory mode, all latches retain their previous states and are unaffected by the data or address inputs. In the 3-to-8 decoding or demultiplexing mode, the addressed output follows the D input and all other outputs are LOW. In the reset mode, all outputs are forced LOW and unaffected by the data or address inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC . Features Input levels: For SN74HC259: CMOS level For SN74HCT259: TTL level Combined demultiplexer and 8-bit latch Serial-to-parallel capability Output from each storage bit available Random (addressable) data entry Easily expandable Common reset input Useful as a 3-to-8 active HIGH decoder Specified from -40C to +125C Packaging information: DIP16/SOP16/TSSOP16 Ordering Information DEVICE SN74HC259N SN74HC259DTR SN74HCT259DTR SN74HCT259TDTR XBLWversion1.0 Package Type DIP-16 SOP-16 SOP-16 TSSOP-16 MARKING Packing Packing QTY 74HC259N 74HC259 74HCT259 74HCT259 Tube Tape Tape Tape 1000/Box 2500/Reel 2500/Reel 3000/Reel 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 1 页 共 18 页 XBLW SN74HC/HCT259 8-bit addressable latch 2 、Block Diagram And Pin Description 2.1 Block Diagram Figure 1. Logic symbol Figure 2. Functional diagram Figure 3. Functional diagram XBLWversion1.0 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 2 页 共 18 页 XBLW SN74HC/HCT259 8-bit addressable latch 2.2 Pin Configurations 2.3 Pin Description Description address input address input address input latch output latch output latch output latch output ground (0V) latch output latch output latch output latch output data input Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 Pin Name A0 A1 A2 14 LE — latch enable input (active LOW) 15 MR — conditional reset input (active LOW) 16 VCC supply voltage Q0 Q1 Q2 Q3 GND Q4 Q5 Q6 Q7 D 2.4 Function Table Input Operating mode Reset (clear) Demultiplexer (active HIGH 8-channel) decoder (when D=H) Memory XBLWversion1.0 Output — — D A0 A1 A2 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 L L L L L L L L L H H L L L L L L L L H X X L H L H L H L H X X L L H H L L H H X X L L L L H H H H X L L L L L L L L L L Q=d L L L L q3 L L L L L L L L L L L L L L L L L L L L L L L L L L MR LE d d d d d d d d X Q=d L L L L L L L q0 Q=d L L L L L L q1 Q=d L L L L L q2 Q=d L L L q4 Q=d L L q5 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 Q=d L q6 Q=d q7 第 3 页 共 18 页 XBLW SN74HC/HCT259 8-bit addressable latch (no action) Note: [1] H= HIG H volt age Addressable leve latch l; L=L OW volt age leve l; X=don’t care. H H H H H H H H L L L L L L L L d d d d d d d d L H L H L H L H L L H H L L H H L L L L H H H H Q=d q1 q0 q0 q0 q0 q0 q0 q0 Q=d q1 q1 q1 q1 q1 q1 q2 q2 Q=d q3 q3 q3 Q=d q2 q2 q2 q2 q2 q4 q4 q4 q4 Q=d q3 q3 q3 q3 q4 q4 q4 q5 q5 q5 q5 q5 Q=d q6 q6 q6 q6 q6 q6 Q=d q5 q5 q6 q7 q7 q7 q7 q7 q7 q7 Q=d — [2] d=HIGH or LOW data one set-up time prior to the LOW-to-HIGH LE transition. [3] q=lower case letter indicates the state of the referenced input one set-up time prior to the LOW -to-HIGH transition. 2.5 Operating Mode Select Table — — LE Mode MR L H L H H Addressable latch mode H Memory mode L Demultiplexer mode L Reset mode Note: H=HIGH voltage level; L=LOW voltage level. 3 、Electrical Parameter (Voltages are referenced to GND (ground=0V), unless otherwise specified.) Symbol Parameter Conditions supply voltage VCC input clamping IIK VI < -0.5V or VI > VCC+0.5V current output clamping IOK VO < -0.5V or VO > VCC+0.5V current output current IO VO= -0.5V to (VCC+0.5V) supply current ICC ground current IGND storage Tstg temperature total power Ptot dissipation DIP Soldering 10s TL temperature SOP/TSSOP 3.2 Recommended Operating Conditions Parameter Symbol supply voltage input voltage output voltage Conditions SN74H259 VCC VI VO VCC=2.0V VCC=4.5V VCC=6.0V input transition rise and fall rate XBLWversion1.0 Δt/ΔV Min. -0.5 Max. +7.0 Unit V - ±20 mA - ±20 mA -70 ±25 +70 - mA mA mA -65 +150 C - 500 mW 245 260 Min. Typ. Max. Unit 2.0 0 0 5.0 6.0 VCC VCC 625 139 83 V V V - 1.67 - 文档仅供参考，实际应用测试为准 www.xinboleic.com C C 技术支持热线：4009682003 ns/V ns/V ns/V 第 4 页 共 18 页 XBLW SN74HC/HCT259 8-bit addressable latch ambient temperature supply voltage input voltage output voltage - +125 C VCC=2.0V VCC=4.5V VCC=6.0V 4.5 0 0 5.0 5.5 VCC VCC V V V 139 - -40 SN74HCT259 VCC VI VO input transition rise and fall rate Δt/ΔV ambient temperature Tamb 3.3 -40 Tamb - 1.67 - - ns/V ns/V ns/V - +125 C Max. Unit 0.5 1.35 1.8 0.1 0.1 0.1 0.26 0.26 V V V V V V V V V V V V V V V V ±1.0 uA 8.0 uA pF Electrical Characteristics 3.3.1 DC Characteristics 1 ( Tamb=2 5 C, voltages are referenced to GND ( ground=0 V), unless otherwise specified.) Symbol Parameter Conditions Min. Typ. SN74HC259 1.5 1.2 VCC=2.0V HIGH-level 3.15 2.4 VIH VCC=4.5V input voltage 4.2 3.2 VCC=6.0V 0.8 VCC=2.0V LOW-level 2.1 VIL VCC=4.5V input voltage 2.8 VCC=6.0V 1.9 2.0 IO=-20uA; VCC=2.0V 4.4 4.5 IO=-20uA; VCC=4.5V HIGH-level 5.9 6.0 V OH VI = VIH or VIL IO=-20uA; VCC=6.0V output voltage 3.98 4.32 IO=-4.0mA; VCC=4.5V 5.48 5.81 IO=-5.2mA; VCC=6.0V 0 IO=20uA; VCC=2.0V 0 IO=20uA; VCC=4.5V LOW-level 0 VOL IO=20uA; VCC=6.0V VI = VIH or VIL output voltage 0.15 IO=4.0mA; VCC=4.5V 0.16 IO=5.2mA; VCC=6.0V input leakage VI=VCC or GND; VCC=6.0V II current supply current ICC VI=VCC or GND; IO=0A; VCC=6.0V input 3.5 CI - - capacitance HIGH-level input voltage LOW-level input voltage SN74HCT259 VIH VCC=4.5V to 5.5V 2.0 1.6 - V VIL VCC=4.5V to 5.5V - 1.2 0.8 V 4.4 3.98 - 4.5 4.32 0 0.15 0.1 0.26 V V V V HIGH-level output voltage VOH VI = VIH or VIL ; VCC=4.5V LOW-level output voltage input leakage current supply current VOL VI = VIH or VIL additional XBLWversion1.0 IO=-20uA IO=-4.0mA IO=20uA; VCC=4.5V IO=5.2mA; VCC=6.0V II VI=VCC or GND; VCC=5.5V - - ±1.0 uA ICC VI=VCC or GND; IO=0A; VCC=5.5V — VI=VCC-2.1V; pin An, LE - 150 8.0 540 uA uA - 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 5 页 共 18 页 XBLW SN74HC/HCT259 8-bit addressable latch supply current ΔICC input capacitance other inputs at VCC or GND; IO=0A; VCC=4.5V to 5.5V CI pin D — pin MR - - 120 432 uA - 75 270 uA - 3.5 - pF 3.3.2 DC Characteristics 2 (Tamb=-40C to +85C, voltages are referenced to GND (ground=0V), unless otherwise specified.) Parameter Symbol Conditions Min. Typ. VCC=2.0V VCC=4.5V VCC=6.0V VCC=2.0V VCC=4.5V 1.5 3.15 4.2 - VCC=6.0V IO=-20uA; VCC=2.0V IO=-20uA; VCC=4.5V VI = VIH or VIL IO=-20uA; VCC=6.0V IO=-4.0mA; VCC=4.5V IO=-5.2mA; VCC=6.0V IO=20uA; VCC=2.0V IO=20uA; VCC=4.5V IO=20uA; VCC=6.0V VI = VIH or VIL IO=4.0mA; VCC=4.5V 1.9 4.4 5.9 3.84 5.34 SN74HC259 HIGH-level input voltage VIH LOW-level input voltage VIL HIGH-level output voltage LOW-level output voltage VOH VOL - IO=5.2mA; VCC=6.0V input leakage current - - - - II VI=VCC or GND; VCC=6.0V - - supply current ICC VI=VCC or GND; IO=0A; VCC=6.0V - input capacitance CI - HIGH-level input voltage LOW-level input voltage V V V V V V V V V V V - - - p F VCC=4.5V to 5.5V 2.0 - - V VCC=4.5V to 5.5V - - 0.8 V 4.4 3.84 - - 0.1 0.33 V V V V u A u A u A u A u A SN74HCT259 VIH VIL LOW-level output voltage VOL VI = VIH or VIL IO=-20uA IO=-4.0mA IO=20uA; VCC=4.5V IO=5.2mA; VCC=6.0V II VI=VCC or GND; VCC=5.5V - - ±1.0 ICC VI=VCC or GND; IO=0A; VCC=5.5V - - 80 pin An, LE - - 675 pin D - - 540 - - 338 ΔICC VI=VCC-2.1V; other inputs at VCC or GND; IO=0A; VCC=4.5V to 5.5V — — pin MR XBLWversion1.0 0.1 0.1 0.1 0.3 3 0.3 3 V V V V V - VI = VIH or VIL ; VCC=4.5V additional supply current 0.5 1.3 5 1.8 u A u A V OH supply current Un it ±1. 0 80 HIGH-level output voltage input leakage current Ma x. 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 6 页 共 18 页 XBLW SN74HC/HCT259 8-bit addressable latch Symbol Parameter input capacitance Conditions SN74HC259 VCC=2.0V VCC=4.5V D to Qn; VCC=5.0V; CL=15pF see Figure 5 CI Min. Typ. Max. Unit - 58 21 18 185 37 ns ns ns - - - - p F 3.3.3 DC Characteristics 3 (Tamb=-40C to +125C, voltages are referenced to GND (ground=0V), unless otherwise specified.) Symbol Parameter Conditions Min. Typ. Max. Unit VCC=2.0V VCC=4.5V VCC=6.0V VCC=2.0V VCC=4.5V VCC=6.0V IO=-20uA; VCC=2.0V IO=-20uA; VCC=4.5V VI = VIH or VIL IO=-20uA; VCC=6.0V IO=-4.0mA; VCC=4.5V IO=-5.2mA; VCC=6.0V IO=20uA; VCC=2.0V IO=20uA; VCC=4.5V IO=20uA; VCC=6.0V VI = VIH or VIL IO=4.0mA; VCC=4.5V IO=5.2mA; VCC=6.0V 1.5 3.15 4.2 0.5 1.35 1.8 - - 0.1 0.1 0.1 0.4 0.4 V V V V V V V V V V V V V V V V II VI=VCC or GND; VCC=6.0V - - ±1.0 uA ICC VI=VCC or GND; IO=0A; VCC=6.0V - - 160 uA CI - - - - pF VIH VCC=4.5V to 5.5V 2.0 - - V VIL VCC=4.5V to 5.5V - - 0.8 V SN74HC259 HIGH-level input voltage VIH LOW-level input voltage VIL HIGH-level output voltage LOW-level output voltage input leakage current supply current input capacitance HIGH-level input voltage LOW-level input voltage V OH VOL 1.9 4.4 5.9 3.7 5.2 SN74HCT259 HIGH-level output voltage V OH VI = VIH or VIL ; VCC=4.5V IO=-20uA IO=-4.0mA 4.4 3.7 - - V V LOW-level output voltage VOL VI = VIH or VIL IO=20uA; VCC=4.5V IO=5.2mA; VCC=6.0V - - 0.1 0.4 V V - - ±1.0 uA - - - - 160 735 588 uA uA uA - - 368 uA - - - pF input leakage current supply current additional supply current input capacitance II ICC ΔICC VI=VCC or GND; VCC=5.5V VI=VCC or GND; IO=0A; VCC=5.5V — VI=VCC-2.1V; pin An, LE other inputs at VCC pin D or GND; IO=0A; — pin MR VCC=4.5V to 5.5V CI - 3.3.4 AC Characteristics 1 (Tamb=25C, voltages are referenced to GND (ground=0V), unless otherwise specified.) XBLWversion1.0 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 7 页 共 18 页 XBLW SN74HC/HCT259 8-bit addressable latch propagation delay tpd VCC=6.0V VCC=2.0V VCC=4.5V VCC=5.0V; CL=15pF VCC=6.0V VCC=2.0V VCC=4.5V VCC=5.0V; CL=15pF VCC=6.0V VCC=2.0V VCC=4.5V VCC=5.0V; CL=15pF An to Qn; see Figure 6 — LE to Qn; see Figure 7 HIGH to LOW propagation delay PHL transition time tt — MR to Qn; see Figure 8 VCC=6.0V VCC=2.0V VCC=4.5V VCC=6.0V VCC=2.0V VCC=4.5V VCC=6.0V VCC=2.0V VCC=4.5V VCC=6.0V VCC=2.0V VCC=4.5V VCC=6.0V VCC=2.0V VCC=4.5V see Figure 7 — pulse width W LE HIGH or LOW; see Figure 7 — MR LOW; see Figure 8 — set-up time tsu D, An to LE; see Figure 9 and Figure 10 th D to LE; see Figure 9 — hold time and Figure 10 31 185 37 31 170 34 29 155 31 26 75 15 13 - -5 - 11 -4 -3 - ns ns ns ns - 19 - pF VCC=4.5V VCC=5.0V; CL=15pF VCC=4.5V VCC=5.0V; CL=15pF VCC=4.5V VCC=5.0V; CL=15pF - 23 20 25 20 22 20 39 ns ns ns ns ns ns VCC=4.5V - 23 VCC=5.0V; CL=15pF - 20 fi=1MHz; VI=GND to VCC SN74HCT259 D to Qn; see Figure 5 propagation delay tpd An to Qn; see Figure 6 — LE to Qn; see Figure 7 HIGH to LOW propagation delay transition time — tPHL MR to Qn; see Figure 8 VCC=4.5V; see Figure 7 tt — pulse width tW LE HIGH or LOW; VCC=4.5V; see Figure 7 — MR LOW; VCC=4.5V; see Figure 8 set-up time XBLWversion1.0 — D, An to LE; VCC=4.5V; see Figure 9 and Figure 10 tsu 文档仅供参考，实际应用测试为准 www.xinboleic.com ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 0 2 2 2 An to LE; see Figure 9 and Figure 10 CPD 17 58 21 17 17 55 20 17 16 50 18 15 14 19 7 6 17 6 5 17 6 5 19 7 6 - 19 -6 VCC=6.0V VCC=2.0V VCC=4.5V VCC=6.0V — power dissipation capacitance 70 14 12 70 14 12 80 16 14 0 0 技术支持热线：4009682003 41 38 39 ns - 15 ns 7 19 11 - ns 18 10 - ns 17 10 - ns 第 8 页 共 18 页 ns XBLW SN74HC/HCT259 8-bit addressable latch — hold time D to LE; VCC=4.5V; see Figure 9 and Figure 10 0 -8 - ns An to LE; VCC=4.5V; see Figure 9 and Figure 10 0 -4 - ns fi=1MHz; VI=GND to VCC- 1.5V - 19 - pF th power dissipation capacitance — CPD Note: [1] Typical values are measured at nominal supply voltage (VCC=3.3V and VCC=5.0V). [2] tpd is the same as tPLH and tPHL. [3] tt is the same as tTHL and tTLH . [4] CPD is used to determine the dynamic power dissipation (PD in uW). PD=CPD ×VCC2 ×fi ×N+∑(CL ×VCC2 ×fo) where: fi=input frequency in MHz; fo=output frequency in MHz; CL=output load capacitance in pF; VCC=supply voltage in V; N=number of inputs switching; ∑(CL ×VCC2 ×fo)=sum ofoutputs. 3.3.5 AC Characteristics 2 (Tamb=-40C to +85C, voltages are referenced to GND (ground=0V), unless otherwise specified.) Parameter Symbol D to Qn; see Figure 5 propagation delay tpd An to Qn; see Figure 6 — LE to Qn; see Figure 7 HIGH to LOW propagation delay tPHL MR to Qn; see Figure 8 transition time tt see Figure 7 — — pulse width tW LE HIGH or LOW; see Figure 7 — MR LOW; see Figure 8 XBLWversion1.0 Conditions SN74HC259 VCC=2.0V VCC=4.5V VCC=5.0V; CL=15pF VCC=6.0V VCC=2.0V VCC=4.5V VCC=5.0V; CL=15pF VCC=6.0V VCC=2.0V VCC=4.5V VCC=5.0V; CL=15pF VCC=6.0V VCC=2.0V VCC=4.5V VCC=5.0V; CL=15pF VCC=6.0V VCC=2.0V VCC=4.5V VCC=6.0V VCC=2.0V VCC=4.5V VCC=6.0V VCC=2.0V VCC=4.5V VCC=6.0V Min. Typ. Max. Unit 90 18 15 90 18 15 - 230 46 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 39 230 46 39 215 43 37 195 39 33 95 19 16 - 第 9 页 共 18 页 XBLW SN74HC/HCT259 8-bit addressable latch 100 20 17 0 0 0 2 2 2 - - ns ns ns ns ns ns ns ns ns fi=1MHz; VI=GND to VCC - - - pF SN74HCT259 VCC=4.5V D to Qn; VCC=5.0V; CL=15pF see Figure 5 An to Qn; VCC=4.5V - - 49 ns ns ns VCC=5.0V; CL=15pF VCC=4.5V VCC=5.0V; CL=15pF - - 48 VCC=4.5V - - VCC=5.0V; CL=15pF - - - VCC=2.0V VCC=4.5V VCC=6.0V VCC=2.0V VCC=4.5V VCC=6.0V VCC=2.0V VCC=4.5V VCC=6.0V — set-up time tsu D, An to LE; see Figure 9 and Figure 10 — hold time th power dissipation capacitance CPD propagation delay tpd D to LE; see Figure 9 and Figure 10 — An to LE; see Figure 9 and Figure 10 see Figure 6 — LE to Qn; see Figure 7 HIGH to LOW propagation delay transition time — tPHL MR to Qn; see Figure 8 tW - 24 - - ns 23 - - ns 21 - - ns 0 - - ns An to LE; VCC=4.5V; see Figure 9 and Figure 10 0 - - ns fi=1MHz; VI=GND to VCC- 1.5V - - - pF LE HIGH or LOW; VCC=4.5V; see Figure 7 — — tsu D, An to LE; VCC=4.5V; see Figure 9 and Figure 10 — th hold time power dissipation capacitance CPD ns ns MR LOW; VCC=4.5V; see Figure 8 set-up time 49 ns ns ns 19 VCC=4.5V; see Figure 7 tt — pulse width 51 D to LE; VCC=4.5V; see Figure 9 and Figure 10 — ns Note: [1] Typical values are measured at nominal supply voltage (VCC=3.3V and VCC=5.0V). [2] tpd is the same as tPLH and tPHL. [3] tt is the same as tTHL and tTLH . [4] CPD is used to determine the dynamic power dissipation (PD in uW). PD=CPD ×VCC2 ×fi ×N+∑(CL ×VCC2 ×fo) where: fi=input frequency in MHz; fo=output frequency in MHz; CL=output load capacitance in pF; VCC=supply voltage in V; N=number of inputs switching; ∑(CL ×VCC2 ×fo)=sum ofoutputs. XBLWversion1.0 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 10 页 共 18 页 XBLW SN74HC/HCT259 8-bit addressable latch 3.3.6 AC Characteristics 3 (Tamb=-40C to +125C, voltages are referenced to GND (ground=0V), unless otherwise specified.) Parameter propagation delay Symbol tpd HIGH to LOW propagation delay tPHL transition time tt pulse width tW set-up time tsu hold time th power dissipation capacitance CPD propagation delay XBLWversion1.0 tpd Conditions SN74HC259 VCC=2.0V VCC=4.5V D to Qn; VCC=5.0V; CL=15pF see Figure 5 VCC=6.0V VCC=2.0V VCC=4.5V An to Qn; V =5.0V; CL=15pF see Figure 6 CC VCC=6.0V VCC=2.0V — VCC=4.5V LE to Qn; V =5.0V; CL=15pF CC see Figure 7 VCC=6.0V VCC=2.0V — VCC=4.5V MR to Qn; VCC=5.0V; CL=15pF see Figure 8 VCC=6.0V VCC=2.0V see Figure 7 VCC=4.5V VCC=6.0V — VCC=2.0V LE HIGH or VCC=4.5V LOW; see Figure 7 VCC=6.0V VCC=2.0V — MR LOW; VCC=4.5V see Figure 8 VCC=6.0V — VCC=2.0V D, An to LE; VCC=4.5V see Figure 9 and Figure 10 VCC=6.0V — VCC=2.0V D to LE; VCC=4.5V see Figure 9 and Figure 10 VCC=6.0V — VCC=2.0V An to LE; VCC=4.5V see Figure 9 and Figure 10 VCC=6.0V Min. Typ. Max. Unit 105 21 18 105 21 18 120 24 20 0 0 0 2 2 2 - 280 56 - ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns fi=1MHz; VI=GND to VCC - - - pF SN74HCT259 VCC=4.5V D to Qn; VCC=5.0V; CL=15pF see Figure 5 An to Qn; VCC=4.5V - - 59 ns ns ns 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 48 280 56 48 255 51 43 235 47 40 119 22 19 62 第 11 页 共 18 页 XBLW SN74HC/HCT259 8-bit addressable latch see Figure 6 — LE to Qn; see Figure 7 HIGH to LOW propagation delay transition time VCC=5.0V; CL=15pF VCC=4.5V VCC=5.0V; CL=15pF - - VCC=4.5V - - VCC=5.0V; CL=15pF - - - — tPHL MR to Qn; see Figure 8 - 29 - - ns 27 - - ns 26 - - ns 0 - - ns An to LE; VCC=4.5V; see Figure 9 and Figure 10 0 - - ns fi=1MHz; VI=GND to VCC- 1.5V - - - pF VCC=4.5V; see Figure 7 LE HIGH or LOW; VCC=4.5V; see Figure 7 — MR LOW; VCC=4.5V; see Figure 8 — set-up time D, An to LE; VCC=4.5V; see Figure 9 and Figure 10 tsu — D to LE; VCC=4.5V; see Figure 9 and Figure 10 th hold time power dissipation capacitance CPD — Note: [1] Typical values are measured at nominal supply voltage (VCC=3.3V and VCC=5.0V). [2] tpd is the same as tPLH and tPHL. [3] tt is the same as tTHL and tTLH . [4] CPD is used to determine the dynamic power dissipation (PD in uW). PD=CPD ×VCC2 ×fi ×N+∑(CL ×VCC2 ×fo) where: fi=input frequency in MHz; fo=output frequency in MHz; CL=output load capacitance in pF; VCC=supply voltage in V; N=number of inputs switching; ∑(CL ×VCC2 ×fo)=sum ofoutputs. 4 、Testing Circuit 4.1 AC Testing Circuit Figure 4. Test circuit for measuring switching times XBLWversion1.0 ns ns — tW 59 ns ns ns 22 tt pulse width 57 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 12 页 共 18 页 ns XBLW SN74HC/HCT259 8-bit addressable latch Definitions for test circuit: CL=Load capacitance including jig and probe capacitance. RT=Termination resistance should be equal to the output impedance Zo of the pulse generator. RL=Load resistance. S1=Test selection switch. 4.2 AC Testing Waveforms Figure 5. Data input to output propagation delays Figure 6. Address input to output propagation delays Figure 7. Enable input to output propagation delays and pulse width XBLWversion1.0 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 13 页 共 18 页 XBLW SN74HC/HCT259 8-bit addressable latch Figure 8. Master reset input to output propagation delay Figure 9. Data input to latch enable input set-up and hold times Figure 10. Address input to latch enable input set-up and hold times XBLWversion1.0 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 14 页 共 18 页 XBLW SN74HC/HCT259 8-bit addressable latch 4.3 Measurement Points Input Type Output VM 0.5×VCC 1.3V SN74HC259 SN74HCT259 VM 0.5×VCC 1.3V VX 0.1×VCC 0.1×VCC VY 0.9×VCC 0.9×VCC 4.4 Test Data Input Type VI VCC 3V SN74HC259 SN74HCT259 S1 position Load tr , tf 6ns 6ns CL 15pF, 50pF 15pF, 50pF RL 1kΩ 1kΩ tPHL, tPLH open open 5 、Package Information 5.1 DIP16 XBLWversion1.0 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 15 页 共 18 页 XBLW SN74HC/HCT259 8-bit addressable latch 5.2、SOP16 XBLWversion1.0 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 16 页 共 18 页 XBLW SN74HC/HCT259 8-bit addressable latch 5.3,TSSOP16 Symbol A A1 A2 b c D E1 E e L 9 XBLWversion1.0 Dimensions (mm) Min. Max. 1.20 0.15 1.05 0.30 0.20 5.10 4.50 6.60 0.05 0.80 0.19 0.09 4.90 4.30 6.20 0.65 0.45 0。 0.75 8。 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 17 页 共 18 页 XBLW SN74HC/HCT259 8-bit addressable latch Statement：  Shenzhen xinbole electronics co., ltd. reserves the right to change the product specifications, without notice! Before placing an order, the customer needs to confirm whether the information obtained is the latest version, and verify the integrity of the relevant information.  Any semiconductor product is liable to fail or malfunction under certain conditions, and the buyer shall be responsible for complying with safety standards in the system design and whole machine manufacturing using Shenzhen xinbole electronics co., ltd products, and take appropriate security measures to avoid the potential risk of failure may result in personal injury or property losses of the situation occurred!  Product performance is never ending, Shenzhen xinbole electronics co., ltd will be dedicated to provide customers with better performance, better quality of integrated circuit products. XBLWversion1.0 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 18 页 共 18 页