I2C-Compatible, Wide Bandwidth,
Triple 3:1 Multiplexer
ADG793A/ADG793G
FEATURES
FUNCTIONAL BLOCK DIAGRAMS
VDD
VDD
GND
ADG793A
ADG793G
S1A
S1A
S1B
D1
S1B
S1C
S2A
S2B
D2
S2B
S2C
D2
S2C
S3A
S3A
S3B
D3
S3B
S3C
D3
S3C
I2C SERIAL
INTERFACE
A0
RGB/YPbPr video switches
HDTV
Projection TV
DVD-R/RW
AV receivers
D1
S1C
S2A
APPLICATIONS
GND
A1
I2C SERIAL
INTERFACE
GPO1
A2 SDA SCL
A0
A1
GPO2
A2 SDA SCL
06030-001
Bandwidth: 195 MHz
Low insertion loss and on resistance: 2.6 Ω typical
On-resistance flatness 0.3 Ω typical
3.3 V analog signal range (5 V supply, 75 Ω load)
Single 3 V/5 V supply operation
Low quiescent supply current: 1 nA typical
Fast switching times: tON = 185 ns, tOFF = 181 ns
I2C®-compatible interface
Compact, 24-lead LFCSP
Two I2C-controllable logic outputs
ESD protection
4 kV human body model (HBM)
200 V machine model (MM)
1 kV field-induced charged device model (FICDM)
Figure 1.
GENERAL DESCRIPTION
The ADG793A/ADG793G are monolithic CMOS devices
comprising three 3:1 multiplexers/demultiplexers controllable
via a standard I2C serial interface. The CMOS process provides
ultralow power dissipation, yet gives high switching speed and
low on resistance.
The on-resistance profile is very flat over the full analog input
range, and the wide bandwidth ensures excellent linearity and
low distortion. These features, combined with a wide input
signal range, make the ADG793A/ADG793G the ideal
switching solution for a wide range of TV applications,
including RGB and YPbPr video switches.
The switches conduct equally well in both directions when on.
In the off condition, signal levels up to the supplies are blocked.
The ADG793A/ADG793G switches exhibit break-before-make
switching action. The ADG793G has two general-purpose logic
output pins controllable through the I2C interface, which can be
used to control other non-I2C-compatible devices such as video
filters. The integrated I2C interface provides a large degree of
flexibility in the system design. It has three configurable I2C
address pins that allow the user to connect up to eight devices
to the same bus to build larger switching arrays.
The ADG793A/ADG793G operate from a single 3 V or 5 V
supply voltage and are available in a compact, 4 mm × 4 mm
body, 24-lead, lead-free chip scale package (LFCSP).
PRODUCT HIGHLIGHTS
1.
Wide bandwidth: 195 MHz.
2.
Ultralow power dissipation.
3.
Extended input signal range.
4.
Integrated I2C serial interface.
5.
Compact, 4 mm × 4 mm body, 24-lead, lead-free chip scale
package (LFCSP).
6.
ESD protection tested as per ESD Association standards:
4 kV HBM (ANSI/ESD STM5.1-2001)
200 V MM (ANSI/ESD STM5.2-1999)
1 kV FICDM (ANSI/ESDSTM5.3.1-1999)
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
ADG793A/ADG793G
TABLE OF CONTENTS
Features .............................................................................................. 1
Test Circuits..................................................................................... 14
Applications....................................................................................... 1
Terminology .................................................................................... 16
Functional Block Diagrams............................................................. 1
Theory of Operation ...................................................................... 17
General Description ......................................................................... 1
I2C Serial Interface ..................................................................... 17
Product Highlights ........................................................................... 1
I2C Address.................................................................................. 17
Revision History ............................................................................... 2
Write Operation.......................................................................... 17
Specifications..................................................................................... 3
LDSW Bit..................................................................................... 19
I2C Timing Specifications ................................................................ 7
Power On/Software Reset.......................................................... 19
Timing Diagram ........................................................................... 8
Read Operation........................................................................... 19
Absolute Maximum Ratings............................................................ 9
Evaluation Board ............................................................................ 20
ESD Caution.................................................................................. 9
Using the ADG793G Evaluation Board .................................. 20
Pin Configuration and Function Descriptions........................... 10
Outline Dimensions ....................................................................... 23
Typical Performance Characteristics ........................................... 11
Ordering Guide .......................................................................... 23
REVISION HISTORY
7/06—Revision 0: Initial Version
Rev. 0 | Page 2 of 24
ADG793A/ADG793G
SPECIFICATIONS
VDD = 5 V ± 10%, GND = 0 V, TA = −40°C to +85°C, unless otherwise noted.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range 2
On Resistance, RON
On-Resistance Matching Between
Channels, ∆RON
On-Resistance Flatness, RFLAT(ON)
LEAKAGE CURRENTS
Source Off Leakage, IS(OFF)
Drain Off Leakage, ID(OFF)
Channel On Leakage, ID(ON), IS(ON)
DYNAMIC CHARACTERISTICS 3
tON, tENABLE
tOFF, tDISABLE
Break-Before-Make Time Delay, tD
I2C-to-GPO Propagation Delay, tH, tL
Off Isolation
Channel-to-Channel Crosstalk
Same Multiplexer
Different Multiplexer
−3 dB Bandwidth
THD + N
Charge Injection
CS(OFF)
CD(OFF)
CD(ON), CS(ON)
Power Supply Rejection Ratio, PSSR
Differential Gain Error
Differential Phase Error
LOGIC INPUTS3
A0, A1, A2
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
Input Capacitance, CIN
SCL, SDA
Input High Voltage, VINH
Input Low Voltage, VINL
Input Leakage Current, IIN
Input Hysteresis
Input Capacitance, CIN
Typ 1
Max
Unit
2.6
0.15
4
3.3
3.5
4
0.5
V
V
Ω
Ω
Ω
VD = 1 V, IS = −10 mA
VD = 0 V to 1 V, IS = −10 mA
0.3
0.6
0.55
Ω
Ω
VD = 4 V/1 V, VS = 1 V/4 V, see Figure 23
VD = 4 V/1 V, VS = 1 V/4 V, see Figure 23
VD = VS = 4 V/1 V, see Figure 24
±0.25
±0.25
±0.25
CL = 35 pF, RL = 50 Ω, VS = 2 V, see Figure 28
CL = 35 pF, RL = 50 Ω, VS = 2 V, see Figure 28
CL = 35 pF, RL = 50 Ω, VS1 = VS2 = 2 V,
see Figure 29
ADG793G only
f = 10 MHz, RL = 50 Ω, see Figure 26
f = 10 MHz, RL = 50 Ω, see Figure 27
185
181
3
Conditions
Min
VS = VDD, RL = 1 MΩ
VS = VDD, RL = 75 Ω
VD = 0 V, IS = −10 mA, see Figure 22
VD = 0 V to 1 V, IS = −10 mA, see Figure 22
VD = 0 V, IS = −10 mA
0
0
1
RL = 50 Ω, see Figure 25
RL = 100 Ω
CL = 1 nF, VS = 0 V, see Figure 30
f = 20 kHz
CCIR330 test signal
CCIR330 test signal
nA
nA
nA
240
235
ns
ns
ns
130
−60
ns
dB
−55
−75
195
0.14
5
10
26
37
70
0.59
0.83
dB
dB
MHz
%
pC
pF
pF
pF
dB
%
Degrees
2.0
VIN = 0 V to VDD
0.005
3
0.7 × VDD
−0.3
VIN = 0 V to VDD
0.005
0.05 × VDD
3
Rev. 0 | Page 3 of 24
0.8
±1
VDD + 0.3
+0.3 × VDD
±1
V
V
μA
pF
V
V
μA
V
pF
ADG793A/ADG793G
Parameter
LOGIC OUTPUTS3
SDA Pin
Output Low Voltage, VOL
Floating-State Leakage Current
Floating-State Output Capacitance
GPO1 Pin and GPO2 Pin
Output Low Voltage, VOL
Output High Voltage, VOH
POWER REQUIREMENTS
IDD
Conditions
Min
Typ 1
ISINK = 3 mA
ISINK = 6 mA
ILOAD = +2 mA
ILOAD = −2 mA
Max
Unit
0.4
0.6
±1
10
V
V
μA
pF
0.4
V
V
1
μA
0.2
0.7
mA
mA
2.0
Digital inputs = 0 V or VDD, I2C interface
inactive
I2C interface active, fSCL = 400 kHz
I2C interface active, fSCL = 3.4 MHz
1
All typical values are at TA = 25°C, unless otherwise stated.
Guaranteed by initial characterization, not subject to production test.
Guaranteed by design, not subject to production test.
2
3
Rev. 0 | Page 4 of 24
0.001
ADG793A/ADG793G
VDD = 3 V ± 10%, GND = 0 V, TA = −40°C to +85°C, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range 2
On Resistance, RON
On-Resistance Matching Between
Channels, ∆RON
On-Resistance Flatness, RFLAT(ON)
LEAKAGE CURRENTS
Source Off Leakage, IS(OFF)
Drain Off Leakage, ID(OFF)
Channel On Leakage, ID(ON), IS(ON)
DYNAMIC CHARACTERISTICS 3
tON, tENABLE
tOFF, tDISABLE
Break-Before-Make Time Delay, tD
I2C-to-GPO Propagation Delay, tH, tL
Off Isolation
Channel-to-Channel Crosstalk
Same Multiplexer
Different Multiplexer
−3 dB Bandwidth
THD + N
Charge Injection
CS(OFF)
CD(OFF)
CD(ON), CS(ON)
Power Supply Rejection Ratio, PSRR
Differential Gain Error
Differential Phase Error
LOGIC INPUTS3
A0, A1, A2
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
Input Capacitance, CIN
SCL, SDA
Input High Voltage, VINH
Input Low Voltage, VINL
Input Leakage Current, IIN
Input Hysteresis
Input Capacitance, CIN
Typ 1
Max
Unit
3
0.15
2.2
1.7
4
6
0.6
V
V
Ω
Ω
Ω
VD = 1 V, IS = −10 mA
VD = 0 V to 1 V, IS = −10 mA
0.3
1.1
2.8
Ω
Ω
VD = 3 V/1 V, VS = 1 V/3 V, see Figure 23
VD = 3 V/1 V, VS = 1 V/3 V, see Figure 23
VD = VS = 3 V/1 V, see Figure 24
±0.25
±0.25
±0.25
CL = 35 pF, RL = 50 Ω, VS = 2 V, see Figure 28
CL = 35 pF, RL = 50 Ω, VS = 2 V, see Figure 28
CL = 35 pF, RL = 50 Ω, VS1 = VS2 = 2 V,
see Figure 29
ADG793G only
f = 10 MHz, RL = 50 Ω, see Figure 26
f = 10 MHz, RL = 50 Ω, see Figure 27
200
197
3
Conditions
Min
VS = VDD, RL = 1 MΩ
VS = VDD, RL = 75 Ω
VD = 0 V, IS = −10 mA, see Figure 22
VD = 0 V to 1 V, IS = −10 mA, see Figure 22
VD = 0 V, IS = −10 mA
0
0
1
RL = 50 Ω, see Figure 25
RL = 100 Ω
CL = 1 nF, VS = 0 V, see Figure 30
f = 20 kHz
CCIR330 test signal
CCIR330 test signal
nA
nA
nA
260
255
ns
ns
ns
121
−60
ns
dB
−55
−75
190
0.14
3.5
10
26
37
70
0.51
0.62
dB
dB
MHz
%
pC
pF
pF
pF
dB
%
Degrees
2.0
VIN = 0 V to VDD
0.005
3
0.7 × VDD
−0.3
VIN = 0 V to VDD
0.005
0.05 × VDD
3
Rev. 0 | Page 5 of 24
0.8
±1
VDD + 0.3
+0.3 × VDD
±1
V
V
μA
pF
V
V
μA
V
pF
ADG793A/ADG793G
Parameter
LOGIC OUTPUTS3
SDA Pin
Output Low Voltage, VOL
Floating-State Leakage Current
Floating-State Output Capacitance
GPO1 Pin and GPO2 Pin
Output Low Voltage, VOL
Output High Voltage, VOH
POWER REQUIREMENTS
IDD
Conditions
Min
Typ 1
ISINK = 3 mA
ISINK = 6 mA
Max
Unit
0.4
0.6
±1
V
V
μA
pF
0.4
V
V
1
μA
0.1
0.2
mA
mA
3
ILOAD = +2 mA
ILOAD = −2 mA
2.0
Digital inputs = 0 V or VDD, I2C interface
inactive
I2C interface active, fSCL = 400 kHz
I2C interface active, fSCL = 3.4 MHz
1
All typical values are at TA = 25°C, unless otherwise stated.
Guaranteed by initial characterization, not subject to production test.
Guaranteed by design, not subject to production test.
2
3
Rev. 0 | Page 6 of 24
0.001
ADG793A/ADG793G
I2C TIMING SPECIFICATIONS
VDD = 2.7 V to 5.5 V; GND = 0 V; TA = −40°C to +85°C, unless otherwise noted. See Figure 2 for timing diagram.
Table 3.
Parameter 1
fSCL
t1
t2
t3
t4 2
t5
t6
t7
t8
t9
t10
Conditions
Standard mode
Fast mode
High speed mode
CB = 100 pF max
CB = 400 pF max
Standard mode
Fast mode
High speed mode
CB = 100 pF max
CB = 400 pF max
Standard mode
Fast mode
High speed mode
CB = 100 pF max
CB = 400 pF max
Standard mode
Fast mode
High speed mode
Standard mode
Fast mode
High speed mode
CB = 100 pF max
CB = 400 pF max
Standard mode
Fast mode
High speed mode
Standard mode
Fast mode
High speed mode
Standard mode
Fast mode
Standard mode
Fast mode
High speed mode
Standard mode
Fast mode
High speed mode
CB = 100 pF max
CB = 400 pF max
Standard mode
Fast mode
High speed mode
CB = 100 pF max
CB = 400 pF max
Min
Max
100
400
Unit
kHz
kHz
3.4
1.7
4
0.6
MHz
MHz
μs
μs
60
120
4.7
1.3
ns
ns
μs
μs
160
320
250
100
10
0
0
ns
ns
ns
ns
ns
μs
μs
0
0
4.7
0.6
160
4
0.6
160
4.7
1.3
4
0.6
160
3.45
0.9
1000
300
ns
ns
μs
μs
ns
μs
μs
ns
μs
μs
μs
μs
ns
ns
ns
20 + 0.1 CB
80
160
300
300
ns
ns
ns
ns
10
20
80
160
ns
ns
20 + 0.1 CB
10
20
703
150
Rev. 0 | Page 7 of 24
Description
Serial clock frequency
tHIGH, SCL high time
tLOW, SCL low time
tSU;DAT, data setup time
tHD;DAT, data hold time
tSU;STA, setup time for a repeated start condition
tHD;STA, hold time (repeated) start condition
tBUF, bus free-time between a stop and a start condition
tSU;STO, setup time for stop condition
tRDA, rise time of SDA signal
tFDA, fall time of SDA signal
ADG793A/ADG793G
Parameter 1
t11
t11A
t12
tSP
Conditions
Standard mode
Fast mode
High speed mode
CB = 100 pF max
CB = 400 pF max
Standard mode
Fast mode
High speed mode
CB = 100 pF max
CB = 400 pF max
Standard mode
Fast mode
High speed mode
CB = 100 pF max
CB = 400 pF max
Fast mode
High speed mode
Min
Max
1000
300
Unit
ns
ns
40
80
1000
ns
ns
ns
20 + 0.1 CB
300
ns
10
20
20 + 0.1 CB
80
160
300
300
ns
ns
ns
ns
10
20
0
0
40
80
50
10
ns
ns
ns
ns
20 + 0.1 CB
10
20
Description
tRCL, rise time of SCL signal
tRCL1, rise time of SCL signal after a repeated start
condition and after an acknowledge bit
tFCL, fall time of SCL signal
Pulse width of suppressed spike
1
Guaranteed by initial characterization. CB refers to capacitive load on the bus line, tr and tf measured between 0.3 VDD and 0.7 VDD.
A device must provide a data hold time for SDA in order to bridge the undefined region of the SCL falling edge.
2
TIMING DIAGRAM
t11
t12
t6
t2
SCL
t1
t6
t4
t5
t3
t8
t10
t9
t7
P
S
S
Figure 2. Timing Diagram for 2-Wire Serial Interface
Rev. 0 | Page 8 of 24
P
06030-002
SDA
ADG793A/ADG793G
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 4.
Parameter
VDD to GND
Analog, Digital Inputs
Continuous Current, S or D Pins
Peak Current, S or D Pins
Operating Temperature Range
Industrial (B Version)
Storage Temperature Range
Junction Temperature
θJA Thermal Impedance
24-Lead LFCSP
Lead Temperature, Soldering
(10 sec)
IR Reflow, Peak Temperature
(