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DS280DF810ABVT

DS280DF810ABVT

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    135-BGA模块

  • 描述:

    Buffer, ReDriver 8 Channel 28.4Gbps 135-FCBGA (13.1x8.1)

  • 数据手册
  • 价格&库存
DS280DF810ABVT 数据手册
Product Folder Order Now Support & Community Tools & Software Technical Documents DS280DF810 SNLS538A – SEPTEMBER 2016 – REVISED OCTOBER 2019 DS280DF810 28 Gbps Multi-Rate 8-Channel Retimer 1 Features 3 Description • The DS280DF810 is an eight-channel multi-rate Retimer with integrated signal conditioning. It is used to extend the reach and robustness of long, lossy, crosstalk-impaired high-speed serial links while achieving a bit error rate (BER) of 10-15 or less. 1 • • • • • • • • • • • • • • Octal-Channel Multi-Rate Retimer with Integrated Signal Conditioning All Channels Lock Independently from 20.2 Gbps to 28.4 Gbps (Including Sub-Rates Like 10.1376 Gbps, 10.3125 Gbps, 12.5 Gbps, and More) Ultra-Low Latency: 10 MHz, sinusoidal (1) 10 mVpp TrampVDD VDD supply ramp time, from 0 V to 2.375 V 150 TJ Operating junction temperature -40 110 ºC TA Operating ambient temperature -40 85 (2) ºC VIO2.5V 2.5 V I/O voltage (LVCMOS, CMOS and Analog) 2.375 2.625 V VIO3.3V,INT_N Open Drain LVCMOS I/O voltage (INT_N) 3.6 V VIO3.3V Open Drain LVCMOS I/O voltage (SDA, SDC) 3.6 V (1) (2) μs 2.375 Steps must be taken to ensure the combined AC plus DC supply noise meets the specified VDD supply voltage limits. Steps must be taken to ensure the operating junction temperature range and ambient temperature stay-in-lock range (TEMPLOCK+, TEMPLOCK-) are met. Refer to Timing Requirements, Retimer Jitter Specifications for more details concerning TEMPLOCK+ and TEMPLOCK-. 7.4 Thermal Information DS280DF810 THERMAL METRIC (1) CONDITIONS/ASSUMPTIONS (2) FC/CSP (ABV) UNIT 135 PINS 4-Layer JEDEC Board 26.4 10-Layer 8-in x 6-in Board 9.3 20-Layer 8-in x 6-in Board 8.5 RθJA Junction-to-ambient thermal resistance 30-Layer 8-in x 6-in Board 8.2 RθJC(top) Junction-to-case (top) thermal resistance 4-Layer JEDEC Board 1.6 °C/W RθJB Junction-to-board thermal resistance 4-Layer JEDEC Board 9.3 °C/W 4-Layer JEDEC Board 0.1 10-Layer 8-in x 6-in Board 0.1 20-Layer 8-in x 6-in Board 0.1 30-Layer 8-in x 6-in Board 0.1 4-Layer JEDEC Board 9.3 10-Layer 8-in x 6-in Board 5.0 20-Layer 8-in x 6-in Board 4.9 30-Layer 8-in x 6-in Board 4.6 Junction-to-top characterization parameter ΨJT Junction-to-board characterization parameter ΨJB (1) (2) °C/W °C/W °C/W For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. No heat sink or airflow was assumed for these estimations. Depending on the application, a heat sink, faster airflow, or reduced ambient temperature (
DS280DF810ABVT 价格&库存

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DS280DF810ABVT
  •  国内价格 香港价格
  • 1+508.860471+61.55215
  • 10+478.0012010+57.81939
  • 25+462.5844425+55.95457
  • 100+428.66030100+51.85108

库存:0