GC5325
www.ti.com .............................................................................................................................................................................................. SLWS215 – JANUARY 2009
GC5325 Wideband Digital Predistortion Transmit Processor
•
FEATURES
1
• Integrated CFR and DPD Functions
• Up to 20-MHz Combined Signal Bandwidth
• CFR: Typically Meets 3GPP TS 25.141 250 mV) to/from ADCACLK and ADCACLKC clock crossing
(VOD = 0).
Setup and hold measured for ADCB[7:0]P, ADCB[7:0]N valid for (VOD > 250 mV) to/from ADCBCLK and ADCBCLKC clock crossing
(VOD = 0).
1/fCLK(ADC)
CLK
CLKC
ADC[15:0]P
ADC[15:0]N
tsu(ADC[#]P)
th(ADC[#]P)
T0286-02
Figure 10. LVDS Timing Specifications (16 × 1 SDR LVDS)
1/fCLK(ADC)
CLK
CLKC
tsu(ADC[#]P)
ADC[15:0]P
ADC[15:0]N
th(ADC[#]P)
T0292-01
Figure 11. LVDS Timing Specifications (16 × 1 DDR LVDS)
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GC5325
SLWS215 – JANUARY 2009 .............................................................................................................................................................................................. www.ti.com
1/fCLK(ADCx)
CLK
CLKC
ADC[# bits/2]P
Even Bits
Odd Bits
Even Bits
Odd Bits
ADC[# bits/2]N
tsu(ADCx[#/2]P)
th(ADCx[#/2]P)
t=N
t=N+1
T0293-01
Figure 12. LVDS Timing Specifications (8 × 2 DDR LVDS)
APPENDIX A
See the TMS320C672x DSP Universal Host Port Interface (UHPI) reference guide (SPRU719).
ADDR/DATA BUS (16-Bit)
UHPI_HD[15:0]
DATA READY
UHPI_HRDYB
HALFWORD STROBE
UHPI_HD[16]/HHWIL
CHIP SELECT
Host
Processor
BYTE ENABLE
CONTROL INPUT
UHPI_HCS
(1)
UHPI_HBE[1:0]B
(2)
UHPI_HCNTL[1:0]
FUNDAMENTAL STROBE
C6727 DSP
Asynchronous
Mode
UHPI_HCSB/UHPI_HDS[2:1]B
READ/WRITE CONTROL
UHPI_HRWB
DSP INTERRUPT
AMUTE2/HINTB
HOST INTERRUPT
AFSR2
B0281-01
(1)
Byte enables are aplicable to single HPID accesses. All byte enables must be active during HPID with post-increment
(burst) UHPI accesses.
(2)
Control inputs selecting between HPIA, HPIC, HPID, and HPID with post-increment accesses.
Figure 13. Host-to-DSP Interface (Multiplexed Host Address/Data Dual Halfword)
GLOSSARY OF TERMS
3G
Third generation (refers to next-generation wideband cellular systems that use CDMA)
3GPP
Third generation partnership project (W-CDMA specification, www.3gpp.org)
3GPP2
Third generation partnership project 2 (cdma2000 specification, www.3gpp2.org)
ACLR
Adjacent channel leakage ratio (measure of out-of-band energy from one CDMA carrier)
ACPR
Adjacent channel power ratio
ADC
Analog-to-digital converter
BW
Bandwidth
20
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GC5325
www.ti.com .............................................................................................................................................................................................. SLWS215 – JANUARY 2009
CCDF
Complementary cumulative distribution function
CDMA
Code division multiple access (spread spectrum)
CEVM
Composite error vector magnitude
CFR
Crest factor reduction
CMOS
Complementary metal oxide semiconductor
DAC
Digital-to-analog converter
dB
Decibels
dBm
Decibels relative to 1 mW (30 dBm = 1 W)
DDR
Dual data rate (ADC output format)
DSP
Digital signal processing or digital signal processor
EVM
Error vector magnitude
FIR
Finite impulse response (type of digital filter)
I/Q
In-phase and quadrature (signal representation)
IF
Intermediate frequency
IIR
Infinite impulse response (type of digital filter)
JTAG
Joint Test Action Group (chip debug and test standard 1149.1)
LO
Local oscillator
LSB
Least-significant bit
Mb
Megabits (divide by 8 for megabytes MB)
MSB
Most-significant bit
MSPS
Megasamples per second (1×106 samples/s)
PA
Power amplifier
PAR
Peak-to-average ratio
PCDE
Peak code domain error
PDC
Peak detection and cancellation (stage)
PDF
Probability density function
RF
Radio frequency
RMS
Root mean square (method to quantify error)
SDR
Single data rate (ADC output format)
SEM
Spectrum emission mask
SNR
Signal-to-noise ratio (usually measured in dB or dBm)
UMTS
Universal mobile telephone service
W-CDMA
Wideband code division multiple access (synonymous with 3GPP)
WiBRO
Wireless broadband (Korean initiative IEEE 802.16e)
WiMAX
Worldwide Interoperability of Microwave Access (IEEE 802.16e)
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PACKAGE OPTION ADDENDUM
www.ti.com
3-Feb-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
GC5325IZND
ACTIVE
BGA
ZND
Pins Package Eco Plan (2)
Qty
352
40
Pb-Free
(RoHS)
Lead/Ball Finish
SNAGCU
MSL Peak Temp (3)
Level-3-260C-168 HR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 1
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