ISO5852SEVM

User's Guide SLLU207A – August 2014 – Revised September 2015 ISO5852S Evaluation Module The manual describes the ISO5852S Evaluation Module (EVM). The ISO5852S EVM allows designers to evaluate device AC and DC performance with a pre-populated 1-nF load or with a user-installed IGBT in either of the standard TO-247 or TO-220 packages. Warning: Note that although these devices provide galvanic isolation of up to 5700 V, the EVM cannot be used for isolation voltage testing. Voltage exceeding the EVM’s ratings (VCC1 > 5.5 V, VCC2 – VEE2 > 30 V, or IGBT Collector-Emitter Voltage VCE > 50 V) can damage the EVM resulting in personal injury. 1 2 3 4 Contents Overview ...................................................................................................................... 3 EVM Setup and Precautions ............................................................................................... 3 2.1 Before You Begin ................................................................................................... 3 2.2 Power Supply Connections ........................................................................................ 4 2.3 Signal Connections ................................................................................................. 5 Example Measurements .................................................................................................... 6 Printed-Circuit Board ....................................................................................................... 10 4.1 ISO5852S Operation .............................................................................................. 11 4.2 ISO5852S EVM Bill of Materials ................................................................................ 13 List of Figures 1 ISO5852S EVM Power Supply Schematic ............................................................................... 4 2 Output Power Supply for Unipolar (Left) or Bipolar (Right) Operation ................................................ 4 3 ISO5852S EVM Signal Path Schematic .................................................................................. 5 4 ISO5852S EVM Input and Output With Unipolar Output Supply ...................................................... 6 5 ISO5852S EVM Input and Output With Bipolar Output Supply (VCC2 = 15 V, VEE2 = –8 V)......................... 7 6 ISO5852S EVM OUTH/L, DESAT, FLT, and RST With Unipolar Output Supply ................................... 7 7 ISO5852S EVM OUTH/L, RDY, FLT, and RST With Unipolar Output Supply....................................... 8 8 ISO5852S EVM OUTH/L, DESAT, FLT, and RST With Bipolar Output Supply ..................................... 8 9 ISO5852S EVM OUTH/L, RDY, FLT, and RST With Bipolar Output Supply ........................................ 9 10 ISO5852S EVM ............................................................................................................ 10 List of Tables 1 Test Points .................................................................................................................. 12 2 Bill of Materials ............................................................................................................. 13 All trademarks are the property of their respective owners. SLLU207A – August 2014 – Revised September 2015 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated ISO5852S Evaluation Module 1 www.ti.com General Texas Instruments High Voltage Evaluation (TI HV EVM) User Safety Guidelines WARNING Always follow TI’s set-up and application instructions, including use of all interface components within their recommended electrical rated voltage and power limits. Always use electrical safety precautions to help ensure your personal safety and the safety of those working around you. Contact TI’s Product Information Center http://support/ti./com for further information. Save all warnings and instructions for future reference. Failure to follow warnings and instructions may result in personal injury, property damage, or death due to electrical shock and/or burn hazards. The term TI HV EVM refers to an electronic device typically provided as an open framed, unenclosed printed circuit board assembly. It is intended strictly for use in development laboratory environments, solely for qualified professional users having training, expertise, and knowledge of electrical safety risks in development and application of high-voltage electrical circuits. Any other use and/or application are strictly prohibited by Texas Instruments. If you are not suitably qualified, you should immediately stop from further use of the HV EVM. 1. Work Area Safety: (a) Keep work area clean and orderly. (b) Qualified observer(s) must be present anytime circuits are energized. (c) Effective barriers and signage must be present in the area where the TI HV EVM and its interface electronics are energized, indicating operation of accessible high voltages may be present, for the purpose of protecting inadvertent access. (d) All interface circuits, power supplies, evaluation modules, instruments, meters, scopes and other related apparatus used in a development environment exceeding 50 VRMS/75 VDC must be electrically located within a protected Emergency Power Off (EPO) protected power strip. (e) Use a stable and non-conductive work surface. (f) Use adequately insulated clamps and wires to attach measurement probes and instruments. No freehand testing whenever possible. 2. Electrical Safety:As a precautionary measure, it is always a good engineering practice to assume that the entire EVM may have fully accessible and active high voltages. (a) De-energize the TI HV EVM and all its inputs, outputs, and electrical loads before performing any electrical or other diagnostic measurements. Revalidate that TI HV EVM power has been safely deenergized. (b) With the EVM confirmed de-energized, proceed with required electrical circuit configurations, wiring, measurement equipment hook-ups and other application needs, while still assuming the EVM circuit and measuring instruments are electrically live. (c) Once EVM readiness is complete, energize the EVM as intended. WARNING: while the EVM is energized, never touch the EVM or its electrical circuits as they could be at high voltages capable of causing electrical shock hazard. 3. Personal Safety: (a) Wear personal protective equipment, for example, latex gloves and/or safety glasses with side shields or protect EVM in an adequate lucent plastic box with interlocks from accidental touch. 4. Limitation for Safe Use: (a) EVMs are not to be used as all or part of a production unit. 2 ISO5852S Evaluation Module SLLU207A – August 2014 – Revised September 2015 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Overview www.ti.com 1 Overview The ISO5852S is a 5.7-kVRMS, reinforced isolated, IGBT gate driver with split outputs, OUTH and OUTL, providing 2.5-A source and 5-A sink currents. The input side operates from a single 2.25-V to 5.5-V supply. The output side allows for a supply range from minimum 15 V to maximum 30 V. Two complementary CMOS inputs control the output state of the gate driver. The short propagation time assures accurate control of the output stage. An internal desaturation detection recognizes when the IGBT is in an overload condition. Upon a desaturation detect, a Mute logic immediately blocks the output of the isolator and initiates a soft-turn-off procedure which disables, OUTH, and pulls OUTL to low over a time span of 2 μs. When OUTL reaches 2 V with respect to the most negative supply potential, VEE2, the gate driver output is pulled hard to VEE2 potential, turning the IGBT immediately off. When desaturation is active, a fault signal is sent across the isolation barrier pulling the FLT output at the input side low and blocking the isolator input. Mute logic is activated through the soft-turn-off period. The FLT output condition is latched and can be reset only after RDY goes high, through a low-active pulse at the RST input. When the IGBT is turned off during normal operation with bipolar output supply, the output is hard clamp to VEE2. If the output supply is unipolar, an active Miller clamp can be used, allowing Miller current to sink across a low impedance path preventing IGBT to be dynamically turned on during high voltage transient conditions. The readiness for the gate driver to be operated is under the control of two undervoltage-lockout circuits monitoring the input and output supplies. If either side have insufficient supply, the RDY output goes low, otherwise the output is high. 2 EVM Setup and Precautions 2.1 Before You Begin The following warnings and cautions are noted for the safety of anyone using or working close to the ISO5852S EVM. Observe all safety precautions. Warning Warning Hot surface. Contact may cause burns. Do not touch. Danger High Voltage The ISO5852S EVM does not have an isolation boundary. If you apply high voltage to this board, all terminals should be considered high voltage. spacer Electric shock is possible when connecting the board to live wire. The board should be handled with care by a professional. spacer For safety, use of isolated test equipment with overvoltage and overcurrent protection is highly recommended. SLLU207A – August 2014 – Revised September 2015 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated ISO5852S Evaluation Module 3 EVM Setup and Precautions 2.2 www.ti.com Power Supply Connections Figure 1 illustrates the ISO5852S EVM power supply schematic. Figure 1. ISO5852S EVM Power Supply Schematic The input side of the ISO5852S EVM (VCC1) operates from a single 2.25-V to 5.5-V power supply and connected via TB3. Test point (TP8) is available for monitoring the input power supply. The ISO5852S EVM provides connections for evaluating the output side (VCC2, VEE2) with either a bipolar or unipolar power supply, from a minimum 15 V to maximum 30 V. For unipolar operation, connect VEE2 to GND2 through a wire-bridge between pin 2 and pin 3 of TB2, as shown in Figure 2. VCC2 and VEE2 can be monitored via TP17 and TP19, respectively. PSU VCC2 VCC2 VEE2 VCC2 GND2 VEE2 VCC2 GND2 TB2 VEE2 TB2 PSU Figure 2. Output Power Supply for Unipolar (Left) or Bipolar (Right) Operation 4 ISO5852S Evaluation Module SLLU207A – August 2014 – Revised September 2015 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated EVM Setup and Precautions www.ti.com 2.3 Signal Connections Figure 3 illustrates the ISO5852S EVM signal path schematic. Figure 3. ISO5852S EVM Signal Path Schematic 2.3.1 I/O Connections Figure 3 shows the signal path schematic of the EVM. JMP1 allows for stimulus or monitoring of the device I/O pins IN+, IN–, RDY, FLT, and RST. Test points 1, 2, 3, 4, and 5 provide additional access to the I/O pins. The EVM comes populated with 10-kΩ pullup resistors (R1, R2) on the RDY and FLT pins, as well as 220-pF capacitors (C4, C5) to GND1 for noise filtering. 2.3.2 Output and Loading The EVM comes populated with a 1-nF load (C12) on the output side. The output can be monitored directly via TP12. A 10:1 resistor-divider network is provided for monitoring the output with a low-voltage probe via TP20. The divider circuit can be disconnected from the output by removing the shunt on JMP5. 10-Ω gate resistors (R3, R4) control the rise and fall times of the output. These resistors can be modified by the user to alter the turn-on and turn-off characteristics of the output. The EVM also allows for evaluation of the device with an IGBT load in either of the standard TO-247 or TO-220 footprints. During evaluation with an IGBT load, the pre-installed capacitive load (C12) can be disconnected from the output by removing the shunt on JMP2. The EVM provides an additional connection (P2) for applying an external power supply to the IGBT Collector. The EVM is not intended for high voltage testing and the voltage applied to P2 should be limited to 50 V DC. When evaluating the device with an IGBT load using P2, the components D1, D2, R7, and C13 should be populated with their default values, specified in Figure 3. Additionally, ensure that the DESAT pin is not connected to GND2 when driving an IGBT load using P2, either by removing R8, or verifying that all jumpers are removed from JMP3. SLLU207A – August 2014 – Revised September 2015 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated ISO5852S Evaluation Module 5 Example Measurements 2.3.3 www.ti.com DESAT The EVM comes populated with a 220-pF DESAT capacitance. Pin1 on JMP3 can be used to apply a signal directly to the DESAT pin. For evaluation with the default 1-nF load, when actual IGBT is not connected as load, the desaturation function should be disabled by connecting the DESAT pin to GND2 by shunting pin 1 to pin 2 on JMP3. 2.3.4 CLAMP By default, the CLAMP pin is connected to the output via a 0-Ω resistor (R6). The CLAMP feature can be disabled by removing R6. CLAMP can be monitored via TP14, and a signal can be applied directly to the CLAMP pin via JMP4. 3 Example Measurements Figure 4 illustrates measurements performed under the default EVM configuration. For these measurements, VIN– is connected to GND1. Figure 4. ISO5852S EVM Input and Output With Unipolar Output Supply Figure 4 shows the input and output of the ISO5852S EVM for a 100-kHz clock with RG = 10 Ω (R3) and R4 = 10 Ω and a unipolar output supply (VCC2 = 15 V, VEE2 = GND2). The output is measured at TP12. 6 ISO5852S Evaluation Module SLLU207A – August 2014 – Revised September 2015 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Example Measurements www.ti.com Figure 5 shows the input and output of the ISO5852S EVM for a 100-kHz clock with RG = 10 Ω (R3) and R4 = 10 Ω and a bipolar output supply (VCC2 = 15 V, VEE2 = –8 V). Figure 5. ISO5852S EVM Input and Output With Bipolar Output Supply (V CC2 = 15 V, VEE2 = –8 V) Figure 6 and Figure 7 with Unipolar Output Supply and Figure 8 and Figure 9 with Bipolar Output Supply, show the functionality of the OUTH/L, DESAT, RDY, FLT, and RST pins. IN+ is set to 5 VDC, and a 7.7-µs pulse is applied to RST. On the rising edge of RST, the fault is cleared and the DESAT capacitor begins to charge. As the DESAT pin reaches the DESAT threshold voltage, a fault is triggered on FLT, and the output goes into Soft turn-off. The FLT output condition is latched and can be reset only after RDY goes high, through a low-active pulse at the RST input. RST must be toggled low, then high to reset the device, and the cycle begins again. Figure 6. ISO5852S EVM OUTH/L, DESAT, FLT, and RST With Unipolar Output Supply SLLU207A – August 2014 – Revised September 2015 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated ISO5852S Evaluation Module 7 Example Measurements www.ti.com Figure 7. ISO5852S EVM OUTH/L, RDY, FLT, and RST With Unipolar Output Supply Figure 8. ISO5852S EVM OUTH/L, DESAT, FLT, and RST With Bipolar Output Supply 8 ISO5852S Evaluation Module SLLU207A – August 2014 – Revised September 2015 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Example Measurements www.ti.com Figure 9. ISO5852S EVM OUTH/L, RDY, FLT, and RST With Bipolar Output Supply SLLU207A – August 2014 – Revised September 2015 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated ISO5852S Evaluation Module 9 Printed-Circuit Board 4 www.ti.com Printed-Circuit Board The ISO5852S is an isolated gate driver with several important features. The printed-circuit board (PCB)/EVM, as shown in Figure 10 ISO5852S EVM, has been designed to support the ISO5852S device and to allow the user to evaluate its basic operation and features. The left side of the PCB contains the interface to the input, control, and status functions of the integrated circuit (IC). The right side of the PCB has been designed to interface to an IGBT. No electrical connections exist between the right and left sides of the PCB. Figure 10. ISO5852S EVM Refer to the ISO5852S EVM schematic shown in Figure 3 and the bill of materials given in Table 2, to become familiar with the PCB components and layout. The following table pertains to the labels on the EVM board (Figure 10): 10 ISO5852S Evaluation Module Given Read As VCC1 VCC1 VCC2 VCC2 VEE2 VEE2 VCE VCE VIN+ IN+ VIN– IN– /FAULT FLT SLLU207A – August 2014 – Revised September 2015 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Printed-Circuit Board www.ti.com 4.1 ISO5852S Operation 4.1.1 Left-Side Operation: DC Power, Control, and Status 4.1.1.1 DC Input Power The left side of the ISO5852S (and therefore the PCB) can be operated using either a 2.5-V (±10%) or 5-V (±10%) dc power supply. The user can choose to operate the ISO5852S EVM by battery. The dc power supply must be connected to the TB3 terminal having VCC1 (+5.5 V DC) and GND1 (+5.5 V DC return). 4.1.1.2 Control and Status The interface to the device is via the JMP1 header. It contains the IN+ and IN– inputs, the device RST, RDY, and FLT indicator output. The JMP1 header allows easy connections to test equipment using standard clip leads. Each of the five signals also has a test point for additional connections. These are test points TP1–TP5. 4.1.2 Right-Side Operation 4.1.2.1 DC Output Power Power is provided to VCC2 on the right side of the device at TB2 terminal as shown in Figure 2. The dc supply must be able to provide a bias voltage over the range of +15 V DC to +30 V DC. The user can choose to operate the ISO5852S EVM by battery. If a negative gate drive is required, a dc supply (or battery) must be connected across VEE2 at the TB3 terminal as shown in Figure 2. The voltage range must be between 0 V and 15 V DC. The voltage across VCC2 and VEE2 must not exceed 30 V for operation. 4.1.2.2 DESAT – JMP3 One of the features of the ISO5852S is the IGBT desaturation protection. JMP3 provides access to the DESAT pin. It is a 3-pin male header, and installing a shorting jumper between pin 1 and pin 2 on JMP3 disables the DESAT function. 4.1.2.3 Load As shipped, the ISO5852S EVM does not have an IGBT installed. The user can evaluate device operation using a capacitive load of 1 nF provided on EVM or capacitive load can be removed and IGBT can be connected onto the board. Most IGBTs are available in the standard TO-247 or TO-220 package. The PCB has provisions to solder an IGBT directly onto the board. 4.1.2.3.1 No IGBT Installed – JMP2 When using the capacitive load, the user must install a jumper short onto JMP2. It connects a 1-nF capacitor (C12) to the OUTH/L pin. The capacitive consists of the 10-Ω gate resistor (R3) and the 1-nF capacitor (C12). 4.1.2.3.2 IGBT Installed – REMOVE JMP2 If the user chooses to install an IGBT, JMP2 must be left open with no shorting jumper installed. The PCB has been designed with plated-through holes (or vias) as Q1 and Q2 shown on the schematic for IGBT connections. SLLU207A – August 2014 – Revised September 2015 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated ISO5852S Evaluation Module 11 Printed-Circuit Board 4.1.3 www.ti.com Test Points Test points have been provided for ready access to signal monitoring and are listed in Table 1. Table 1. Test Points 12 Test Points I/O TP1 Input IN+ (Side 1) TP2 Input IN– (Side 1) TP3 Output RDY (Side 1) TP4 Output FLT (Side 1) TP5 Input RST (Side 1) TP6 Ground GND1 (Side 1) TP7 Ground GND1 (Side 1) TP8 Supply VCC1 (Side 1) TP9 Ground GND1 (Side 1) TP10 Input COLLECTOR VOLTAGE (Side 2) TP11 Input EMITTER VOLTAGE (Side 2) TP12 Output GATE VOLTAGE (Side 2) TP13 Input DESAT (Side 2) TP14 Input CLAMP (Side 2) TP15 Ground GND2 (Side 2) TP16 Ground GND2 (Side 2) TP17 Supply VCC2 (Side 2) TP18 Ground GND2 (Side 2) TP19 Supply VEE2 (Side 2) TP20 Output OUTH/L (Side 2) P1 Ground GND2 (Side 2) P2 Input COLLECTOR VOLTAGE (Side 2) ISO5852S Evaluation Module Function SLLU207A – August 2014 – Revised September 2015 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Printed-Circuit Board www.ti.com 4.2 ISO5852S EVM Bill of Materials The ISO5852S EVM bill of materials is shown in Table 2. Table 2. Bill of Materials Item Quantity Reference Part Description Manufacturer Manufacturer part number 1 0 C1 DNI - DNI DNI 2 1 C2 1uF CAP TANT 1UF 20V 10% 1206, ±10% AVX Corporation TPSA105K020R3000 3 1 C3 0.1uF CAP CER 0.1UF 50V 5% X7R 0805 Kemet Electronic Components C0805C104J5RACTU 4 2 C4,C5 220pF CAP CER 220PF 100V 5% NP0 0805 Murata Electronics North America GCM2165C2A221JA16D 5 2 C6,C9 22uF CAP TANT 22UF 50V 10% 2924 AVX Corporation TAJV226K050RNJ 6 2 C7,C10 4.7uF CAP CER 4.7UF 50V 10% X7R 1210 Kemet Electronic Components C1210X475K5RACTU 7 4 C8,C11,C14,C15 1uF CAP CER 1UF 50V 10% X7R 0805 Murata Electronics North America GRM21BR71H105KA12L 8 1 C12 1nF CAP CER 1000PF 100V 5% NP0 0805 Murata Electronics North America GRM2195C2A102JA01D 9 1 C13 220pF CAP CER 220PF 100V 5% NP0 0805 Murata Electronics North America GCM2165C2A221JA16D 10 1 D1 UF4007 DIODE GEN PURP 1KV 1A DO41 Fairchild Semiconductor UF4007 11 1 D2 BAT165 DIODE SCHOTTKY 40V 750MA SOD323 Infineon Technologies BAT 165 E6327 12 1 D3 MURS160T3G DIODE GEN PURP 600V 2A SMB ON Semiconductor MURS160T3G 13 0 D4 DNI - DNI DNI 14 1 JMP1 Header 5x2 CONN HEADER 10POS .100" T/H GLD Samtec Inc HTSW-105-07-G-D 15 2 JMP2,JMP5 HDR_THVT_1x2 CONN HEADER 2POS .100" T/H GOLD Samtec Inc HTSW-102-07-G-S 16 2 JMP3,JMP4 Header 3x1 CONN HEADER 2POS .100" T/H GOLD Samtec Inc HTSW-103-07-G-S 17 1 P1 GND2 CONN JACK BANANA UNINS PANEL MOU Emerson Network Power 108-0740-001 18 1 P2 COLLECTOR (50-V DC MAX) CONN JACK BANANA UNINS PANEL MOU Emerson Network Power 108-0740-001 19 0 Q1, Q2 IGBT - DNI DNI 20 2 R1,R2 10K RES SMD 10K OHM 1% 1/8W 0805 Vishay Dale CRCW080510K0FKEA 21 2 R3, R4 10 RES SMD 10 OHM 1% 1/4W 1206 Vishay Dale CRCW120610R0FKEA 22 0 R12 DNI - DNI DNI 23 1 R5 10 RES SMD 10 OHM 1% 1/4W 1206 Vishay/Dale CRCW120610R0FKEA 24 3 R6,R8,R9 0 RES SMD 0.0 OHM JUMPER 1/4W 1206 Vishay Dale CRCW12060000Z0EA 25 1 R7 1K RES SMD 1K OHM 1% 1/4W 1206 Panasonic - ECG ERJ-8ENF1001V 26 1 R10 9K RES SMD 9.09K OHM 1% 1/4W 1206 Yageo RC1206FR-079K09L 27 1 R11 1K RES SMD 1K OHM 1% 1/4W 1206 Panasonic - ECG ERJ-8ENF1001V 28 1 TB2 3PIN_TERMINAL_BLOCK TERM BLOCK 3POS SIDE ENT 2.54MM TE Connectivity 282834-3 29 1 TB3 2PIN_TERMINAL_BLOCK TERM BLOCK 2POS SIDE ENT 2.54MM TE Connectivity 282834-2 SLLU207A – August 2014 – Revised September 2015 Submit Documentation Feedback ISO5852S Evaluation Module Copyright © 2014–2015, Texas Instruments Incorporated 13 Printed-Circuit Board www.ti.com Table 2. Bill of Materials (continued) Item Quantity Reference Part Description Manufacturer Manufacturer part number 30 1 U1 16 PIN DEVICE ISO5852S High-CMTI 2.5-A / 5-A Isolated IGBT, MOSFET Gate Driver with Split Outputs and Active Safety Features Texas Instruments ISO5852SDW 31 20 TP1 through TP20 Color: Red for Power, Black for Ground and Blue for Signal TEST POINT PC COMPACT .063 D RED TEST POINT PC COMPACT .063 D BLK TEST POINT PC COMPACT T/H BLUE Keystone Electronics 5005K-ND 5006K-ND 5122K-ND 32 4 Standoff/spacers 1 inch HEX STANDOFF M3 BRASS 1" Harwin Inc 952-2177-ND 33 4 Screws M3 MACHINE SCREW PAN PHILLIPS M3 APM Hexseal 335-1148-ND 34 9 Jumpers 0.1inch SHUNT JUMPER .1" BLACK GOLD 3M 3M9580-ND Jumpers (default): a. Pins 1 and 2 of JMP2 are connected with a jumper. b. Pins 1 and 2 of JMP5 are connected with a jumper. c. Two GND2 pins of JMP3 & JMP4 are connected with jumpers. d. Pin 3 and 4 of JMP1 are connected with a jumper and rest pins of JMP1 are kept open 14 ISO5852S Evaluation Module SLLU207A – August 2014 – Revised September 2015 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Revision History www.ti.com Revision History Changes from Original (August 2014) to A Revision ..................................................................................................... Page • The entire manual has been changed for the A revision. ............................................................................ 1 NOTE: Page numbers for previous revisions may differ from page numbers in the current version. SLLU207A – August 2014 – Revised September 2015 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Revision History 15 STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES 1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein. Acceptance of the EVM is expressly subject to the following terms and conditions. 1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions set forth herein but rather shall be subject to the applicable terms and conditions that accompany such Software 1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned, or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production system. 2 Limited Warranty and Related Remedies/Disclaimers: 2.1 These terms and conditions do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License Agreement. 2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM to User. Notwithstanding the foregoing, TI shall not be liable for any defects that are caused by neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any way by an entity other than TI. Moreover, TI shall not be liable for any defects that result from User's design, specifications or instructions for such EVMs. Testing and other quality control techniques are used to the extent TI deems necessary or as mandated by government requirements. TI does not test all parameters of each EVM. 2.3 If any EVM fails to conform to the warranty set forth above, TI's sole liability shall be at its option to repair or replace such EVM, or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day warranty period. 3 Regulatory Notices: 3.1 United States 3.1.1 Notice applicable to EVMs not FCC-Approved: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit to determine whether to incorporate such items in a finished product and software developers to write software applications for use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of an FCC license holder or must secure an experimental authorization under part 5 of this chapter. 3.1.2 For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant: CAUTION This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. FCC Interference Statement for Class A EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense. SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER FCC Interference Statement for Class B EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: • • • • Reorient or relocate the receiving antenna. Increase the separation between the equipment and receiver. Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. Consult the dealer or an experienced radio/TV technician for help. 3.2 Canada 3.2.1 For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210 Concerning EVMs Including Radio Transmitters: This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device. Concernant les EVMs avec appareils radio: Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement. Concerning EVMs Including Detachable Antennas: Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser) gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited for use with this device. Concernant les EVMs avec antennes détachables Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de l'émetteur 3.3 Japan 3.3.1 Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に 輸入される評価用キット、ボードについては、次のところをご覧ください。 http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 3.3.2 Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan are NOT certified by TI as conforming to Technical Regulations of Radio Law of Japan. If User uses EVMs in Japan, User is required by Radio Law of Japan to follow the instructions below with respect to EVMs: 1. 2. 3. Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for Enforcement of Radio Law of Japan, Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to EVMs, or Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan. SPACER SPACER SPACER SPACER SPACER 【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 本開発キットは技術基準適合証明を受けておりません。 本製品のご使用に際しては、電波法遵守のため、以下のいずれかの措置を取っていただく必要がありますのでご注意ください。 1. 2. 3. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。 実験局の免許を取得後ご使用いただく。 技術基準適合証明を取得後ご使用いただく。 なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。 上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・インスツルメンツ株式会社 東京都新宿区西新宿６丁目２４番１号 西新宿三井ビル 3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page SPACER 4 EVM Use Restrictions and Warnings: 4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS. 4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information related to, for example, temperatures and voltages. 4.3 Safety-Related Warnings and Restrictions: 4.3.1 User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or property damage. If there are questions concerning performance ratings and specifications, User should contact a TI field representative prior to connecting interface electronics including input power and intended loads. Any loads applied outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative. During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit components may have elevated case temperatures. These components include but are not limited to linear regulators, switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the information in the associated documentation. When working with the EVM, please be aware that the EVM may become very warm. 4.3.2 EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the dangers and application risks associated with handling electrical mechanical components, systems, and subsystems. User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees, affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or designees. 4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal, state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local requirements. 5. Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as accurate, complete, reliable, current, or error-free. SPACER SPACER SPACER SPACER SPACER SPACER SPACER 6. Disclaimers: 6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY WRITTEN DESIGN MATERIALS PROVIDED WITH THE EVM (AND THE DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS. 6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS AND CONDITIONS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY INVENTION, DISCOVERY OR IMPROVEMENT MADE, CONCEIVED OR ACQUIRED PRIOR TO OR AFTER DELIVERY OF THE EVM. 7. USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES, EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS AND CONDITIONS. THIS OBLIGATION SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED. 8. Limitations on Damages and Liability: 8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE TERMS ANDCONDITIONS OR THE USE OF THE EVMS PROVIDED HEREUNDER, REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED. 8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY WARRANTY OR OTHER OBLIGATION ARISING OUT OF OR IN CONNECTION WITH THESE TERMS AND CONDITIONS, OR ANY USE OF ANY TI EVM PROVIDED HEREUNDER, EXCEED THE TOTAL AMOUNT PAID TO TI FOR THE PARTICULAR UNITS SOLD UNDER THESE TERMS AND CONDITIONS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE OF MORE THAN ONE CLAIM AGAINST THE PARTICULAR UNITS SOLD TO USER UNDER THESE TERMS AND CONDITIONS SHALL NOT ENLARGE OR EXTEND THIS LIMIT. 9. Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s) will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s), excluding any postage or packaging costs. 10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas, without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas. Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2015, Texas Instruments Incorporated spacer IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. 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