TPS78833DBVRG4

TPS78825, TPS78833 SLVS382A – JUNE 2001 – REVISED JULY 2001 150-mA LOW-NOISE LDO WITH IN-RUSH CURRENT CONTROL FOR USB APPLICATION FEATURES D 150-mA Low-Dropout Regulator D Available in 2.5 V, 3.3 V D Programmable Slew Rate Control D Output Noise Typically 56 µVRMS D Only 17 µA Quiescent Current at 150 mA D 1 µA Quiescent Current in Standby Mode D Dropout Voltage Typically 150 mV at 150 mA (TPS78833) D Over Current Limitation D –40°C to 125°C Operating Junction D Temperature Range 5-Pin SOT-23 (DBV) Package DBV PACKAGE (TOP VIEW) IN 1 GND 2 EN 3 5 4 OUT DESCRIPTION The TPS78825 and TPS78833 are very small (SOT-23) package, low-noise LDOs that regulate the output voltage to 2.5 V and 3.3 V with input voltage ranging from 2.7 V to an absolute maximum of 13.5 V. These devices output 150 mA with a peak current of 350 mA (typ). The TPS788xx family uses the SR pin to program the output voltage slew rate to control the in-rush current. This is specifically used in the USB application where large load capacitance is present at start-up. The TPS788xx devices use only 17 µA of quiescent current and exhibit only 56 µVRMS of output voltage noise using a 10 µF output capacitor. The usual PNP pass transistor has been replaced by a PMOS pass element. Because the PMOS pass element behaves as a low-value resistor, the dropout voltage is very low, typically 150 mV at 150 mA of load current, and is directly proportional to the load current. The TPS788xx also features a logic-enabled sleep mode to shut down the regulator, reducing quiescent current to 1 µA typical at TJ = 25°C. SR QUIESCENT CURRENT vs FREE-AIR TEMPERATURE OUTPUT VOLTAGE, ENABLE VOLTAGE vs TIME (START-UP) Enable Voltage – V 25 VCC = 4.3 V IO = 1 mA 15 – Output Voltage – V Quiescent Current – µ A IO = 150 mA 20 10 5 O 0 V –40 –25 –10 5 20 35 50 65 80 95 110 125 TA – Free-Air Temperature – °C 5 0 C(SR) = 0.01 µF 3 C(SR) = 0.1 µF 2 VI = 4.3 V VO = 3.3 V IO = 150 mA Co = 10 µF TJ = 25°C 1 0 0 10 20 30 40 50 60 70 80 90 100 t – Time – ms Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2001, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. www.ti.com 1 TPS78825, TPS78833 SLVS382A – JUNE 2001 – REVISED JULY 2001 AVAILABLE OPTIONS TJ VOLTAGE PACKAGE 2.5 V SOT-23 SOT 23 (DBV) 40°C to 125°C –40°C 3.3 V † The DBVT indicates tape and reel of 250 parts. ‡ The DBVR indicates tape and reel of 3000 parts. PART NUMBER TPS78825DBVT† TPS78825DBVR‡ TPS78833DBVT SYMBOL TPS78833DBVR PGZI PGTI functional block diagram OUT IN EN 150 k Current Limit / Thermal Protection Vref GND SR Terminal Functions TERMINAL NAME NO. I/O I DESCRIPTION EN 3 GND 2 Active low enable IN 1 I The IN terminal is the input to the device. OUT 5 O The OUT terminal is the regulated output of the device. SR 4 I The SR terminal is used to control the in-rush current. Regulator ground absolute maximum ratings over operating free-air temperature range (unless otherwise noted)§ Input voltage range    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 13.5 V Voltage range at EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VI + 0.3 V Voltage on OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally limited ESD rating, HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 150°C Operating ambient temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C § Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are with respect to network ground terminal. DISSIPATION RATING TABLE BOARD PACKAGE RθJC RθJA DERATING FACTOR ABOVE TA = 25°C TA ≤ 25°C POWER RATING TA = 70°C POWER RATING TA = 85°C POWER RATING Low K¶ High K# DBV 65.8°C/W 259°C/W 3.9 mW/°C 386 mW 212 mW 154 mW DBV 65.8°C/W 180°C/W 5.6 mW/°C 555 mW 305 mW 222 mW ¶ The JEDEC Low K (1s) board design used to derive this data was a 3 inch x 3 inch, two layer board with 2 ounce copper traces on top of the board. # The JEDEC High K (2s2p) board design used to derive this data was a 3 inch x 3 inch, multilayer board with 1 ounce internal power and ground planes and 2 ounce copper traces on top and bottom of the board. 2 www.ti.com TPS78825, TPS78833 SLVS382A – JUNE 2001 – REVISED JULY 2001 electrical characteristics over recommended operating free-air temperature range EN = 0, TJ = –40 to 125 °C, VI = VO(typ) + 1 V, IO = 1 mA, Co = 4.7 µF, C(SR) = 0.01 µF (unless otherwise noted) PARAMETER VI IO Input voltage (see Note 2) TJ Operating junction temperature TEST CONDITIONS Continuous output current (see Note 3) MIN TYP TPS78825 TPS78833 TJ = 25°C 10 µA< IO < 150 mA, 3.8 V < VI < 10 V Output voltage 10 V 0 150 mA 125 °C 2.5 2.425 2.575 3.3 3.201 10 µA< IO < 450 mA, TJ = 25°C Quiescent current (GND current) 28 Load regulation 10 µA< IO < 200 mA, TJ = 25°C 12 Out ut voltage line regulation (∆VO/VO) Output (see Note 5) VO + 1 V < VI ≤ 10 V, TJ = 25°C VO + 1 V < VI ≤ 10 V 0.04 Output current limit Standby current EN = 0 V, 2.7 V < VI < 10 V High level enable input voltage 2.7 V < VI < 10 V Low level enable input voltage 2.7 V < VI < 10 V Input current (EN) EN = 0 Output noise voltage (TPS78833) Time, start-up start u (TPS78833) f = 1 kHz, TJ = 25°C, Co = 10 µF Dropout voltage (see Note 6) TPS78833 IO = 150 mA, TJ = 25°C IO = 150 mA %/V µVRMS 56 10 50 ms 300 350 750 mA 1 2 µA 1.7 C(SL) = 0.01 µF, IO = 150 mA, TPS78833 µA mV 0.1 V –1 Power supply ripple rejection V 3.399 17 10 µA< IO < 150 mA BW = 200 Hz to 100 kHz, IO = 150 mA, TJ = 25°C, Co = 10 µF, C(SR) = 0.47 µF C(byp) = 0.01 µF RL = 22 Ω, C(byp) = 0.1 µF Co = 10 µF, TJ = 25°C C(byp) = 0.47 µF VO = 0 V (see Note 4) UNIT 2.7 –40 TJ = 25°C 10 µA< IO < 150 mA, 3.5 V < VI < 10 V MAX 0.9 V 1 µA 70 dB 150 300 mV NOTES: 2. To calculate the minimum input voltage for your maximum output current, use the following formula: VI(min) = VO(max) + VDO (max load) 3. Continuous output current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the device operate under conditions beyond those specified in this table for extended periods of time. 4. The minimum IN operating voltage is 2.7 V or VO(typ) + 1 V, whichever is greater. The maximum IN voltage is 5.5 V. The maximum output current is 200 mA. 5. If VO ≤ 2.5 V then VImin = 2.7 V, VImax = 5.5 V: Line regulation (mV) + ǒ%ńVǓ V O ǒVImax * 2.7 VǓ 100 1000 If VO > 2.5 V then VImin = VO + 1 V, VImax = 5.5 V. 6. IN voltage equals VO(typ) – 100 mV www.ti.com 3 TPS78825, TPS78833 SLVS382A – JUNE 2001 – REVISED JULY 2001 TYPICAL CHARACTERISTICS OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE OUTPUT VOLTAGE vs LOAD CURRENT 25 3.2 VCC = 4.3 V TJ = 25°C VCC = 4.3 V VCC = 4.3 V IO = 150 mA IO = 1 mA 3.31 VO – Output Voltage – V 3.31 3.315 3.305 3.3 3.295 Quiescent Current – µ A 3.315 VO – Output Voltage – V QUIESCENT CURRENT vs FREE-AIR TEMPERATURE 3.305 3.3 3.295 IO = 150 mA 3.29 3.285 20 IO = 1 mA 15 10 5 3.28 3.29 3.275 3.27 –40 –25 –10 5 20 35 50 65 80 95 110 125 TA – Free-Air Temperature – °C 3.285 15 30 45 60 75 90 105 120 135 150 IL – Load Current – mA Hz 400 nV/ IO = 150 mA IO = 1 mA 200 0 100 VI = 4.3 V Co = 4.7 µF C(SR) = 0.47 µF 1k 10 k f – Frequency – Hz 100 k 2 100 VI = 4.3 V VO = 3.3 V IO = 150 mA Co = 10 µF BW = 200Hz to 100 kHz 80 40 0.01 0.1 C(sr) – Slew Rate Capacitance – µF Ripple Rejection – dB V DO – Dropout Voltage – V VI = 4.3 V VO = 3.3 V Co = 10 µF C(SR) = 0.47 µF 100 90 80 IO = 1 mA 70 60 IO = 150 mA 50 30 20 35 50 65 80 95 110 125 TA – Free-Air Temperature – °C Figure 7 4 IO = 1 mA 0.4 IO = 150 mA 20 10 100 1k 100 100 k 1k 10 k f – Frequency – Hz 1M OUTPUT VOLTAGE, ENABLE VOLTAGE vs TIME (START-UP) 40 –40 –25 –10 5 0.6 Figure 6 50 0 1 0.8 10 1 RIPPLE REJECTION vs FREQUENCY 110 IO = 1 mA 1.2 0 120 100 1.4 0.2 20 0.001 DROPOUT VOLTAGE vs FREE-AIR TEMPERATURE IO = 150 mA 1.6 Figure 5 VCC = 3.2 V 150 VI = 4.3 V Co = 4.7 µF 1.8 60 Figure 4 200 OUTPUT IMPEDANCE vs FREQUENCY ROOT MEAN SQUARED OUTPUT NOISE vs SLEW RATE CAPACITANCE Enable Voltage – V Output Spectral Noise Density – 300 Figure 3 Z o – Output Impedance – Ω OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY 100 –40 –25 –10 5 20 35 50 65 80 95 110 125 TA – Free-Air Temperature – °C Figure 2 RMS – Root Mean Squared Output Noise – µ V (RMS) Figure 1 0 10 k f – Frequency – Hz Figure 8 www.ti.com 100 k 1M V O – Output Voltage – V 0 5 0 3 VI = 4.3 V VO = 3.3 V IO = 150 mA C(SR) = 0.47 µF Co = 10 µF TJ = 25°C 2 1 0 0 100 200 300 400 500 600 700 800 900 1000 t – Time – ms Figure 9 TPS78825, TPS78833 SLVS382A – JUNE 2001 – REVISED JULY 2001 C(SR) = 0.1 µF 2 VI = 4.3 V VO = 3.3 V IO = 150 mA Co = 10 µF TJ = 25°C 1 0 10 20 30 40 50 60 70 80 90 100 t – Time – ms 0.2 V dv = µs dt 20 0 –20 5.3 4.3 0 20 40 60 80 100 120 140 160 180 200 Figure 10 100 0 50 0 –50 VI = 4.3 V VO = 3.3 V Co = 10 µF –100 0 20 60 80 100 120 140 160 180 200 40 t – Time – µs Figure 12 TYPICAL REGIONS OF STABILITY EQUIVALENT SERIES RESISTANCE (ESR) vs OUTPUT CURRENT 100 VI = 4.3 V VO = 3.3 V Co = 4.7 µF Region of Instability 1 Region of Stability 0.1 0.075 A dI = µs dt 200 Figure 11 TYPICAL REGIONS OF STABILITY EQUIVALENT SERIES RESISTANCE (ESR) vs OUTPUT CURRENT 10 LOAD TRANSIENT RESPONSE t – Time – µs ESR – Equivalent Series Resistance – Ω 0 VO = 3.3 V Co = 10 µF I O – Output Current – mA C(SR) = 0.01 µF 3 LINE TRANSIENT RESPONSE ∆ V – Change In O Output Voltage – mV 0 V O – Output Voltage – mV 5 ESR – Equivalent Series Resistance – Ω V O – Output Voltage – V Enable Voltage – V OUTPUT VOLTAGE, ENABLE VOLTAGE vs TIME (START-UP) V I – Input Voltage – V TYPICAL CHARACTERISTICS 100 VI = 4.3 V VO = 3.3 V Co = 10 µF Region of Instability 10 1 Region of Stability 0.1 0 60 90 120 150 0 IO – Output Current – mA 60 90 120 IO – Output Current – mA 150 Figure 14 Figure 13 www.ti.com 5 TPS78825, TPS78833 SLVS382A – JUNE 2001 – REVISED JULY 2001 APPLICATION INFORMATION The TPS788xx family of low-dropout (LDO) regulators has been optimized for use in battery-operated equipment. It features extremely low dropout voltages, low output noise, low quiescent current (17 µA typically), and enable inputs to reduce supply currents to 1 µA when the regulator is turned off. A typical application circuit is shown in Figure 15. 1 VI IN SR OUT 1 µF 4 5 VO 3 0.01 µF EN + GND 4.7 µF ESR = 0.2 Ω 2 Figure 15. Typical Application Circuit external capacitor requirements Although not required, a 0.047-µF or larger ceramic input bypass capacitor, connected between IN and GND and located close to the TPS788xx, is recommended to improve transient response and noise rejection. A higher-value electrolytic input capacitor may be necessary if large, fast-rise-time load transients are anticipated and the device is located several inches from the power source. Like all low dropout regulators, the TPS788xx requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance is 4.7 µF. The ESR (equivalent series resistance) of the capacitor should be between 0.2 Ω and 10 Ω. to ensure stability. Capacitor values larger than 4.7 µF are acceptable, and allow the use of smaller ESR values. Capacitances less than 4.7 µF are not recommended because they require careful selection of ESR to ensure stability. Solid tantalum electrolytic, aluminum electrolytic, and multilayer ceramic capacitors are all suitable, provided they meet the requirements described above. Most of the commercially available 4.7 µF surface-mount solid tantalum capacitors, including devices from Sprague, Kemet, and Nichico, meet the ESR requirements stated above. Multilayer ceramic capacitors may have very small equivalent series resistances and may thus require the addition of a low value series resistor to ensure stability. CAPACITOR SELECTION PART NO. MAX ESR† SIZE (H × L × W)† MFR. VALUE T494B475K016AS Kemet 4.7 µF 1.5 Ω 1.9 × 3.5 × 2.8 195D106x0016x2T Sprague 10 µF 1.5 Ω 1.3 × 7.0 × 2.7 695D106x003562T Sprague 10 µF 1.3 Ω 2.5 × 7.6 × 2.5 TPSC475K035R0600 AVX 4.7 µF 0.6 Ω 2.6 × 6.0 × 3.2 † Size is in mm. The ESR maximum resistance is in Ohms at 100 kHz and TA = 25°C. Contact the manufacturer for the minimum ESR values. 6 www.ti.com TPS78825, TPS78833 SLVS382A – JUNE 2001 – REVISED JULY 2001 APPLICATION INFORMATION external capacitor requirements (continued) The external bypass capacitor, used in conjunction with an internal resistor to form a low-pass filter, should be a low ESR ceramic capacitor. For example, the TPS78833 exhibits only 56 µVRMS of output voltage noise using a 0.01 µF ceramic bypass capacitor and a 10-µF ceramic output capacitor. Note that the output will start up slower as the bypass capacitance increases due to the RC time constant at the bypass pin that is created by the internal 150-kΩ resistor and external capacitor. power dissipation and junction temperature Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or equal to PD(max). The maximum-power-dissipation limit is determined using the following equation: P T max * T A + J D(max) R θJA Where: TJmax is the maximum allowable junction temperature. RθJA is the thermal resistance junction-to-ambient for the package, see the dissipation rating table. TA is the ambient temperature. The regulator dissipation is calculated using: P D ǒ Ǔ + V *V I O I O Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the thermal protection circuit. regulator protection The TPS788xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might be appropriate. The TPS788xx features internal current limiting and thermal protection. During normal operation, the TPS78833 limits output current to approximately 350 mA. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds approximately 165°C, thermal-protection circuitry shuts it down. Once the device has cooled down to below approximately 140°C, regulator operation resumes. www.ti.com 7 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TPS78825DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 PGZI TPS78825DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 PGZI TPS78833DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 PGTI TPS78833DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 PGTI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of