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TPS7B6933, TPS7B6950
SLVSDI2 – APRIL 2016
TPS7B69xx 150-mA, 40-V Ultralow-Quiescent-Current LDO
1 Features
2 Applications
•
•
•
•
•
1
•
•
•
•
•
•
•
•
•
4-V to 40-V Wide VI Input Voltage Range With up
to 45-V Transient
Maximum Output Current: 150 mA
Low Quiescent Current (IQ):
– 15 µA Typical at Light Loads
– 25 µA Maximum Under Full Temperature
450-mV Typical Low Dropout Voltage at 100 mA
Load Current
10-mV Line Regulation Maximum
20-mV Load Regulation Maximum
Stable With Low-ESR Ceramic Output Capacitor
(2.2 µF to 100 µF)
Fixed 3.3-V and 5-V Output Voltage Options
Integrated Fault Protection:
– Thermal Shutdown
– Short-Circuit Protection
Packages:
– 5-Pin SOT-23 Package
– 4-Pin SOT-223 Package
E-meters, Water Meters and Gas Meters
Appliances and White Goods
Fire Alarm, Smoke Detector
Medical, Health, and Fitness Applications
3 Description
The TPS7B69xx device is a low-dropout linear
regulator that operates at up to 40-V VI. With only
15-µA (typical) quiescent current at light load, the
device is applicable for standby microcontrol-unit
systems, especially for always-on applications like emeters, fire alarms, and smoke detectors.
The devices have integrated short-circuit and
overcurrent protection. The TPS7B69xx device
operates over a –40°C to 105°C temperature range.
Device Information(1)
PART NUMBER
PACKAGE
TPS7B6933
TPS7B6950
BODY SIZE (NOM)
SOT-223 (4)
6.50 mm × 3.50 mm
SOT-23 (5)
2.90 mm × 1.60 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Typical Application Schematic
TPS7B69xx
IN
Vbat
OUT
VO
VI
10 µF
GND
Vreg
4.7 µF
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS7B6933, TPS7B6950
SLVSDI2 – APRIL 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
4
5
5
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
7.4 Device Functional Modes........................................ 10
8
Application and Implementation ........................ 11
8.1 Application Information............................................ 11
8.2 Typical Application .................................................. 11
9 Power Supply Recommendations...................... 13
10 Layout................................................................... 13
10.1 Layout Guidelines ................................................. 13
10.2 Layout Example .................................................... 13
11 Device and Documentation Support ................. 14
11.1
11.2
11.3
11.4
11.5
Detailed Description .............................................. 9
7.1 Overview ................................................................... 9
7.2 Functional Block Diagram ......................................... 9
7.3 Feature Description................................................... 9
Documentation Support ........................................
Related Links ........................................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
14
14
14
14
14
12 Mechanical, Packaging, and Orderable
Information ........................................................... 14
4 Revision History
2
DATE
REVISION
NOTE
April 2016
*
Initial release
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5 Pin Configuration and Functions
DCY Package
4-Pin SOT-223
Top View
IN
1
GND
2
OUT
DBV Package
5-Pin SOT-23
Top View
4
IN
1
NC
2
GND
3
5
OUT
4
GND
GND
3
NC - No internal connection
Pin Functions
PIN
NAME
GND
NO.
TYPE
SOT-223
SOT-23
DESCRIPTION
2, 4
3, 4
G
Ground reference
IN
1
1
P
Input power-supply voltage
NC
—
2
—
Not connected pin
OUT
3
5
P
Output voltage
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6 Specifications
6.1 Absolute Maximum Ratings
over operating ambient temperature range (unless otherwise noted) (1)
Unregulated input voltage
Regulated output voltage
MIN
MAX
UNIT
IN (2) (3)
–0.3
45
V
(2)
–0.3
7
V
Operating junction temperature range, TJ
–40
125
°C
Storage temperature, Tstg
–65
150
°C
(1)
(2)
(3)
OUT
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to the GND terminal.
Absolute maximum voltage, withstands 45 V for 200 ms.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating ambient temperature range (unless otherwise noted)
MIN
MAX
UNIT
VI
Unregulated input voltage
4
40
VO
Output voltage
0
5.5
V
CO
Output capacitor requirements (1)
2.2
100
µF
ESRCO
Output ESR requirements (2)
TA
Operating ambient temperature range
(1)
(2)
V
0.001
2
Ω
–40
105
°C
The output capacitance range specified in this table is the effective value.
Relevant ESR value at f = 10 kHz
6.4 Thermal Information
TPS7B69xx
THERMAL METRIC
(1) (2)
DCY (SOT-223)
DBV (SOT-23)
4 PINS
5 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
64.2
210.4
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
46.8
126.1
°C/W
RθJB
Junction-to-board thermal resistance
13.3
38.4
°C/W
ψJT
Junction-to-top characterization parameter
6.3
16
°C/W
ψJB
Junction-to-board characterization parameter
13.2
37.5
°C/W
(1)
(2)
4
The thermal data is based on the JEDEC standard high-K profile, JESD 51-7, 2s2p four layer board with 2-oz copper. The copper pad is
soldered to the thermal land pattern. Also correct attachment procedure must be incorporated.
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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6.5 Electrical Characteristics
VIN = 14 V, 1 mΩ < ESR < 2 Ω, TJ = –40°C to 125 °C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY VOLTAGE AND CURRENT (IN)
VI
Input voltage
IQ
Quiescent current
VIN(UVLO)
IN undervoltage detection
Fixed 3.3-V output, IO = 1 mA
Fixed 5-V output, IO = 1 mA
4
40
5.5
40
Fixed 3.3-V version, VI = 4 to 40 V, , IO = 0.2 mA
Fixed 5-V version, VI = 5.5 to 40 V, IO = 0.2 mA
15
Ramp VI up until the output turns on
V
25
µA
3.65
Ramp VI down until the output turns OFF
V
3
REGULATED OUTPUT (OUT)
Fixed 3.3-V version, VI = 5 to 40 V, IO = 1 to 150 mA
–3%
3%
Fixed 5-V version, VI = 6.5 to 40 V, IO = 1 to 150 mA
–3%
3%
VO
Regulated output
ΔVO(ΔVI)
Line regulation
VI = 6 to 40 V, ∆VO, IO = 10 mA
10
mV
ΔVO(ΔIL)
Load regulation
IO = 1 to 150 mA, ∆VO
20
mV
Fixed 3.3-V version, VI – VO, IO = 50 mA
VDROP
Dropout voltage
799
Fixed 3.3-V version, VI – VO, IO = 100 mA
800
Fixed 5-V version, VI – VO, IO = 50 mA
220
400
Fixed 5-V version, VI – VO, IO = 100 mA
450
800
IO
Output current
VO in regulation
IOCL
Output current-limit
OUT short to ground
PSRR
Power supply ripple
rejection (1)
Vrip = 0.5 Vpp, Load = 10 mA, ƒ = 100 Hz, CO = 2.2 µF
mV
0
150
mA
150
500
mA
60
dB
175
°C
25
°C
OPERATING TEMPERATURE RANGE
Tsd
Junction shutdown
temperature
Thys
Hysteresis of thermal
shutdown
(1)
Design Information—Not tested, ensured by characterization.
6.6 Typical Characteristics
6
3.8
IO = 1 mA
IO = 80 mA
5.8
IO = 1 mA
IO = 80 mA
3.6
5.4
Output Voltage (V)
Output Voltage (V)
5.6
5.2
5
4.8
4.6
4.4
3.4
3.2
3
4.2
4
-40
-20
0
20
40
60
80
Ambient Temperature (qC)
100
120
2.8
-40
-20
D001
0
20
40
60
80
Ambient Temperature (qC)
100
120
D002
VI = 14 V
Figure 1. 5-V Output Voltage vs Ambient Temperature
Figure 2. 3.3-V Output Voltage vs t Temperature
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Typical Characteristics (continued)
6
4
3.5
5
Output Voltage (V)
Output Voltage (V)
3
4
3
2
2.5
2
1.5
1
1
0.5
0
0
0
5
10
15
20
25
Supply Voltage (V)
30
35
40
0
5
10
15
20
25
Supply Voltage (V)
D003
IO = 0 mA
Figure 3. 5-V Output Voltage vs Supply Voltage
D008
Figure 4. 3.3-V Output Voltage vs Supply Voltage
40qC
25qC
105qC
25
120
Quiescent Current (PA)
Quiescent Current (PA)
40
30
140
100
80
60
40
40qC
25qC
105qC
20
20
15
10
5
0
0
0
30
60
90
Output Current (mA)
120
150
0
5
10
15
20
25
Supply Voltage (V)
D009
VI = 14 V
30
35
40
D010
IO = 0.2 mA
Figure 5. Quiescent Current vs Output Current
Figure 6. Quiescent Current vs Supply Voltage
1100
80
Power Supply Rejection Ratio (dB)
1000
900
Dropout Voltage (mV)
35
IO = 0 mA
160
800
700
600
500
400
300
200
40qC
25qC
105qC
100
0
0
20
40
60
80
100
Output Current (mA)
120
140
160
70
60
50
40
30
20
10
0
1E+1
1E+2
D004
IO = 100 mA
CO = 2.2 µF
Figure 7. Dropout Voltage vs Output Current
6
30
1E+3
1E+4
1E+5
Frequency (Hz)
VI = 14 V
1E+6
1E+7 5E+7
D005
TA = 25°C
Figure 8. Power Supply Rejection Ratio
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Typical Characteristics (continued)
100
80
80
70
Load Capacitance (µF)
Power Supply Rejection Ratio (dB)
90
60
50
40
30
20
60
Stable Region
40
20
10
0
1E+1
2.2
1E+2
IO = 10 mA
CO = 2.2 µF
1E+3
1E+4
1E+5
Frequency (Hz)
VI = 14 V
1E+6
0.001
1E+7 5E+7
D006
0.5
1
1.5
ESR of Output Capacitance (Ω)
2
D007
TA = 25°C
Figure 9. Power Supply Rejection Ratio
Figure 10. ESR Stability vs Output Capacitance
VO (AC)
100 mV/div
VO (AC)
100 mV/div
IO (DC)
50 mA/div
IO (DC)
50 mA/div
VI = 14 V
VO = 5 V
CO = 2.2 µF
1 ms/div
VI = 14 V
VO = 3.3 V
Figure 11. Load Transient (1 to 100 mA, 5 V)
CO = 2.2 µF
1 ms/div
Figure 12. Load Transient (1 to 100 mA, 3.3 V)
VO (AC)
100 mV/div
VO (AC)
100 mV/div
IO (DC)
50 mA/div
IO (DC)
50 mA/div
VI = 14 V
VO = 5 V
CO = 2.2 µF
1 ms/div
VI = 14 V
VO = 3.3 V
CO = 2.2 µF
1 ms/div
Figure 14. Load Transient (1 to 150 mA, 3.3 V)
Figure 13. Load Transient (1 to 150 mA, 5 V)
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Typical Characteristics (continued)
VO
20 mV/div
VO
20 mV/div
VI
5 V/div
VI
5 V/div
VI = 9 to 16 V
IO = 10 mA
CO = 2.2 µF
1 ms/div
VI = 9 to 16 V
IO = 10 mA
CO = 2.2 µF
1 ms/div
Figure 16. Line Transient (VO = 3.3 V)
Figure 15. Line Transient (VO = 5 V)
VI
5 V/div
VI
5 V/div
VO
1 V/div
VO
2 V/div
CO = 2.2 µF, 400 µs/div
Figure 17. 5-V Power Up
8
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CO = 2.2 µF, 400 µs/div
Figure 18. 3.3-V Power Up
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7 Detailed Description
7.1 Overview
The TPS7B69xx high-voltage linear regulator operates across a 4-V to 40-V input-voltage range. The device has
an output current capacity of 150 mA and fixed output voltages of 3.3 V (TPS7B6933) or 5 V (TPS7B6950). The
device features thermal shutdown and short-circuit protection to prevent damage during overtemperature and
overcurrent conditions.
7.2 Functional Block Diagram
IN
OUT
Overcurrent
detection
UVLO
Regulator
control
Band gap
Thermal
shutdown
+
Vref
GND
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7.3 Feature Description
7.3.1 Input (IN)
The IN pin is a high-voltage-tolerant pin. TI recommends that a capacitor with a value higher than 0.1 µF be
connected near this pin to improve the transient performance.
7.3.2 Output (OUT)
The OUT pin is the regulated output based on the required voltage. The output has current limitation. During the
initial power up, the regulator has a soft start incorporated to control the initial current through the pass element
and the output capacitor.
In the event that the regulator drops out of regulation, the output tracks the input minus a drop based on the load
current. When the input voltage drops below the UVLO threshold, the regulator shuts down until the input voltage
recovers above the minimum start-up level.
7.3.3 Output Capacitor Selection
For stable operation over the full temperature range and with load currents up to 150 mA, use a capacitor with an
effective value between 2.2 µF and 100 µF and ESR smaller than 2 Ω. To improve the load-transient
performance, an output capacitor, such as a ceramic capacitor with low ESR, is recommended.
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Feature Description (continued)
7.3.4 Low-Voltage Tracking
At low input voltages, the regulator drops out of regulation and the output voltage tracks input minus a voltage
based on the load current (IL) and switch resistor. This tracking allows for a smaller input capacitor and can
possibly eliminate the need for a boost converter during cold-crank conditions.
7.3.5 Thermal Shutdown
The TPS7B69xx family of devices incorporates a thermal-shutdown (TSD) circuit as a protection from
overheating. For continuous normal operation, the junction temperature should not exceed the TSD trip point. If
the junction temperature exceeds the TSD trip point, the output turns off. When the junction temperature falls
below the TSD trip point minus the hysteresis of TSD, the output turns on again. This cycling limits the
dissipation of the regulator, protecting it from damage as a result of overheating.
The purpose of the design of the internal protection circuitry of the TPS7B69xx family of devices is for protection
against overload conditions, not as a replacement for proper heat-sinking. Continuously running the TPS7B69xx
family of devices into thermal shutdown degrades device reliability.
7.4 Device Functional Modes
7.4.1 Operation With VI Less Than 4 V
The TPS7B69xx family of devices operates with input voltages above 4 V. The maximum UVLO voltage is 3 V
and the device operates at an input voltage above 4 V. The device can also operate at lower input voltages; no
minimum UVLO voltage is specified. At input voltages below the actual UVLO, the device shuts down.
7.4.2 Operation With VI Greater Than 4 V
When VI is greater than 4 V, if the input voltage is higher than VO plus the dropout voltage, the output voltage is
equal to the set value. Otherwise, the output voltage is equal to VI minus the dropout voltage.
10
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TPS7B69xx family of devices is a 150-mA low-dropout linear regulator designed for up to 40-V VI operation
with only 15-µA quiescent current at light loads. Use the PSpice transient model to evaluate the base function of
the device. To download the PSpice transient model, go to the device product folder on www.TI.com. In addition
to this model, specific evaluation modules (EVM) are available for these devices. For the EVM and the EVM user
guide, go to the device product folder.
8.2 Typical Application
Figure 19 shows the typical application circuit for the TPS7B69xx family of devices. Based on the endapplication, different values of external components can be used. An application can require a larger output
capacitor during fast load steps to achieve better load transient response. TI recommends a low-ESR ceramic
capacitor with a dielectric of type X5R or X7R for better load transient response.
TPS7B69xx
IN
Vbat
OUT
VO
VI
10 µF
GND
Vreg
4.7 µF
Copyright © 2016, Texas Instruments Incorporated
Figure 19. Typical Application Schematic for TPS7B69xx
8.2.1 Design Requirements
For this design example, use the parameters listed in Table 1.
Table 1. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUES
Input voltage range
4 V to 40 V
Output voltage
3.3 V, 5 V
Output current rating
150 mA
Output capacitor range
2.2 µF to 100 µF
Output capacitor ESR range
1 mΩ to 2 Ω
8.2.2 Detailed Design Procedure
To
•
•
•
begin the design process, determine the following:
Input voltage range
Output voltage
Output current rating
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8.2.2.1 Input Capacitor
The device requires an input decoupling capacitor, the value of which depends on the application. The typical
recommend value for the decoupling capacitor is higher than 0.1 µF. The voltage rating must be greater than the
maximum input voltage.
8.2.2.2 Output Capacitor
The device requires an output capacitor to stabilize the output voltage. The output capacitor value should be
between 2.2 µF and 100 µF. The ESR value range should be between 1 mΩ and 2 Ω. TI recommends a ceramic
capacitor with low ESR to improve the load-transient response.
8.2.2.3 Power Dissipation and Thermal Considerations
Use Equation 1 to calculate the power dissipated in the device.
PD = I O ´ (VI - VO ) + I Q ´ VI
where
•
•
•
•
PD = continuous power dissipation
IO = output current
VI = input voltage
VO = output voltage
(1)
Because IQ « IO, the term IQ × VI in Equation 1 can be ignored.
For a device under operation at a given ambient air temperature (TA), use Equation 2 to calculate the junction
temperature (TJ).
TJ = TA + (Z qJA ´ P D )
where
ZθJA = junction-to-ambient air thermal impedance
(2)
Use Equation 3 to calculate the rise in junction temperature because of power dissipation.
DT = TJ - TA = (Z qJA ´ PD )
(3)
For a given maximum junction temperature (TJmax), use Equation 4 to calculate the maximum ambient air
temperature (TAmax) at which the device can operate.
TA max = TJmax - (Z qJA ´ PD )
(4)
8.2.3 Application Curve
VI
5 V/div
VO
2 V/div
CO = 2.2 µF, 400 µs/div
Figure 20. Power Up (5 V)
12
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9 Power Supply Recommendations
The device is designed to operate from an input-voltage supply range between 4 V and 40 V. This input supply
must be well regulated. If the input supply is located more than a few inches from the TPS7B69xx device, TI
recommends adding an electrolytic capacitor with a value of 10 µF and a ceramic bypass capacitor at the input.
10 Layout
10.1 Layout Guidelines
For the layout of TPS7B69xx family of devices, place the input and output capacitors near the devices as shown
in Figure 21 and Figure 22. To enhance the thermal performance, TI recommends surrounding the device with
some vias.
Minimize equivalent series inductance (ESL) and ESR to maximize performance and ensure stability. Place
every capacitor as close as possible to the device and on the same side of the PCB as the regulator.
Do not place any of the capacitors on the opposite side of the PCB from where the regulator is installed. TI
strongly discourages the use of long traces because they can impact system performance negatively and even
cause instability.
If possible, and to ensure the maximum performance specified in this product data sheet, use the same layout
pattern used for the TPS7B69xx evaluation board.
10.2 Layout Example
GND
4
1
2
3
IN
GND
OUT
Figure 21. Layout Example for SOT-223 Package
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Layout Example (continued)
1
IN
5
OUT
2
NC
GND
3
4
GND
Figure 22. Layout Example for SOT-23 Package
11 Device and Documentation Support
11.1 Documentation Support
11.1.1 Related Documentation
For related documentation see the following:
TPS7B6950EVM User's Guide, SLVUAC0.
11.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 2. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TPS7B6933
Click here
Click here
Click here
Click here
Click here
TPS7B6950
Click here
Click here
Click here
Click here
Click here
11.3 Trademarks
All trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the mostcurrent data available for the designated devices. This data is subject to change without notice and without
revision of this document. For browser-based versions of this data sheet, see the left-hand navigation pane.
14
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Copyright © 2016, Texas Instruments Incorporated
Product Folder Links: TPS7B6933 TPS7B6950
PACKAGE OPTION ADDENDUM
www.ti.com
7-Jul-2017
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TPS7B6933DBVR
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU
Level-2-260C-1 YEAR
-40 to 105
ZBFY
TPS7B6950DBVR
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU
Level-2-260C-1 YEAR
-40 to 105
ZAZT
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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