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LMA1010

LMA1010

  • 厂商:

    LODEV

  • 封装:

  • 描述:

    LMA1010 - 16 x 16-bit Multiplier-Accumulator - LOGIC Devices Incorporated

  • 数据手册
  • 价格&库存
LMA1010 数据手册
LMA1010/2010 DEVICES INCORPORATED 16 x 16-bit Multiplier-Accumulator LMA1010/2010 DEVICES INCORPORATED 16 x 16-bit Multiplier-Accumulator DESCRIPTION TC, ACC, and SUB controls are latched on the rising edge of the logical OR of CLK A and CLK B. TC specifies the input as two’s complement (TC HIGH) or unsigned magnitude (TC LOW). RND, when HIGH, adds ‘1’ to the most significant bit position of the least significant half of the product. Subsequent truncation of the 16 least The LMA1010 and LMA2010 produce significant bits produces a result the 32-bit product of two 16-bit numbers. correctly rounded to 16-bit preciThe results of a series of multiplications sion. may be accumulated to form the sum of products. Accumulation is performed to ACC and SUB control accumulator 35-bit precision with the multiplier prod- operation. ACC HIGH results in addition of the multiplier product and uct sign extended as appropriate. the accumulator contents, with the result Data present at the A and B input regis- stored in the accumulator register on the ters is latched on the rising edges of rising edge of CLK R. ACC and SUB CLK A and CLK B respectively. RND, HIGH results in subtraction of the accumulator contents from the multiplier product, with the result stored B 15-0 in the accumulator register. With ACC A 15-0 R 15-0 16 LOW and SUB LOW, no accumulation 16 occurs and the next product is loaded A REGISTER B REGISTER directly into the accumulator register. ACC LOW and SUB HIGH is undefined. The L MA1010 a nd L MA2010 a re high-speed, low power 16-bit multiplier-accumulators. The LMA1010 and LMA2010 are functionally identical; they differ only in packaging. Full military ambient temperature range operation is achieved with advanced CMOS technology. The LMA1010/2010 output register (accumulator register) is divided into three independently controlled sections. The least significant result (LSR) and most significant result (MSR) registers are 16 bits in length. The extended result register (XTR) is 3 bits long. The output signals R15-0 and input signals B15-0 share the same bidirectional pins. Each output register has an independent output enable control. In addition to providing three-state control of the output buffers, when OEX, OEM, or OEL are HIGH and PREL is HIGH, data can be preloaded via the bidirectional output pins into the respective output registers. Data present on the output pins is latched on the rising edge of CLK R. The interrelation of PREL and the enable controls is summarized in Table 1. FEATURES u 20 ns Multiply-Accumulate Time u Replaces Fairchild TMC2210, Cypress CY7C510, IDT 7210L, and AMD Am29510 u Two’s Complement or Unsigned Operands u Accumulator Performs Preload, Accumulate, and Subtract u Three-State Outputs u 68-pin PLCC, J-Lead LMA1010/2010 BLOCK DIAGRAM CLK A CLK B TC ACC SUB REGISTER RND 32 R R+A A 35 OEX OEM OEL PREL 3 OEX OEM OEL PRELOAD CONTROL LOGIC 3 LEX LEM LEL R–A PASS R LEX 35 3 LEM 16 LEL 16 CLK R ACCUMULATOR REGISTER OEX 3 R 34-32 OEM 16 R 31-16 OEL 16 Multiplier-Accumulators 1 08/16/2000–LDS.10/2010-P LMA1010/2010 DEVICES INCORPORATED 16 x 16-bit Multiplier-Accumulator FIGURE 1A. INPUT FORMATS AIN BIN Fractional Two’s Complement (TC = 1) 15 14 13 –20 2–1 2–2 (Sign) TABLE 1. PRELOAD TRUTH TABLE PREL OEX L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H OEM L L H H L L H H L L H H L L H H OEL L H L H L H L H L H L H L H L H XTR OUT OUT OUT OUT Z Z Z Z Z Z Z Z PREL PREL MSR LSR OUT OUT OUT Z Z Z OUT Z 210 2–13 2–14 2–15 15 14 13 –20 2–1 2–2 (Sign) 210 2–13 2–14 2–15 OUT OUT OUT Z Z Z Z PREL Z OUT Z Z PREL Z Integer Two’s Complement (TC = 1) 15 14 13 –215 214 213 (Sign) 210 22 21 20 15 14 13 –215 214 213 (Sign) 210 22 21 20 Unsigned Fractional (TC = 0) 15 14 13 2–1 2–2 2–3 210 2–14 2–15 2–16 15 14 13 2–1 2–2 2–3 210 2–14 2–15 2–16 PREL PREL Z Z Z PREL Z PREL PREL PREL PREL PREL Unsigned Integer (TC = 0) 15 14 13 215 214 213 210 22 21 20 15 14 13 215 214 213 210 22 21 20 PREL = Preload data to appropriate register OUT = Register available on output pins Z = High impedance state FIGURE 1B. OUTPUT FORMATS XTR MSR Fractional Two’s Complement 34 33 32 –24 23 22 (Sign) LSR 31 30 29 21 20 2–1 18 17 16 2–12 2–13 2–14 15 14 13 2–15 2–16 2–17 210 2–28 2–29 2–30 Integer Two’s Complement 34 33 32 –234 233 232 (Sign) 31 30 29 231 230 229 18 17 16 218 217 216 Unsigned Fractional 15 14 13 215 214 213 210 22 21 20 34 33 32 22 21 20 31 30 29 2–1 2–2 2–3 18 17 16 2–14 2–15 2–16 Unsigned Integer 15 14 13 2–17 2–18 2–19 210 2–30 2–31 2–32 34 33 32 234 233 232 31 30 29 231 230 229 18 17 16 218 217 216 15 14 13 215 214 213 210 22 21 20 Multiplier-Accumulators 2 08/16/2000–LDS.10/2010-P LMA1010/2010 DEVICES INCORPORATED 16 x 16-bit Multiplier-Accumulator MAXIMUM RATINGS Above which useful life may be impaired (Notes 1, 2, 3, 8) Storage temperature ........................................................................................................... –65°C to +150°C Operating ambient temperature ........................................................................................... –55°C to +125°C VCC supply voltage with respect to ground ............................................................................ –0.5 V to +7.0 V Input signal with respect to ground ........................................................................................ –3.0 V to +7.0 V Signal applied to high impedance output ............................................................................... –3.0 V to +7.0 V Output current into low outputs ............................................................................................................. 25 mA Latchup current ............................................................................................................................... > 400 mA OPERATING CONDITIONS To meet specified electrical and switching characteristics Mode Active Operation, Commercial Active Operation, Military Temperature Range (Ambient) 0°C to +70°C –55°C to +125°C Supply Voltage 4.75 V ≤ VCC ≤ 5.25 V 4.50 V ≤ VCC ≤ 5.50 V ELECTRICAL CHARACTERISTICS Over Operating Conditions (Note 4) Symbol VOH VOL VIH VIL IIX IOZ ICC1 ICC2 Parameter Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Input Current Output Leakage Current VCC Current, Dynamic VCC Current, Quiescent (Note 3) Test Condition VCC = Min., IOH = –2.0 mA VCC = Min., IOL = 8.0 mA Min 2.4 Typ Max Unit V 0.5 2.0 0.0 VCC 0.8 ±20 ±20 12 25 1.0 V V V µA µA mA mA Ground ≤ VIN ≤ VCC (Note 12) Ground ≤ VOUT ≤ VCC (Note 12) (Notes 5, 6) (Note 7) Multiplier-Accumulators 3 08/16/2000–LDS.10/2010-P 432109876543210987654321 432109876543210987654321 432109876543210987654321 *DISCONTINUED SPEED GRADE Symbol Symbol *includes OEX, OEM, OEL 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 Min Max Min Max Min Max Min Max Min Max Min Max 20 20 20 2 2 DEVICES INCORPORATED COMMERCIAL OPERATING RANGE (0°C to +70°C) Notes 9, 10 (ns) SWITCHING CHARACTERISTICS 16 x 16-bit Multiplier-Accumulator LMA1010/2010– 45* 35* 1098765432 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 10987654321 1 10987654321 10 10 2 2 9 09876543218765432109876543210987654321 9 09876543298765432109876543210987654321 1 09876543298765432109876543210987654321 9 1 09876543218765432109876543210987654321 09876543298765432109876543210987654321 1 09876543218765432109876543210987654321 9 1 09876543218765432109876543210987654321 9 09876543218765432109876543210987654321 9 09876543298765432109876543210987654321 9 09876543218765432109876543210987654321 09876543218765432109876543210987654321 9 1 09876543218765432109876543210987654321 9 09876543298765432109876543210987654321 9 09876543218765432109876543210987654321 09876543298765432109876543210987654321 9 1 09876543218765432109876543210987654321 1 09876543218765432109876543210987654321 9 09876543298765432109876543210987654321 9 09876543218765432109876543210987654321 09876543298765432109876543210987654321 9 1 09876543218765432109876543210987654321 1 09876543218765432109876543210987654321 9 09876543298765432109876543210987654321 09876543218765432109876543210987654321 9 09876543298765432109876543210987654321 1 09876543218765432109876543210987654321 9 1 09876543218765432109876543210987654321 9 09876543298765432109876543210987654321 09876543298765432109876543210987654321 9 1 09876543218765432109876543210987654321 09876543218765432109876543210987654321 9 09876543218765432109876543210987654321 9 15 15 15 2 2 SWITCHING WAVEFORMS MILITARY OPERATING RANGE (–55°C to +125°C) Notes 9, 10 (ns) tDIS tENA tD tHP tSP tH tS tPW tMC tENA tD tHP tSP tH tS tPW tMC tDIS CLK R CLK A CLK B PREL R34-0 A15-0 B15-0 OE* Parameter Three-State Output Disable Delay (Note 11) Three-State Output Enable Delay (Note 11) Output Delay Preload Hold Time Preload Setup Time Input Register Hold Time Input Register Setup Time Clock Pulse Width Clocked Multiply Time Parameter Three-State Output Disable Delay (Note 11) Three-State Output Enable Delay (Note 11) Output Delay Preload Hold Time Preload Setup Time Input Register Hold Time Input Register Setup Time Clock Pulse Width Clocked Multiply Time tSP PRELOAD tHP tPW tS Min Max Min Max Min Max Min Max Min Max Min Max tDIS 75* 65* 4 30 30 30 65 35 35 35 75 tH tPW HIGH IMPEDANCE tPW 15 15 15 15 15 15 2 2 2 2 55* 65* 25 25 30 55 25 30 30 65 tMC 15 12 12 15 15 15 2 2 2 2 LMA1010/2010– 55* 40* tENA 25 25 25 45 25 30 30 55 Multiplier-Accumulators 10 12 12 15 15 15 2 2 2 2 25 25 25 35 25 25 25 40 tD LMA1010/2010 10 12 12 10 12 12 2 2 2 2 30* 25 08/16/2000–LDS.10/2010-P 20 20 20 25 20 20 20 30 OUTPUT 10 12 12 2 2 25* 20* 18 18 18 20 20 20 20 25 LMA1010/2010 DEVICES INCORPORATED 16 x 16-bit Multiplier-Accumulator NOTES 9. AC specifications are tested with input transition times less than 3 ns, output reference levels of 1.5 V (except tDIS test), and input levels of nominally 0 to 3.0 V. Output loading may be a resistive divider which provides for specified IOH and IOL at an output voltage of VOH min and VOL max 2. The products described by this spec- respectively. Alternatively, a diode ification include internal circuitry de- bridge with upper and lower current signed to protect the chip from damagsources of I OH and I OL respectively, ing substrate injection currents and ac- and a balancing voltage of 1.5 V may be cumulations of static charge. Neverthe- used. Parasitic capacitance is 30 pF less, conventional precautions should minimum, and may be distributed. be observed during storage, handling, and use of these circuits in order to This device has high-speed outputs caavoid exposure to excessive electrical pable of large instantaneous current stress values. pulses and fast turn-on/turn-off times. As a result, care must be exercised in the 3. This device provides hard clamping of testing of this device. The following transient undershoot and overshoot. In- measures are recommended: put levels below ground or above VCC will be clamped beginning at –0.6 V and a. A 0.1 µF ceramic capacitor should be VCC + 0.6 V. The device can withstand installed between VCC and Ground indefinite operation with inputs in the leads as close to the Device Under Test range of –0.5 V to +7.0 V. Device opera- (DUT) as possible. Similar capacitors tion will not be adversely affected, how- should be installed between device VCC ever, input current levels will be well in and the tester common, and device ground and tester common. excess of 100 mA. 4. Actual test conditions may vary from b. Ground and VCC supply planes those designated but operation is guar- must be brought directly to the DUT anteed as specified. socket or contactor fingers. 5. Supply current for a given applica- c. Input voltages should be adjusted to tion can be accurately approximated by: compensate for inductive ground and VCC noise to maintain required DUT input NCV2 F levels relative to the DUT ground pin. where 4 10. Each parameter is shown as a minimum or maximum value. Input requirements are specified from the point of view of the external system driving the chip. Setup time, for example, is specified as a minimum since the exter6. Tested with all outputs changing ev- nal system must supply at least that ery cycle and no load, at a 5 MHz clock much time to meet the worst-case requirements of all parts. Responses from rate. the internal circuitry are specified from 7. Tested with all inputs within 0.1 V of the point of view of the device. Output VCC or Ground, no load. delay, for example, is specified as a 8. These parameters are guaranteed maximum since worst-case operation of any device always provides data within but not 100% tested. that time. N = total number of device outputs C = capacitive load per output V = supply voltage F = clock frequency 1. Maximum Ratings indicate stress specifications only. Functional operation of these products at values beyond those indicated in the Operating Conditions table is not implied. Exposure to maximum rating conditions for extended periods may affect reliability. 11. For the tENA test, the transition is measured to the 1.5 V crossing point with datasheet loads. For the tDIS test, the transition is measured to the ±200mV level from the measured steady-state output voltage with ±10mA loads. The balancing voltage, V TH , is set at 3.5 V for Z-to-0 and 0-to-Z tests, and set at 0 V for Zto-1 and 1-to-Z tests. 12. These parameters are only tested at the high temperature extreme, which is the worst case for leakage current. FIGURE A. OUTPUT LOADING CIRCUIT DUT S1 IOL CL IOH VTH FIGURE B. THRESHOLD LEVELS tENA OE Z 0 1.5 V 1.5 V 1.5 V tDIS 3.5V Vth VOL* 0.2 V 0 1 Z Z 1.5 V VOH* 0.2 V Z 1 0V Vth VOL* Measured VOL with IOH = –10mA and IOL = 10mA VOH* Measured VOH with IOH = –10mA and IOL = 10mA Multiplier-Accumulators 5 08/16/2000–LDS.10/2010-P 210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 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210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 DEVICES INCORPORATED Speed –55°C to +125°C — MIL-STD-883 COMPLIANT –55°C to +125°C — COMMERCIAL SCREENING 0°C to +70°C — COMMERCIAL SCREENING LMA1010 — ORDERING INFORMATION 64-pin A6 A5 A4 A3 A2 A1 A0 B0, R0 B1, R1 B2, R2 B3, R3 B4, R4 B5, R5 B6, R6 B7, R7 GND B8, R8 B9, R9 B10, R10 B11, R11 B12, R12 B13, R13 B14, R14 B15, R15 R16 R17 R18 R19 R20 R21 R22 R23 Sidebraze Hermetic DIP (D6) Discontinued Package 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 A7 A8 A9 A10 A11 A12 A13 A14 A15 OEL RND SUB ACC CLK A CLK B VCC TC OEX PREL OEM CLK R R34 R33 R32 R31 R30 R29 R28 R27 R26 R25 R24 6 68-pin G H D C K E B A F L J 16 x 16-bit Multiplier-Accumulator GND B/R7 B/R9 B/R8 B/R6 B/R5 B/R4 B/R3 B/R2 B/R1 B/R15 B/R14 B/R13 B/R12 B/R11 B/R10 NC 1 R17 R16 NC 2 B/R0 R19 R18 A0 3 Ceramic Pin Grid Array (G2) Discontinued Package R21 R20 (i.e., Component Side Pinout) A2 A1 Multiplier-Accumulators 4 Through Package R23 R22 A4 A3 5 Top View R25 R24 A6 A5 6 R27 R26 A8 A7 7 LMA1010/2010 R29 R28 A10 A9 8 08/16/2000–LDS.10/2010-P R31 R30 A12 A11 9 CLK A ACC OEX SUB RND OEL OEM PREL VCC CLK B R32 A14 A13 R34 CLK R NC 10 R33 A15 NC TC 11 LMA1010/2010 DEVICES INCORPORATED 16 x 16-bit Multiplier-Accumulator LMA2010 — ORDERING INFORMATION 68-pin A15 OEL RND SUB ACC CLK A CLK B VCC VCC VCC VCC TC OEX PREL OEM CLK R R34 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 B0, R0 B1, R1 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 Top View 53 52 51 50 49 48 47 46 45 44 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 B2, R2 B3, R3 B4, R4 B5, R5 B6, R6 B7, R7 GND GND B8, R8 B9, R9 B10, R10 B11, R11 B12, R12 B13, R13 B14, R14 B15, R15 R16 Speed Plastic J-Lead Chip Carrier (J2) 0°C to +70°C — COMMERCIAL SCREENING 35 ns 25 ns LMA2010JC35 LMA2010JC25 –55°C to +125°C — COMMERCIAL SCREENING –55°C to +125°C — MIL-STD-883 COMPLIANT R33 R32 R31 R30 R29 R28 R27 R26 R25 R24 R23 R22 R21 R20 R19 R18 R17 Multiplier-Accumulators 7 08/16/2000–LDS.10/2010-P
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