FDC5614P

FDC5614P 60V P-Channel Logic Level PowerTrench MOSFET General Description Features This 60V P-Channel MOSFET uses Fairchild’s high voltage PowerTrench process. It has been optimized for power management applications. • –3 A, –60 V. Applications • Fast switching speed • DC-DC converters • High performance trench technology for extremely low RDS(ON) • Load switch RDS(ON) = 0.105 Ω @ VGS = –10 V RDS(ON) = 0.135 Ω @ VGS = –4.5 V • Power management D D S SuperSOT TM-6 D D Drain-Source Voltage VGSS Gate-Source Voltage ID Drain Current – Continuous (Note 1a) 3 4 Units –60 V ±20 V –3 A –20 Maximum Power Dissipation TJ, TSTG 5 Ratings – Pulsed PD 2 TA=25oC unless otherwise noted Parameter VDSS 6 G Absolute Maximum Ratings Symbol 1 (Note 1a) 1.6 (Note 1b) 0.8 Operating and Storage Junction Temperature Range W –55 to +150 °C (Note 1a) 78 °C/W (Note 1) 30 °C/W Thermal Characteristics RθJA Thermal Resistance, Junction-to-Ambient RθJC Thermal Resistance, Junction-to-Case Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity .564 FDC5614P 7’’ 8mm 3000 units 2002 Fairchild Semiconductor Corporation FDC5614P Rev C1 (W) FDC5614P February 2002 Symbol TA = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain–Source Breakdown Voltage VGS = 0 V, ID = –250 µA ∆BVDSS ∆TJ IDSS Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current ID = –250 µA, Referenced to 25°C VDS = –48 V, VGS = 0 V –1 µA IGSSF Gate–Body Leakage, Forward VGS = 20V, VDS = 0 V 100 nA IGSSR Gate–Body Leakage, Reverse VGS = –20 V VDS = 0 V –100 nA On Characteristics –60 V –49 mV/°C (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = –250 µA ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance ID = –250 µA,Referenced to 25°C 4 82 105 130 –1 –1.6 –3 V mV/°C ID(on) On–State Drain Current VGS = –10 V, ID = –3 A VGS = –4.5 V, ID = –2.7 A VGS = –10 V, ID = –3 A TJ=125°C VGS = –10 V, VDS = –5 V gFS Forward Transconductance VDS = –5 V, ID = –3 A 8 VDS = –30 V, f = 1.0 MHz V GS = 0 V, 759 pF 90 pF 39 pF 105 135 190 –20 mΩ A S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn–On Delay Time tr Turn–On Rise Time td(off) (Note 2) 7 14 ns 10 20 ns Turn–Off Delay Time 19 34 ns tf Turn–Off Fall Time 12 22 ns Qg Total Gate Charge 15 24 nC Qgs Gate–Source Charge Qgd Gate–Drain Charge VDD = –30 V, VGS = –10 V, VDS = –30V, VGS = –10 V ID = –1 A, RGEN = 6 Ω ID = –3.0 A, 2.5 nC 3.0 nC Drain–Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain–Source Diode Forward Current VSD Drain–Source Diode Forward Voltage VGS = 0 V, IS = –1.3 A (Note 2) –0.8 –1.3 A –1.2 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 78°C/W when mounted on a 1in2 pad of 2oz copper on FR-4 board. b. 156°C/W when mounted on a minimum pad. 2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0% FDC5614P Rev C1 (W) FDC5614P Electrical Characteristics FDC5614P Typical Characteristics 1.8 15 VGS = -10V -6.0V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 12 -4.5V -4.0V -5.0V -3.5V 9 6 -3.0V 3 -2.5V 1 2 3 4 -4.0V 1.4 -4.5V -5.0V 1.2 -6.0V -7.0V -8.0V 1 -10V 0.8 0 0 VGS = -3.5V 1.6 0 5 2 4 6 8 10 -ID, DRAIN CURRENT (A) -VDS, DRAIN-SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.8 0.4 ID = -3.0A VGS = -10V 1.6 ID = -1.5A 0.3 1.4 o TA = 125 C 1.2 0.2 1 0.8 0.1 o TA = 25 C 0.6 0 0.4 -50 -25 0 25 50 75 100 125 150 2 4 6 8 10 -VGS, GATE TO SOURCE VOLTAGE (V) o TJ, JUNCTION TEMPERATURE ( C) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 15 100 o VDS = -5V TA = -55 C VGS = 0V o 25 C 12 10 o TA = 125 C o 125 C 9 1 6 0.1 3 0.01 o 25 C o -55 C 0 0.001 1 2 3 4 -VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 5 0 0.2 0.4 0.6 0.8 1 1.2 1.4 -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDC5614P Rev C1 (W) FDC5614P Typical Characteristics -VGS, GATE-SOURCE VOLTAGE (V) 10 1200 VDS = -10V ID = -3.0A -20V 8 f = 1 MHz VGS = 0 V 1000 -30V 800 CISS 6 600 4 400 2 200 0 0 4 8 12 16 0 10 Qg, GATE CHARGE (nC) 20 30 40 50 60 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics. 100 -ID, DRAIN CURRENT (A) COSS CRSS 0 40 100µs RDS(ON) LIMIT 10 SINGLE PULSE RθJA = 156°C/W TA = 25°C 30 10ms 100ms 1 20 1s 10s VGS = -10V SINGLE PULSE 0.1 10 DC o RθJA = 156 C/W o TA = 25 C 0 0.01 0.1 1 10 0.1 100 1 10 100 1000 t1, TIME (sec) -VDS, DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. 1 D = 0.5 RθJA(t) = r(t) + RθJA RθJA = 156°C/W 0.2 0.1 0.1 0.05 P(pk) 0.02 0.01 t1 0.01 t2 SINGLE PULSE TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient themal response will change depending on the circuit board design. FDC5614P Rev C1 (W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST  FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench  QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER  SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET  VCX™ STAR*POWER is used under license DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H4