NTGS5120P, NVGS5120P
Power MOSFET
−60 V, −2.9 A, Single P−Channel, TSOP−6
Features
• 60 V BVds, Low RDS(on) in TSOP−6 Package
• 4.5 V Gate Rating
• NV Prefix for Automotive and Other Applications Requiring Unique
•
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
This is a Pb−Free Device
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V(BR)DSS
RDS(ON) MAX
111 mW @ −10 V
−60 V
Applications
P−Channel
1 2 5 6
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
−60
V
Gate−to−Source Voltage
VGS
$20
V
ID
−2.5
Continuous Drain
Current (Note 1)
Power Dissipation
(Note 1)
Steady
State
TA = 25°C
tv5s
TA = 25°C
Steady
State
TA = 85°C
−2.0
Power Dissipation
(Note 2)
Pulsed Drain Current
A
4
MARKING
DIAGRAM
1.1
TA = 25°C
W
1.4
TA = 25°C
Steady
State
3
−2.9
PD
tv5s
Continuous Drain
Current (Note 2)
ID
TA = 85°C
TA = 25°C
tp = 10 ms
Operating Junction and Storage Temperature
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
−2.9 A
142 mW @ −4.5 V
• High Side Load Switch
• Power Switch for Printers, Communication Equipment
Parameter
ID MAX
−1.8
A
−1.3
PD
0.6
W
IDM
−20
A
TJ,
TSTG
−55 to
150
°C
TL
260
°C
1
TSOP−6
CASE 318G
STYLE 1
XX MG
G
1
XX
= Device Code
M
= Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
PIN ASSIGNMENT
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq
[2 oz] including traces)
2. Surface−mounted on FR4 board using the minimum recommended pad size.
Drain Drain Source
6 5 4
1
2
3
Drain Drain Gate
ORDERING INFORMATION
See detailed ordering and shipping information ion page 5 of
this data sheet.
© Semiconductor Components Industries, LLC, 2014
August, 2014 − Rev. 1
1
Publication Order Number:
NTGS5120P/D
NTGS5120P, NVGS5120P
THERMAL RESISTANCE MAXIMUM RATINGS
Symbol
Value
Junction−to−Ambient – Steady State (Note 3)
Parameter
RqJA
102
Junction−to−Ambient – t = 5 s (Note 3)
RqJA
77.6
Junction−to−Ambient – Steady State (Note 4)
RqJA
200
Unit
°C/W
3. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces)
4. Surface−mounted on FR4 board using the minimum recommended pad size.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
V(BR)DSS
VGS = 0 V, ID = −250 mA
−60
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current
IDSS
VGS = 0 V,
VDS = −48 V
IGSS
V
TJ = 25°C
−1.0
TJ = 125°C
−5.0
mA
VDS = 0 V, VGS = ±12 V
$100
nA
VDS = 0 V, VGS = ±20 V
$200
nA
−3.0
V
72
111
mW
VGS = −4.5 V, ID = −2.5 A
88
142
VDS = −5.0 V, ID = −6.0 A
10.1
S
942
pF
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
VGS(TH)
VGS = VDS, ID = −250 mA
Drain−to−Source On Resistance
RDS(on)
VGS = −10 V, ID = −2.9 A
Forward Transconductance
gFS
−1.0
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
48
Total Gate Charge
QG(TOT)
18.1
Threshold Gate Charge
QG(TH)
1.2
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
3.6
td(ON)
8.7
VGS = 0 V, f = 1 MHz, VDS = −30 V
VGS = −10 V, VDS = −30 V;
ID = −2.9 A
72
nC
2.7
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
tr
VGS = −10 V, VDS = −30 V,
ID = −1.0 A, RG = 6.0 W
td(OFF)
tf
ns
4.9
38
12.8
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
VSD
Reverse Recovery Time
tRR
Charge Time
Reverse Recovery Charge
VGS = 0 V,
IS = −0.9 A
TJ = 25°C
VGS = 0 V, dIS/dt = 100 A/ms,
IS = −0.9 A
ta
QRR
−0.75
−1.0
V
18.3
ns
15.5
ns
15.1
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%
6. Switching characteristics are independent of operating junction temperatures
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2
NTGS5120P, NVGS5120P
TYPICAL CHARACTERISTICS
−2.8 V
2.5
−3.2 V
−ID, DRAIN CURRENT (A)
−10 V
5.0
TJ = 25°C
3.0
−4.5 V
−2.6 V
2.0
1.5
1.0
−2.4 V
0.5
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
−3.0 V
VGS = −2.2 V
0
0.5
1.0
1.5
2.0
2.5
3.0
3.0
2.0
TJ = −55°C
1.0
TJ = 25°C
TJ = 125°C
0.4
0.9
1.4
1.9
2.4
2.9
3.4
−VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
ID = −2.9 A
TJ = 25°C
0.18
0.16
0.14
0.12
0.10
0.08
0.06
2.0
4.0
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
0.20
0.04
VDS ≥ −10 V
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
−ID, DRAIN CURRENT (A)
3.5
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10
−VGS, GATE−TO−SOURCE VOLTAGE (V)
0.10
3.9
TJ = 25°C
VGS = −4.5 V
0.09
0.08
VGS = −10 V
0.07
0.06
0.05
0.04
1.0
2.0
3.0
4.0
5.0
6.0
7.0
−ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
VGS = 0 V
ID = −2.9 A
VGS = −4.5 V
1.6
−IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
10,000
1.8
1.4
1.2
1.0
TJ = 150°C
1000
TJ = 125°C
100
0.8
0.6
−50
−25
0
25
50
75
100
125
150
10
10
TJ, JUNCTION TEMPERATURE (°C)
20
30
40
50
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
60
NTGS5120P, NVGS5120P
1300
1200
1100
1000
900
800
700
600
500
400
300 Coss
200
100
0 Crss
0
VGS = 0 V
TJ = 25°C
Ciss
10
−VGS, GATE−TO−SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
TYPICAL CHARACTERISTICS
20
40
30
8.0
7.0
6.0
5.0
4.0
3.0
Qgd
Qgs
TJ = 25°C
ID = −2.9 A
Vds = −30 V
2.0
1.0
0
0
2.0
4.0
6.0
8.0
10
12
14
16
QG, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source Voltage vs. Total
Charge
18
1.4
−IS, SOURCE CURRENT (A)
VDD = −30 V
ID = −1.0 A
VGS = −10 V
td(off)
100
tf
td(on)
10
tr
1.0
10
1.0
0.8
0.6
0.4
0.2
0
100
VGS = 0 V
TJ = 25°C
1.2
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
RG, GATE RESISTANCE (W)
−VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
100
ID, DRAIN CURRENT (AMPS)
t, TIME (ns)
Qt
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
1000
1.0
10
9.0
10 ms
10
100 ms
1
0.1
0.01
0.1
1 ms
0 V ≤ VGS ≤ 20 V
SINGLE PULSE
TC = 25°C
10 ms
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
dc
10
1
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
http://onsemi.com
4
100
NTGS5120P, NVGS5120P
Rthja(t), TRANSIENT THERMAL RESPONSE (°C/W)
TYPICAL CHARACTERISTICS
1000
100 D = 0.5
10
1
0.2
0.1
0.05
0.02
0.01
0.1
Single Pulse
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
t, PULSE TIME (s)
Figure 12. Thermal Response
Table 1. ORDERING INFORMATION
Part Number
Marking
(XX)
Package
Shipping†
NTGS5120PT1G
P6
TSOP−6
(Pb−Free)
3000 / Tape & Reel
NVGS5120PT1G
VP6
TSOP−6
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
NTGS5120P, NVGS5120P
PACKAGE DIMENSIONS
TSOP−6
CASE 318G−02
ISSUE V
D
ÉÉÉ
ÉÉÉ
6
E1
1
5
2
H
L2
4
GAUGE
PLANE
E
3
NOTE 5
L
b
C
DETAIL Z
e
SEATING
PLANE
c
A
0.05
M
A1
DETAIL Z
RECOMMENDED
SOLDERING FOOTPRINT*
6X
0.60
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM
LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR
GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D
AND E1 ARE DETERMINED AT DATUM H.
5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE.
MILLIMETERS
DIM
MIN
NOM
MAX
A
0.90
1.00
1.10
A1
0.01
0.06
0.10
b
0.25
0.38
0.50
c
0.10
0.18
0.26
D
2.90
3.00
3.10
E
2.50
2.75
3.00
E1
1.30
1.50
1.70
e
0.85
0.95
1.05
L
0.20
0.40
0.60
L2
0.25 BSC
0°
10°
M
−
STYLE 1:
PIN 1. DRAIN
2. DRAIN
3. GATE
4. SOURCE
5. DRAIN
6. DRAIN
6X
3.20
0.95
0.95
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable
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PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
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Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
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Phone: 81−3−5817−1050
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6
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NTGS5120P/D