NE960R200

PRELIMINARY DATA SHEET N-CHANNEL GaAs MES FET NE960R2 SERIES 0.2 W X, Ku-BAND POWER GaAs MES FET DESCRIPTION The NE960R2 Series are 0.2 W GaAs MES FETs designed for middle power transmitter applications for X, Kuband microwave communication systems. It is capable of delivering 0.2 watt of output power (CW) with high linear gain, high efficiency and low distortion and are suitable as driver amplifiers for our X, Ku-band NEZ Series amplifiers etc. The NE961R200 and the NE960R200 are available in chip form. The NE960R200 has a via hole source grounding and PHS (Plated Heat Sink) for superior RF performance. The NE960R275 is available in a hermetically sealed ceramic package. Reliability and performance uniformity are assured by NEC’s stringent quality and control procedures. FEATURES • High Output Power • High Linear Gain : Po (1 dB) = +25.0 dBm TYP. : 10.0 dB TYP. • High Power Added Efficiency: 35 % TYP. @V DS = 9 V, IDset = 90 mA, f = 14.5 GHz ORDERING INFORMATION Part Number NE960R200 NE961R200 NE960R275 75 Package 00 (CHIP) Supplying Form ESD protective envelope Remark To order evaluation samples, please contact your local NEC sales office. (Part number for sample order: NE960R200, NE960R275, NE961R200) Caution Please handle this device at static-free workstation, because this is an electrostatic sensitive device. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. P13775EJ2V0DS00 (2nd edition) Date Published July 1999 N CP(K) Printed in Japan The mark shows major revised points. © 1998, 1999 NE960R2 SERIES ABSOLUTE MAXIMUM RATINGS (TA = +25°C) Operation in excess of any one of these parameters may result in permanent damage. Parameter Drain to Source Voltage Gate to Source Voltage Drain Current Gate Forward Current Gate Reverse Current Total Power Dissipation Channel Temperature Storage Temperature Symbol VDS VGSO ID IGF IGR PT Tch Tstg Ratings 15 –7 0.35 +2.5 –2.5 2.5 (2.1 175 –65 to +175 Note Unit V V A mA mA ) W °C °C Note NE961R200 RECOMMENDED OPERATING CONDITIONS Parameter Drain to Source Voltage Gain Compression Channel Temperature Symbol VDS Gcomp Tch Test Condition MIN. − − − TYP. 9.0 − − MAX. 9.0 3.0 +130 Unit V dB °C ELECTRICAL CHARACTERISTICS (TA = +25°C, Unless otherwise specified, using NEC standard test fixture.) Parameter Saturated Drain Current Pinch-off Voltage Gate to Drain Break Down Voltage Thermal Resistance Symbol IDSS Vp BVgd Test Conditions VDS = 1.5 V, VGS = 0 V VDS = 2.5 V, ID = 1 mA Igd = 1 mA MIN. 0.09 –2.5 15 − TYP. 0.2 –1.8 − − MAX. 0.35 –0.5 − Unit A V V °C/W Rth Channel to Case 60 Note (70 ) − − − − Output Power at Pin = +15 dBm Output Power at 1 dB Gain Compression Point Power Added Efficiency at PO (1dB) Linear Gain Pout Po (1 dB) f = 14.5 GHz, VDS = 9.0 V Rg = 1 kΩ IDset = 90 mA (RF OFF) 22.0 − − 24.0 25.0 dBm dBm η add GL 35 % 8.0 10.0 dB Note NE961R200 Remark DC and RF performance is 100 % testing. 2 Preliminary Data Sheet P13775EJ2V0DS00 NE960R2 SERIES TYPICAL CHARACTERISTICS (TA = +25°C) OUTPUT POWER AND POWER ADDED EFFICIENCY vs. INPUT POWER 30 60 20 30 15 15 f = 14.5 GHz (1 tone), VDS = 9 V, IDset = 90 mA Rg = 1 kΩ 10 5 10 15 Input Power Pin (dBm) 20 25 0 DRAIN CURRENT AND GAIN vs. INPUT POWER 200 14 Drain Current ID (mA) 150 12 100 10 50 8 0 5 10 15 Input Power Pin (dBm) GATE CURRENT vs. INPUT POWER 1.5 20 25 6 Gate Current Ig (mA) 1.0 0.5 0.0 –0.5 5 10 15 Input Power Pin (dBm) 20 25 Gain (dB) Power Added Efficiency ηadd (%) 25 45 Output Power Pout (dBm) Preliminary Data Sheet P13775EJ2V0DS00 3 NE960R2 SERIES TYPICAL S-PARAMETER [NE960R275] TEST CONDITIONS: VDS = 9 V, IDset = 90 mA FREQUENCY GHz 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 12.0 13.0 14.0 15.0 16.0 S11 ANG. (deg.) –113 –129 –138 –140 –144 –152 –163 –176 166 140 86 20 –20 –45 –66 S21 ANG. (deg.) 98 80 65 51 39 27 15 0 –19 –44 –78 –113 –144 –166 167 S12 ANG. (deg.) 34 15 10 7 5 3 3 1 0 –17 –46 –88 –132 –176 149 S22 ANG. (deg.) –79 –85 –94 –110 –125 –135 –141 –150 –167 164 129 94 68 44 27 MAG. 0.89 0.86 0.85 0.84 0.81 0.83 0.81 0.75 0.71 0.62 0.48 0.54 0.69 0.80 0.81 MAG. 3.99 2.88 2.29 1.99 1.78 1.77 1.82 1.89 2.12 2.42 2.50 2.32 1.77 1.30 1.03 MAG. 0.057 0.058 0.057 0.057 0.059 0.060 0.062 0.062 0.064 0.072 0.074 0.065 0.049 0.040 0.039 MAG. 0.42 0.46 0.43 0.41 0.44 0.49 0.53 0.52 0.47 0.45 0.50 0.56 0.59 0.61 0.67 START 2 GHz, STOP 16 GHz, STEP 1 GHz S11 1.0 0.5 2.0 +135° S12 +90° +45° 2 GHz 16 GHz 0 0.5 1.0 2.0 ∞ ±180° 0 16 GHz 2 GHz –0.5 –1.0 Rmax. = 1 S21 +90° +135° 2 GHz +45° 0.5 16 GHz –2.0 –135° –90° S22 1.0 2.0 –45° Rmax. = 0.1 ±180° 16 GHz 0° 0 0.5 1.0 2.0 ∞ 2 GHz –135° –90° –45° Rmax. = 5 –0.5 –1.0 Rmax. = 1 –2.0 4 Preliminary Data Sheet P13775EJ2V0DS00 NE960R2 SERIES [NE960R200] TEST CONDITIONS: VDS = 9 V, IDset = 90 mA FREQUENCY GHz 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 12.0 13.0 14.0 15.0 16.0 17.0 18.0 S11 ANG. (deg.) −97 −117 −131 −139 −145 −148 −150 −153 −157 −162 −169 −176 −178 178 175 173 170 S21 ANG. (deg.) −166 −147 −135 −109 −82 −54 −29 1 30 56 82 104 129 165 −165 −137 −112 S12 ANG. (deg.) 104 124 159 −173 141 −118 −72 −47 −13 24 56 79 128 137 −172 −131 −106 S22 ANG. (deg.) −49 −64 −74 −85 −93 −99 −103 −106 −108 −110 −114 −118 −122 −126 −129 −132 −142 MAG. 0.87 0.84 0.82 0.82 0.82 0.81 0.79 0.77 0.79 0.80 0.80 0.82 0.84 0.83 0.84 0.83 0.84 MAG. 7.60 3.84 2.98 2.46 2.10 1.85 1.57 1.45 1.33 1.23 1.17 1.13 0.95 0.83 0.78 0.74 0.59 MAG. 0.061 0.062 0.065 0.069 0.069 0.064 0.059 0.072 0.059 0.057 0.070 0.043 0.061 0.048 0.049 0.044 0.061 MAG. 0.36 0.34 0.33 0.34 0.37 0.40 0.43 0.47 0.50 0.51 0.52 0.54 0.55 0.57 0.57 0.57 0.56 Caution S-parameters include bond wires. Gate : Total 2 wires, 1 per bond pad, 300 µm long each wire. Drain : Total 2 wires, 1 per bond pad, 300 µm long each wire. Source : No bond wires. Wire : 25 µm diameter, gold. Preliminary Data Sheet P13775EJ2V0DS00 5 NE960R2 SERIES [NE961R200] TEST CONDITIONS: VDS = 9 V, IDset = 90 mA FREQUENCY GHz 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 12.0 13.0 14.0 15.0 16.0 17.0 18.0 S11 ANG. (deg.) −92 −114 −128 −142 −143 −146 −149 −152 −157 −163 −171 −176 178 175 172 168 164 S21 ANG. (deg.) −152 −146 −135 −108 −80 −52 −28 2 30 57 83 107 131 167 −162 −134 −107 S12 ANG. (deg.) 112 136 172 −154 −117 −88 −40 −11 29 70 107 133 180 −165 −117 −76 −55 S22 ANG. (deg.) −39 −52 −60 −70 −80 −87 −94 −98 −99 −103 −107 −111 −117 −122 −127 −131 −141 MAG. 0.85 0.80 0.78 0.77 0.77 0.76 0.74 0.74 0.74 0.74 0.74 0.76 0.77 0.77 0.78 0.77 0.78 MAG. 8.08 3.83 3.17 2.64 2.25 1.99 1.71 1.60 1.47 1.37 1.29 1.25 1.06 0.96 0.89 0.88 0.68 MAG. 0.056 0.058 0.060 0.064 0.067 0.066 0.065 0.082 0.072 0.076 0.102 0.074 0.113 0.098 0.114 0.115 0.165 MAG. 0.40 0.36 0.34 0.33 0.34 0.37 0.40 0.44 0.47 0.49 0.50 0.52 0.52 0.53 0.54 0.52 0.52 Caution S-parameters include bond wires. Gate : Total 2 wires, 1 per bond pad, 300 µm long each wire. Drain : Total 2 wires, 1 per bond pad, 300 µm long each wire. Source : Total 4 wires, 1 per bond pad, 300 µm long each wire. Wire : 25 µm diameter, gold. 6 Preliminary Data Sheet P13775EJ2V0DS00 NE960R2 SERIES PACKAGE DIMENSIONS PACKAGE CODE-75 (Unit: mm) Gate 3.0 MIN. 2.3 2.7 1.13 2.3 3.0 MIN. φ 1.8 0.5 Drain 2.7 7.0 9.8 MAX. PHYSICAL DIMENSIONS NE960R200 (CHIP) (Unit: µm) 880 285 80 150 80 285 90 95 NE961R200 (CHIP) (Unit: µm) 880 285 80 150 80 285 90 95 D 0.9 MAX. D 530 Source 95 90 G Source G 150 80 285 150 80 285 Remark Chip thickness: 100 µm G D : Gate : Drain Remark Chip thickness: 140 µm G D : Gate : Drain Source is grounded through via hole. 95 90 530 Preliminary Data Sheet P13775EJ2V0DS00 7 NE960R2 SERIES RECOMMENDED SOLDERING CONDITIONS This product should be soldered under the following recommended conditions. For soldering methods and conditions other than those recommended below, contact your NEC sales representative. Soldering Method Partial Heating Soldering Conditions Pin temperature: 260°C Time: 5 seconds or less (per pin row) Note Exposure limit: None Recommended Condition Symbol – Note After opening the dry pack, keep it in a place below 25°C and 65 % RH for the allowable storage period. Caution Do not use different soldering methods together (except for partial heating). CHIP HANDLING DIE ATTACHMENT Die attach can be accomplished with a Au-Sn (300 ±10°C) performs in a forming gas environment. Epoxy die attach is not recommended. BONDING Gate and drain bonding wires should be minimum length, semi-hard gold wire (3 to 8 % elongation) 30 microns or less in diameter. Bonding should be performed with a wedge tip that has a taper of approximately 15 %. Die attach and bonding time should be kept to a minimum. As a general rule, the bonding operation should be kept within a 280°C_5 minute curve. If longer periods are required, the temperature should be lowered. PRECAUTIONS The user must operate in a clean, dry environment. The chip channel is glassivated for mechanical protection only and does not preclude the necessity of a clean environment. The bonding equipment should be periodically checked for sources of surge voltage and should be properly grounded at all times. In fact, all test and handling equipment should be grounded to minimize the possibilities of static discharge. 8 Preliminary Data Sheet P13775EJ2V0DS00 NE960R2 SERIES [MEMO] Preliminary Data Sheet P13775EJ2V0DS00 9 NE960R2 SERIES [MEMO] 10 Preliminary Data Sheet P13775EJ2V0DS00 NE960R2 SERIES [MEMO] Preliminary Data Sheet P13775EJ2V0DS00 11 NE960R2 SERIES Caution The Great Care must be taken in dealing with the devices in this guide. The reason is that the material of the devices is GaAs (Gallium Arsenide), which is designated as harmful substance according to the law concerned. Keep the law concerned and so on, especially in case of removal. • The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. • N o part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. • NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. 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