A2I09VD015NR1

NXP Semiconductors Technical Data Document Number: A2I09VD015N Rev. 0, 06/2018 RF LDMOS Wideband Integrated Power Amplifiers The A2I09VD015N wideband integrated circuit is designed with on--chip matching that makes it usable from 575 to 960 MHz. This multi -- stage structure is rated for 48 to 55 V operation and covers all typical cellular base station modulation formats. 900 MHz  Typical Single--Carrier W--CDMA Characterization Performance: VDD = 48 Vdc, IDQ1(A+B) = 16 mA, IDQ2(A+B) = 84 mA, Pout = 2 W Avg., Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF.(1) Frequency Gps (dB) PAE (%) ACPR (dBc) 920 MHz 32.9 19.3 –45.9 940 MHz 33.0 19.7 –45.5 960 MHz 32.8 19.6 –44.9 A2I09VD015NR1 A2I09VD015GNR1 575–960 MHz, 2 W AVG., 48 V AIRFAST RF LDMOS WIDEBAND INTEGRATED POWER AMPLIFIERS TO--270WB--15 PLASTIC A2I09VD015NR1 Features  On--chip matching (50 ohm input, DC blocked)  Integrated quiescent current temperature compensation with enable/disable function (2) TO--270WBG--15 PLASTIC A2I09VD015GNR1  Designed for digital predistortion error correction systems  Optimized for Doherty applications VDS1A RFinA VGS1A VGS2A VGS1B VGS2B RFout1/VDS2A Quiescent Current Temperature Compensation (2) Quiescent Current Temperature Compensation (2) RFinB RFout2/VDS2B VDS1B Figure 1. Functional Block Diagram VDS1A VGS2A VGS1A RFinA N.C. N.C. N.C. N.C. RFinB VGS1B VGS2B VDS1B 1 2 3 4 5 6 7 8 9 10 11 12 15 RFout1/VDS2A 14 13 N.C. RFout2/VDS2B (Top View) Note: Exposed backside of the package is the source terminal for the transistor. Figure 2. Pin Connections 1. All data measured in fixture with device soldered to heatsink. 2. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family, and to AN1987, Quiescent Current Control for the RF Integrated Circuit Device Family. Go to http://www.nxp.com/RF and search for AN1977 or AN1987.  2018 NXP B.V. RF Device Data NXP Semiconductors A2I09VD015NR1 A2I09VD015GNR1 1 Table 1. Maximum Ratings Symbol Value Unit Drain--Source Voltage Rating VDSS –0.5, +105 Vdc Gate--Source Voltage VGS –0.5, +10 Vdc Operating Voltage VDD 55, +0 Vdc Storage Temperature Range Tstg –65 to +150 C TC –40 to +150 C Case Operating Temperature Range Operating Junction Temperature Range (1,2) Input Power TJ –40 to +225 C Pin 20 dBm Symbol Value (2,3) Unit Table 2. Thermal Characteristics Characteristic Thermal Resistance, Junction to Case Case Temperature 74C, 2 W, 940 MHz Stage 1, 48 Vdc, IDQ1(A+B) 16 mA Stage 2, 48 Vdc, IDQ2(A+B) 78 mA RJC C/W 7.2 3.1 Table 3. ESD Protection Characteristics Test Methodology Class Human Body Model (per JS--001--2017) 1B Charge Device Model (per JS--002--2014) C0B Table 4. Moisture Sensitivity Level Test Methodology Per JESD22--A113, IPC/JEDEC J--STD--020 Rating Package Peak Temperature Unit 3 260 C 1. Continuous use at maximum temperature will affect MTTF. 2. MTTF calculator available at http://www.nxp.com/RF/calculators. 3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.nxp.com/RF and search for AN1955. A2I09VD015NR1 A2I09VD015GNR1 2 RF Device Data NXP Semiconductors Table 5. Electrical Characteristics (TA = 25C unless otherwise noted) Symbol Min Typ Max Unit Zero Gate Voltage Drain Leakage Current (VDS = 105 Vdc, VGS = 0 Vdc) IDSS — — 10 Adc Zero Gate Voltage Drain Leakage Current (VDS = 55 Vdc, VGS = 0 Vdc) IDSS — — 1 Adc Gate--Source Leakage Current (VGS = 1.2 Vdc, VDS = 0 Vdc) IGSS — — 1 Adc Gate Threshold Voltage (1) (VDS = 10 Vdc, ID = 1 Adc) VGS(th) 1.3 1.8 2.3 Vdc Gate Quiescent Voltage (VDS = 48 Vdc, IDQ1(A+B) = 16 mAdc) VGS(Q) 2.2 2.4 2.6 Vdc Fixture Gate Quiescent Voltage (VDD = 48 Vdc, IDQ1(A+B) = 16 mAdc, Measured in Functional Test) VGG(Q) 4.4 4.8 5.2 Vdc Zero Gate Voltage Drain Leakage Current (VDS = 105 Vdc, VGS = 0 Vdc) IDSS — — 10 Adc Zero Gate Voltage Drain Leakage Current (VDS = 55 Vdc, VGS = 0 Vdc) IDSS — — 1 Adc Gate--Source Leakage Current (VGS = 1.2 Vdc, VDS = 0 Vdc) IGSS — — 1 Adc Gate Threshold Voltage (1) (VDS = 10 Vdc, ID = 6 Adc) VGS(th) 1.3 1.8 2.3 Vdc Gate Quiescent Voltage (VDS = 48 Vdc, IDQ2(A+B) = 78 mAdc) VGS(Q) 2.0 2.2 2.4 Vdc Fixture Gate Quiescent Voltage (VDD = 48 Vdc, IDQ2(A+B) = 78 mAdc, Measured in Functional Test) VGG(Q) 4.0 4.4 4.8 Vdc Drain--Source On--Voltage (1) (VGS = 10 Vdc, ID = 60 mAdc) VDS(on) 0.1 0.3 0.5 Vdc Characteristic Stage 1 -- Off Characteristics (1) Stage 1 -- On Characteristics Stage 2 -- Off Characteristics (1) Stage 2 -- On Characteristics 1. Each side of device measured separately. (continued) A2I09VD015NR1 A2I09VD015GNR1 RF Device Data NXP Semiconductors 3 Table 5. Electrical Characteristics (TA = 25C unless otherwise noted) (continued) Characteristic Symbol Min Typ Max Unit (1,2) Functional Tests (In NXP Production Test Fixture, 50 ohm system) VDD = 48 Vdc, IDQ1(A+B) = 16 mA, IDQ2(A+B) = 78 mA, Pout = 2 W Avg., f = 920 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured in 3.84 MHz Channel Bandwidth @ 5 MHz Offset. Power Gain Gps 31.0 32.8 34.0 dB Power Added Efficiency PAE 18.0 18.8 — % Adjacent Channel Power Ratio ACPR — –43.9 –41.0 dBc Pout @ 3 dB Compression Point, CW P3dB 16.6 18.5 — W Load Mismatch (In NXP Production Test Fixture, 50 ohm system) IDQ1(A+B) = 16 mA, IDQ2(A+B) = 78 mA, f = 940 MHz VSWR 10:1 at 55 Vdc, 24 W CW Output Power (3 dB Input Overdrive from 19 W CW Rated Power) No Device Degradation Typical Performance (3) (In NXP Characterization Test Fixture, 50 ohm system) VDD = 48 Vdc, IDQ1(A+B) = 16 mA, IDQ2(A+B) = 78 mA, 920–960 MHz Bandwidth Pout @ 1 dB Compression Point, CW P1dB — 17.7 — W Pout @ 3 dB Compression Point (4) P3dB — 18.5 — W  — –9 —  VBWres — 270 — MHz — — 2.9 3.2 — — AM/PM (Maximum value measured at the P3dB compression point across the 920–960 MHz frequency range.) VBW Resonance Point (IMD Third Order Intermodulation Inflection Point) Quiescent Current Accuracy over Temperature (5) with 2 k Gate Feed Resistors (--30 to 85C) Stage 1 with 2 k Gate Feed Resistors (--30 to 85C) Stage 2 IQT % Gain Flatness in 40 MHz Bandwidth @ Pout = 2 W Avg. GF — 0.2 — dB Gain Variation over Temperature (–30C to +85C) G — 0.036 — dB/C P1dB — 0.007 — dB/C Output Power Variation over Temperature (–30C to +85C) Table 6. Ordering Information Device A2I09VD015NR1 A2I09VD015GNR1 Tape and Reel Information R1 Suffix = 500 Units, 44 mm Tape Width, 13--inch Reel Package TO--270WB--15 TO--270WBG--15 1. Part internally input and output matched. 2. Measurements made with device in straight lead configuration before any lead forming operation is applied. Lead forming is used for gull wing (GN) parts. 3. All data measured in fixture with device soldered to heatsink. 4. P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W--CDMA single--carrier input signal where output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF. 5. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family, and to AN1987, Quiescent Current Control for the RF Integrated Circuit Device Family. Go to http://www.nxp.com/RF and search for AN1977 or AN1987. A2I09VD015NR1 A2I09VD015GNR1 4 RF Device Data NXP Semiconductors VGS2 VGS1 VDS2 A2I09VD015N VDS1 R1 C7 R2 C8 C1 C2 R5 C12 C17 C25 R8 Z1 R9 R10 C28 C18 C14 C15 C24 C23 R7 C19 C3 Rev. 2 C21 CUT OUT AREA C11 C26 C27 C16 C13 Z2 C22 C20 R6 C4 C5 C6 R4 C9 C10 VGS3 R3 VGS4 VDS1 VDS2 Figure 3. A2I09VD015NR1 Production Test Circuit Component Layout Table 7. A2I09VD015NR1 Production Test Circuit Component Designations and Values Part Description Part Number Manufacturer C1, C2, C3, C4, C5, C6, C7, C8, C9, C10 10 F Chip Capacitor C5750X7SA106M230KB TDK C11, C12, C13, C14 10 F Chip Capacitor C3225X7S1H106M250AB TDK C15, C16, C17, C18 10 nF Chip Capacitor C0805C103K5RAC Kemet C19, C20, C21, C22, C23, C24, C25, C26, C27, C28 47 pF Chip Capacitor ATC600S470JT250XT ATC R1, R2, R3, R4 2.2 k, 1/8 W Chip Resistor CRCW08052K20JNEA Vishay R5 50 , 8 W Termination Chip Resistor C8A50Z4A Anaren R6 50 , 20 W Termination Chip Resistor C20A50Z4 Anaren R7, R8, R9, R10 10 , 1/8 W Chip Resistor CRCW080510R0FKEA Vishay Z1, Z2 800--1000 MHz, 90, 3 dB Hybrid Coupler X3C09P1-03 Anaren PCB Rogers RO4350B, 0.020, r = 3.66 — MTL A2I09VD015NR1 A2I09VD015GNR1 RF Device Data NXP Semiconductors 5 VGS2 VGS1 D99736 VDS2 A2I09VD015N VDS1 R1 C7 R2 C8 C1 C2 C11 R5 C12 C17 C25 R8 C15 C24 C23 C19 C3 Rev. 2 R7 C21 Q1 Z1 R9 R10 C28 C18 C14 Z2 C22 C26 C27 C16 C13 C20 R6 C4 C5 C6 R4 C9 C10 VGS3 R3 VGS4 VDS1 VDS2 Note: All data measured in fixture with device soldered to heatsink. Production fixture does not include device soldered to heatsink. Figure 4. A2I09VD015NR1 Characterization Test Circuit Component Layout — 920–960 MHz Table 8. A2I09VD015NR1 Characterization Test Circuit Component Designations and Values — 920–960 MHz Part Description Part Number Manufacturer C1, C2, C3, C4, C5, C6, C7, C8, C9, C10 10 F Chip Capacitor C5750X7SA106M230KB TDK C11, C12, C13, C14 10 F Chip Capacitor C3225X7S1H106M250AB TDK C15, C16, C17, C18 10 nF Chip Capacitor C0805C103K5RAC Kemet C19, C20, C21, C22, C23, C24, C25, C26, C27, C28 47 pF Chip Capacitor ATC600S470JT250XT ATC Q1 RF Power LDMOS Amplifier A2I09VD015N NXP R1, R2, R3, R4 2.2 k, 1/8 W Chip Resistor CRCW08052K20JNEA Vishay R5 50 , 8 W Termination Chip Resistor C8A50Z4A Anaren R6 50 , 20 W Termination Chip Resistor C20A50Z4 Anaren R7, R8, R9, R10 10 , 1/8 W Chip Resistor CRCW080510R0FKEA Vishay Z1, Z2 800--1000 MHz, 90, 3 dB Hybrid Coupler X3C09P1-03 Anaren PCB Rogers RO4350B, 0.020, r = 3.66 D99736 MTL A2I09VD015NR1 A2I09VD015GNR1 6 RF Device Data NXP Semiconductors 18 16 14 31.5 12 PARC 31 30.5 ACPR 30 –43 –.3 –44 –.6 –45 –46 29.5 29 28.5 820 Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF 840 860 880 900 920 940 –47 –1.2 –1.5 –1.8 –48 980 960 –.9 PARC (dB) 20 D VDD = 48 Vdc, Pout = 2 W (Avg.) 33 IDQ1(A+B) = 16 mA 32.5 IDQ2(A+B) = 84 mA Gps 32 ACPR (dBc) Gps, POWER GAIN (dB) 33.5 D, DRAIN EFFICIENCY (%) TYPICAL CHARACTERISTICS — 920–960 MHz f, FREQUENCY (MHz) IMD, INTERMODULATION DISTORTION (dBc) Figure 5. Single--Carrier Output Peak--to--Average Ratio Compression (PARC) Broadband Performance @ Pout = 2 Watts Avg. –15 VDD = 48 Vdc, Pout = 8 W (PEP), IDQ1(A+B) = 16 mA IDQ2(A+B) = 84 mA IM3--U –30 IM3--L IM5--L IM5--U –45 IM7--L –60 IM7--U –75 –90 Two--Tone Measurements, (f1 + f2)/2 = Center Frequency of 940 MHz 10 1 400 100 TWO--TONE SPACING (MHz) 32.8 0 32.7 32.6 32.5 32.4 32.3 VDD = 48 Vdc, IDQ1(A+B) = 16 mA, IDQ2(A+B) = 84 mA f = 940 MHz, Single--Carrier W--CDMA ACPR –1 –30 35 –33 30 –1 dB = 2.3 W –2 25 –2 dB = 3.1 W Gps PARC –3 D –4 –5 40 20 –3 dB = 4.1 W 15 3.84 MHz Channel Bandwidth Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF 1 2 3 4 5 6 10 –36 –39 ACPR (dBc) 1 D DRAIN EFFICIENCY (%) 32.9 OUTPUT COMPRESSION AT 0.01% PROBABILITY ON CCDF (dB) Gps, POWER GAIN (dB) Figure 6. Intermodulation Distortion Products versus Two--Tone Spacing –42 –45 –48 Pout, OUTPUT POWER (WATTS) Figure 7. Output Peak--to--Average Ratio Compression (PARC) versus Output Power A2I09VD015NR1 A2I09VD015GNR1 RF Device Data NXP Semiconductors 7 TYPICAL CHARACTERISTICS — 920–960 MHz 920 MHz 32 29 920 MHz 50 –25 20 ACPR 30 –20 960 MHz 40 940 MHz 920 MHz 30 940 MHz 960 MHz 31 D 60 10 960 MHz 940 MHz 0 20 10 1 –30 –35 –40 ACPR (dBc) VDD = 48 Vdc, IDQ1(A+B) = 16 mA, IDQ2(A+B) = 84 mA Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth 34 Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF 33 Gps D, DRAIN EFFICIENCY (%) Gps, POWER GAIN (dB) 35 –45 –50 Pout, OUTPUT POWER (WATTS) AVG. Figure 8. Single--Carrier W--CDMA Power Gain, Drain Efficiency and ACPR versus Output Power 36 GAIN (dB) VDD = 48 Vdc Pin = 0 dBm 34 I DQ1(A+B) = 16 mA IDQ2(A+B) = 84 mA 32 Gain 30 28 26 24 750 800 850 900 950 1000 1050 1100 1150 f, FREQUENCY (MHz) Figure 9. Broadband Frequency Response A2I09VD015NR1 A2I09VD015GNR1 8 RF Device Data NXP Semiconductors Table 9. Load Pull Performance — Maximum Power Tuning VDD = 48 Vdc, IDQ1 = 8 mA, IDQ2 = 39 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Output Power P1dB Zload () Zsource () Zin () 920 51.0 – j3.11 65.8 + j7.62 940 49.2 + j1.23 60.4 + j2.53 960 50.9 + j2.55 54.2 + j0.33 f (MHz) (1) Gain (dB) (dBm) (W) D (%) AM/PM () 35.3 + j33.2 31.6 40.2 10 59.5 –2 32.5 + j32.9 31.5 40.2 11 59.6 –3 29.7 + j32.1 31.3 40.2 10 58.7 –4 Max Output Power P3dB f (MHz) Zsource () Zin () Zload (2) () Gain (dB) (dBm) (W) D (%) AM/PM () 920 51.0 – j3.11 66.2 + j7.48 33.7 + j31.8 29.6 41.1 13 62.1 –3 940 49.2 + j1.23 60.0 + j2.49 31.3 + j31.1 29.5 41.1 13 61.5 –4 960 50.9 + j2.55 52.8 + j1.10 28.8 + j30.7 29.3 41.0 13 61.1 –5 (1) Load impedance for optimum P1dB power. (2) Load impedance for optimum P3dB power. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Note: Measurement made on a per side basis. Table 10. Load Pull Performance — Maximum Efficiency Tuning VDD = 48 Vdc, IDQ1 = 8 mA, IDQ2 = 39 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Drain Efficiency P1dB f (MHz) Zsource () Zin () Zload (1) () 920 51.0 – j3.11 67.5 + j6.05 18.5 + j45.3 33.7 38.5 7 70.0 –4 940 49.2 + j1.23 60.9 + j1.05 14.3 + j44.7 33.8 37.5 6 68.8 –5 960 50.9 + j2.55 54.3 + j0.28 18.0 + j40.8 32.9 38.8 8 67.5 –4 Gain (dB) (dBm) (W) D (%) AM/PM () Max Drain Efficiency P3dB f (MHz) Zsource () Zin () Zload (2) () Gain (dB) (dBm) (W) D (%) AM/PM () 920 51.0 – j3.11 67.3 + j4.87 18.5 + j45.7 31.7 39.4 9 71.1 –3 940 49.2 + j1.23 59.2 – j0.18 13.0 + j46.5 32.0 38.1 6 69.9 –4 960 50.9 + j2.55 53.5 – j0.45 18.3 + j40.8 30.9 39.8 10 69.4 –2 (1) Load impedance for optimum P1dB efficiency. (2) Load impedance for optimum P3dB efficiency. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Note: Measurement made on a per side basis. Input Load Pull Tuner and Test Circuit Output Load Pull Tuner and Test Circuit Device Under Test Zsource Zin Zload A2I09VD015NR1 A2I09VD015GNR1 RF Device Data NXP Semiconductors 9 P1dB – TYPICAL LOAD PULL CONTOURS — 940 MHz 55 55 38.5 38 IMAGINARY () 45 E 36 40 39.5 50 45 40 35 IMAGINARY () 50 39 P 30 40 25 37 38 20 15 5 10 38.5 15 20 25 30 35 REAL () 40 45 50 55 15 60 30.5 31 32.5 31.5 32 P 30 20 15 15 20 25 30 35 REAL () 40 45 50 55 60 Figure 12. P1dB Load Pull Gain Contours (dB) NOTE: 10 15 20 25 30 35 REAL () 40 45 50 55 60 –2 –4 E –10 –8 P 30 20 15 5 35 25 10 54 40 25 5 56 52 45 IMAGINARY () IMAGINARY () E 33 P Figure 11. P1dB Load Pull Efficiency Contours (%) 50 33.5 58 30 50 35 60 35 55 34 62 40 55 40 64 20 39 Figure 10. P1dB Load Pull Output Power Contours (dBm) 45 66 68 25 39.5 39 E –6 –4 –4 5 10 15 20 25 30 35 REAL () 40 45 50 55 60 Figure 13. P1dB Load Pull AM/PM Contours () P = Maximum Output Power E = Maximum Drain Efficiency Gain Drain Efficiency Linearity Output Power A2I09VD015NR1 A2I09VD015GNR1 10 RF Device Data NXP Semiconductors P3dB – TYPICAL LOAD PULL CONTOURS — 940 MHz 55 38 50 39.5 55 40 E 45 50 40.5 37 40 35 41 P 30 25 38 5 39 10 39.5 15 40 20 40.5 25 30 35 REAL () 40 45 50 55 62 60 40 58 35 56 P 30 15 60 54 5 10 15 20 25 30 35 REAL () 40 45 50 55 60 Figure 15. P3dB Load Pull Efficiency Contours (%) 55 55 50 50 E 28.5 32 40 29 29.5 31.5 35 31 30.5 30 P 30 40 –14 35 30 –8 25 20 20 5 10 15 20 25 30 35 REAL () 40 45 50 55 60 Figure 16. P3dB Load Pull Gain Contours (dB) NOTE: –2 –12 –10 25 15 0 E 45 IMAGINARY () 45 IMAGINARY () 64 20 40 Figure 14. P3dB Load Pull Output Power Contours (dBm) 15 66 25 20 15 68 E 45 IMAGINARY () IMAGINARY () 39 38.5 5 10 –4 P –6 15 20 25 30 35 REAL () 40 45 50 55 60 Figure 17. P3dB Load Pull AM/PM Contours () P = Maximum Output Power E = Maximum Drain Efficiency Gain Drain Efficiency Linearity Output Power A2I09VD015NR1 A2I09VD015GNR1 RF Device Data NXP Semiconductors 11 PACKAGE DIMENSIONS A2I09VD015NR1 A2I09VD015GNR1 12 RF Device Data NXP Semiconductors A2I09VD015NR1 A2I09VD015GNR1 RF Device Data NXP Semiconductors 13 A2I09VD015NR1 A2I09VD015GNR1 14 RF Device Data NXP Semiconductors A2I09VD015NR1 A2I09VD015GNR1 RF Device Data NXP Semiconductors 15 A2I09VD015NR1 A2I09VD015GNR1 16 RF Device Data NXP Semiconductors A2I09VD015NR1 A2I09VD015GNR1 RF Device Data NXP Semiconductors 17 PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS Refer to the following resources to aid your design process. Application Notes  AN1907: Solder Reflow Attach Method for High Power RF Devices in Over--Molded Plastic Packages  AN1955: Thermal Measurement Methodology of RF Power Amplifiers  AN1977: Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family  AN1987: Quiescent Current Control for the RF Integrated Circuit Device Family Engineering Bulletins  EB212: Using Data Sheet Impedances for RF LDMOS Devices Software  Electromigration MTTF Calculator  RF High Power Model  .s2p File Development Tools  Printed Circuit Boards To Download Resources Specific to a Given Part Number: 1. Go to http://www.nxp.com/RF 2. Search by part number 3. Click part number link 4. Choose the desired resource from the drop down menu REVISION HISTORY The following table summarizes revisions to this document. Revision Date 0 June 2018 Description  Initial release of data sheet A2I09VD015NR1 A2I09VD015GNR1 18 RF Device Data NXP Semiconductors How to Reach Us: Home Page: nxp.com Web Support: nxp.com/support Information in this document is provided solely to enable system and software implementers to use NXP products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based on the information in this document. NXP reserves the right to make changes without further notice to any products herein. NXP makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does NXP assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in NXP data sheets and/or specifications can and do vary in different applications, and actual performance may vary over time. All operating parameters, including “typicals,” must be validated for each customer application by customer’s technical experts. NXP does not convey any license under its patent rights nor the rights of others. NXP sells products pursuant to standard terms and conditions of sale, which can be found at the following address: nxp.com/SalesTermsandConditions. NXP, the NXP logo and Airfast are trademarks of NXP B.V. All other product or service names are the property of their respective owners. E 2018 NXP B.V. A2I09VD015NR1 A2I09VD015GNR1 Document Number: RF Device Data A2I09VD015N Rev. 0,Semiconductors 06/2018 NXP 19