BUK7212-55B

DP AK BUK7212-55B N-channel TrenchMOS standard level FET Rev. 2 — 23 February 2011 Product data sheet 1. Product profile 1.1 General description Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 1.2 Features and benefits AEC Q101 compliant Low conduction losses due to low on-state resistance Suitable for standard level gate drive sources Suitable for thermally demanding environments due to 185 °C rating 1.3 Applications 12 V and 24 V loads Automotive systems General purpose power switching Motors, lamps and solenoids 1.4 Quick reference data Table 1. Symbol VDS ID Ptot Quick reference data Parameter drain-source voltage drain current total power dissipation drain-source on-state resistance Conditions Tj ≥ 25 °C; Tj ≤ 185 °C VGS = 10 V; Tmb = 25 °C; see Figure 3; see Figure 1 Tmb = 25 °C; see Figure 2 [1] Min - Typ - Max Unit 55 75 167 V A W Static characteristics RDSon VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 9; see Figure 10 10.2 12 mΩ NXP Semiconductors BUK7212-55B N-channel TrenchMOS standard level FET Quick reference data …continued Parameter Conditions Min Typ Max Unit 173 mJ Table 1. Symbol EDS(AL)S Avalanche ruggedness non-repetitive ID = 75 A; Vsup ≤ 55 V; drain-source RGS = 50 Ω; VGS = 10 V; avalanche energy Tj(init) = 25 °C; unclamped gate-drain charge VGS = 10 V; ID = 25 A; VDS = 44 V; Tj = 25 °C; see Figure 11 Dynamic characteristics QGD 12 nC [1] Continuous current is limited by package. 2. Pinning information Table 2. Pin 1 2 3 mb Pinning information Symbol Description G D S D gate drain[1] source mounting base; connected to drain 2 1 3 mb D Simplified outline Graphic symbol G mbb076 S SOT428 (DPAK) [1] It is not possible to make connection to pin 2. 3. Ordering information Table 3. Ordering information Package Name BUK7212-55B DPAK Description plastic single-ended surface-mounted package (DPAK); 3 leads (one lead cropped) Version SOT428 Type number BUK7212-55B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 23 February 2011 2 of 14 NXP Semiconductors BUK7212-55B N-channel TrenchMOS standard level FET 4. Limiting values Table 4. Symbol VDS VDGR VGS ID Limiting values Parameter drain-source voltage drain-gate voltage gate-source voltage drain current Tmb = 25 °C; VGS = 10 V; see Figure 1; see Figure 3 Tmb = 100 °C; VGS = 10 V; see Figure 1 Tmb = 25 °C; VGS = 10 V; see Figure 3; see Figure 1 IDM Ptot Tstg Tj IS ISM EDS(AL)S peak drain current total power dissipation storage temperature junction temperature source current peak source current non-repetitive drain-source avalanche energy Tmb = 25 °C pulsed; tp ≤ 10 µs; Tmb = 25 °C ID = 75 A; Vsup ≤ 55 V; RGS = 50 Ω; VGS = 10 V; Tj(init) = 25 °C; unclamped [2] [1] [1] In accordance with the Absolute Maximum Rating System (IEC 60134). Conditions Tj ≥ 25 °C; Tj ≤ 185 °C RGS = 20 kΩ Min -20 -55 -55 Max 55 55 20 83 59 75 335 167 185 185 75 83 335 173 Unit V V V A A A A W °C °C A A A mJ [1] [2] Tmb = 25 °C; pulsed; tp ≤ 10 µs; see Figure 3 Tmb = 25 °C; see Figure 2 Source-drain diode Avalanche ruggedness [1] [2] Current is limited by power dissipation chip rating. Continuous current is limited by package. BUK7212-55B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 23 February 2011 3 of 14 NXP Semiconductors BUK7212-55B N-channel TrenchMOS standard level FET 100 ID (A) 75 Capped at 75A due to package 03nl11 120 Pder (%) 80 03no96 50 40 25 0 0 50 100 150 200 Tmb (°C) 0 0 50 100 150 Tmb (°C) 200 Fig 1. Normalized continuous drain current as a function of mounting base temperature Fig 2. Normalized total power dissipation as a function of mounting base temperature 03nl09 103 ID (A) 102 Limit RDSon = VDS/ID tp = 10 μs 100 μs Capped at 75 A due to package 10 DC 1 ms 10 ms 100 ms 1 1 10 VDS (V) 102 Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage BUK7212-55B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 23 February 2011 4 of 14 NXP Semiconductors BUK7212-55B N-channel TrenchMOS standard level FET 5. Thermal characteristics Table 5. Symbol Rth(j-mb) Rth(j-a) Thermal characteristics Parameter thermal resistance from junction to mounting base thermal resistance from junction to ambient Conditions see Figure 4 Min Typ 71.4 Max 0.95 Unit K/W K/W 1 δ = 0.5 Zth(j-mb) (K/W) 10−1 0.2 0.1 0.05 0.02 03nk52 10−2 single shot P δ= tp T tp t T 10−3 10−6 10−5 10−4 10−3 10−2 10−1 tp (s) 1 Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration BUK7212-55B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 23 February 2011 5 of 14 NXP Semiconductors BUK7212-55B N-channel TrenchMOS standard level FET 6. Characteristics Table 6. Symbol V(BR)DSS VGS(th) Characteristics Parameter drain-source breakdown voltage gate-source threshold voltage Conditions ID = 0.25 mA; VGS = 0 V; Tj = 25 °C ID = 0.25 mA; VGS = 0 V; Tj = -55 °C ID = 1 mA; VDS = VGS; Tj = 25 °C; see Figure 8 ID = 1 mA; VDS = VGS; Tj = 185 °C; see Figure 8 ID = 1 mA; VDS = VGS; Tj = -55 °C; see Figure 8 IDSS IGSS RDSon drain leakage current gate leakage current drain-source on-state resistance VDS = 55 V; VGS = 0 V; Tj = 25 °C VDS = 55 V; VGS = 0 V; Tj = 185 °C VGS = 20 V; VDS = 0 V; Tj = 25 °C VGS = -20 V; VDS = 0 V; Tj = 25 °C VGS = 10 V; ID = 25 A; Tj = 185 °C; see Figure 9; see Figure 10 VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 9; see Figure 10 Dynamic characteristics QG(tot) QGS QGD Ciss Coss Crss td(on) tr td(off) tf LD LS total gate charge gate-source charge gate-drain charge input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time internal drain inductance internal source inductance source-drain voltage reverse recovery time recovered charge measured from drain to center of die; Tj = 25 °C measured from source lead to source bond pad; Tj = 25 °C IS = 18 A; VGS = 0 V; Tj = 25 °C; see Figure 13 IS = 20 A; dIS/dt = -100 A/µs; VGS = -10 V; VDS = 30 V; Tj = 25 °C VDS = 25 V; RL = 1.2 Ω; VGS = 10 V; RG(ext) = 10 Ω; Tj = 25 °C VGS = 0 V; VDS = 25 V; f = 1 MHz; Tj = 25 °C; see Figure 12 ID = 25 A; VDS = 44 V; VGS = 10 V; Tj = 25 °C; see Figure 11 35 9 12 1840 379 165 18 91 48 45 2.5 75 2453 455 226 nC nC nC pF pF pF ns ns ns ns nH nH Min 55 50 2 0.9 Typ 3 0.02 2 2 10.2 Max 4 4.4 1 500 100 100 25 12 Unit V V V V V µA µA nA nA mΩ mΩ Static characteristics Source-drain diode VSD trr Qr 0.85 67 65 1.2 V ns nC BUK7212-55B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 23 February 2011 6 of 14 NXP Semiconductors BUK7212-55B N-channel TrenchMOS standard level FET 300 Label is VGS (V) ID (A) 20 16 12 10 9.5 9 8.5 8 7.5 100 7 6.5 6 03nl06 18 RDSon (mΩ) 03nl05 200 14 10 0 0 2 4 6 5.5 5 4.5 8 10 VDS (V) 6 5 10 15 VGS (V) 20 Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values 03aa35 Fig 6. Drain-source on-state resistance as a function of gate-source voltage; typical values 5 03no98 10−1 ID (A) 10−2 min typ max VGS(th) (V) 4 max 10−3 3 typ 10−4 2 min 10−5 1 10−6 0 2 4 VGS (V) 6 0 −60 10 80 150 Tj (°C) 220 Fig 7. Sub-threshold drain current as a function of gate-source voltage Fig 8. Gate-source threshold voltage as a function of junction temperature BUK7212-55B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 23 February 2011 7 of 14 NXP Semiconductors BUK7212-55B N-channel TrenchMOS standard level FET 25 RDSon (mΩ) 20 6 6.5 7 8 10 03nl07 2.4 a 03np00 Label is VGS (V) 20 1.6 15 0.8 10 5 0 100 200 ID (A) 300 0 −60 10 80 150 Tj (°C) 220 Fig 9. Drain-source on-state resistance as a function of drain current; typical values 10 03nl02 Fig 10. Normalized drain-source on-state resistance factor as a function of junction temperature 3000 C (pF) 03nl08 VGS (V) 8 VDD = 14 V 6 VDD = 44 V Ciss 2000 Coss 4 1000 2 Crss 0 0 10 20 30 QG (nC) 40 0 10−1 1 10 VDS (V) 102 Fig 11. Gate-source voltage as a function of gate charge; typical values Fig 12. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values BUK7212-55B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 23 February 2011 8 of 14 NXP Semiconductors BUK7212-55B N-channel TrenchMOS standard level FET 100 IS (A) 75 03nl01 50 Tj = 185 °C Tj = 25 °C 25 0 0.0 0.3 0.6 0.9 VSD (V) 1.2 Fig 13. Source current as a function of source-drain voltage; typical values BUK7212-55B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 23 February 2011 9 of 14 NXP Semiconductors BUK7212-55B N-channel TrenchMOS standard level FET 7. Package outline Plastic single-ended surface-mounted package (DPAK); 3 leads (one lead cropped) SOT428 y E b2 A A1 A E1 mounting base D1 HD D2 2 L2 1 3 L L1 b1 e e1 b w M A c 0 5 scale 10 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 2.38 2.22 A1 0.93 0.46 b 0.89 0.71 b1 1.1 0.9 b2 5.46 5.00 c 0.56 0.20 D1 6.22 5.98 D2 min 4.0 E 6.73 6.47 E1 min 4.45 e 2.285 e1 4.57 HD 10.4 9.6 L 2.95 2.55 L1 min 0.5 L2 0.9 0.5 w 0.2 y max 0.2 OUTLINE VERSION SOT428 REFERENCES IEC JEDEC TO-252 JEITA SC-63 EUROPEAN PROJECTION ISSUE DATE 06-02-14 06-03-16 Fig 14. Package outline SOT428 (DPAK) BUK7212-55B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 23 February 2011 10 of 14 NXP Semiconductors BUK7212-55B N-channel TrenchMOS standard level FET 8. Revision history Table 7. Revision history Release date 20110223 Data sheet status Product data sheet Change notice Supersedes BUK7212_55B-01 Document ID BUK7212-55B v.2 Modifications: • • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Product data - BUK7212_55B-01 (9397 750 12229) 20040123 BUK7212-55B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 23 February 2011 11 of 14 NXP Semiconductors BUK7212-55B N-channel TrenchMOS standard level FET 9. Legal information 9.1 Data sheet status Product status [3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Document status [1] [2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. The product is not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual © NXP B.V. 2011. All rights reserved. 9.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. BUK7212-55B All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 2 — 23 February 2011 12 of 14 NXP Semiconductors BUK7212-55B N-channel TrenchMOS standard level FET agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V. HD Radio and HD Radio logo — are trademarks of iBiquity Digital Corporation. 10. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com BUK7212-55B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 23 February 2011 13 of 14 NXP Semiconductors BUK7212-55B N-channel TrenchMOS standard level FET 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3 Thermal characteristics . . . . . . . . . . . . . . . . . . .5 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . .12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Contact information. . . . . . . . . . . . . . . . . . . . . .13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 23 February 2011 Document identifier: BUK7212-55B