PH6325L,115

Important notice Dear Customer, On 7 February 2017 the former NXP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS semiconductors with its focus on the automotive, industrial, computing, consumer and wearable application markets In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below. Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/, use http://www.nexperia.com Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use salesaddresses@nexperia.com (email) Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on the version, as shown below: - © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights reserved Should be replaced with: - © Nexperia B.V. (year). All rights reserved. If you have any questions related to the data sheet, please contact our nearest sales office via e-mail or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and understanding, Kind regards, Team Nexperia LF PA K PH6325L N-channel 25 V 6.3 mΩ logic level MOSFET in LFPAK Rev. 2 — 22 December 2011 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode field-effect transistor in a plastic package using TrenchMOSTM technology 1.2 Features and benefits  Low thermal resistance  Low threshold voltage  Optimized for use in DC-to-DC converters  Very low switching and conduction losses 1.3 Applications  DC-to-DC convertors  Switched-mode power supplies  Notebook computers  Voltage regulators 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 150 °C - - 25 V ID drain current Tmb = 25 °C; VGS = 10 V; see Figure 1; see Figure 3 - - 78.7 A Ptot total power dissipation Tmb = 25 °C; see Figure 2 - - 62.5 W drain-source on-state resistance VGS = 4.5 V; ID = 25 A; Tj = 25 °C; see Figure 9; see Figure 10 - 7.4 9.5 mΩ VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 9; see Figure 10 - 4.7 6.3 mΩ VGS = 4.5 V; ID = 25 A; VDS = 12 V; see Figure 11; see Figure 12 - 3.3 - nC - 13.3 - nC Static characteristics RDSon Dynamic characteristics QGD gate-drain charge QG(tot) total gate charge PH6325L NXP Semiconductors N-channel 25 V 6.3 mΩ logic level MOSFET in LFPAK 2. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 S source 2 S source 3 S source 4 G gate mb D mounting base; connected to drain Graphic symbol mb D G mbb076 S 1 2 3 4 SOT669 (LFPAK; Power-SO8) 3. Ordering information Table 3. Ordering information Type number PH6325L PH6325L Product data sheet Package Name Description Version LFPAK; Power-SO8 plastic single-ended surface-mounted package; 4 leads SOT669 All information provided in this document is subject to legal disclaimers. Rev. 2 — 22 December 2011 © NXP B.V. 2011. All rights reserved. 2 of 14 PH6325L NXP Semiconductors N-channel 25 V 6.3 mΩ logic level MOSFET in LFPAK 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 150 °C - 25 V VGS gate-source voltage -20 20 V ID drain current VGS = 10 V; Tmb = 100 °C; see Figure 1 - 49.6 A VGS = 10 V; Tmb = 25 °C; see Figure 1; see Figure 3 - 78.7 A - 236 A IDM peak drain current pulsed; tp ≤ 10 µs; Tmb = 25 °C; see Figure 3 Ptot total power dissipation Tmb = 25 °C; see Figure 2 - 62.5 W Tstg storage temperature -55 150 °C Tj junction temperature -55 150 °C Source-drain diode IS source current Tmb = 25 °C - 52 A ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 208 A - 1.2 mJ - 115 mJ Avalanche ruggedness EDS(AL)R repetitive drain-source avalanche energy tp = 0.015 ms; unclamped; RGS = 50 Ω; ID = 3.4 A; VDD = 25 V; VGS = 10 V EDS(AL)S non-repetitive drain-source avalanche energy VGS = 10 V; Tj(init) = 25 °C; ID = 34 A; VDD = 25 V; tp = 0.15 ms; unclamped; RGS = 50 Ω [1][2] [1] Duty cycle is limited by the maximum junction temperature. [2] Repetitive avalanche failure is not determined simply by thermal effects. Repetitive avalanche transients should only be applied for short bursts, not every switching cycle. 03aa23 120 Ider (%) 03aa15 120 Pder (%) 80 80 40 40 0 0 0 50 100 150 200 0 Tmb (°C) Fig 1. Normalized continuous drain current as a function of mounting base temperature PH6325L Product data sheet 50 100 150 200 Tmb (°C) Fig 2. Normalized total power dissipation as a function of mounting base temperature All information provided in this document is subject to legal disclaimers. Rev. 2 — 22 December 2011 © NXP B.V. 2011. All rights reserved. 3 of 14 PH6325L NXP Semiconductors N-channel 25 V 6.3 mΩ logic level MOSFET in LFPAK 003aag936 103 ID (A) Limit RDSon = V DS / ID tp =10 μ s 102 100 μ s DC 10 1 ms 10 ms 100 ms 1 10-1 Fig 3. 1 10 102 VDS (V) Safe operating area; continuous and peak drain currents as a function of drain-source voltage PH6325L Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 22 December 2011 © NXP B.V. 2011. All rights reserved. 4 of 14 PH6325L NXP Semiconductors N-channel 25 V 6.3 mΩ logic level MOSFET in LFPAK 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from junction to mounting base see Figure 4 - - 2 K/W 003aaa560 10 Zth(j-mb) (K/W) 1 δ = 0.5 0.2 0.1 0.05 0.02 10−1 δ= P single pulse t tp 10−2 10−5 Fig 4. tp T T 10−4 10−3 10−2 10−1 t p (s) 1 Transient thermal impedance from junction to mounting base as a function of pulse duration PH6325L Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 22 December 2011 © NXP B.V. 2011. All rights reserved. 5 of 14 PH6325L NXP Semiconductors N-channel 25 V 6.3 mΩ logic level MOSFET in LFPAK 6. Characteristics Table 6. Characteristics Symbol Parameter Conditions Min Typ Max Unit Static characteristics V(BR)DSS drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = 25 °C 25 - - V VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = -55 °C; see Figure 7; see Figure 8 - - 2.2 V ID = 1 mA; VDS = VGS; Tj = 150 °C; see Figure 7; see Figure 8 0.5 - - V ID = 1 mA; VDS = VGS; Tj = 25 °C; see Figure 7; see Figure 8 1 1.5 2 V VDS = 25 V; VGS = 0 V; Tj = 25 °C - 0.06 1 µA VDS = 25 V; VGS = 0 V; Tj = 150 °C - - 500 µA VGS = 16 V; VDS = 0 V; Tj = 25 °C - 10 100 nA VGS = -16 V; VDS = 0 V; Tj = 25 °C - 10 100 nA VGS = 10 V; ID = 25 A; Tj = 150 °C; see Figure 9; see Figure 10 - 7.5 10.1 mΩ VGS = 4.5 V; ID = 25 A; Tj = 150 °C; see Figure 9; see Figure 10 - 11.8 15.2 mΩ VGS = 4.5 V; ID = 25 A; Tj = 25 °C; see Figure 9; see Figure 10 - 7.4 9.5 mΩ VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 9; see Figure 10 - 4.7 6.3 mΩ f = 1 MHz - 1.8 - Ω ID = 25 A; VDS = 12 V; VGS = 4.5 V; see Figure 11; see Figure 12 - 13.3 - nC ID = 0 A; VDS = 0 V; VGS = 4.5 V - 11.1 - nC - 4.9 - nC IDSS IGSS RDSon RG drain leakage current gate leakage current drain-source on-state resistance internal gate resistance Dynamic characteristics QG(tot) QGS total gate charge gate-source charge ID = 25 A; VDS = 12 V; VGS = 4.5 V; see Figure 11; see Figure 12 pre-threshold gate-source charge - 2.6 - nC QGS2 post-threshold gate-source charge - 2.3 - nC QGD gate-drain charge - 3.3 - nC VGS(pl) gate-source plateau voltage ID = 25 A; VDS = 12 V; see Figure 11; see Figure 12 - 2.4 - V Ciss input capacitance VDS = 0 V; VGS = 0 V; f = 1 MHz; Tj = 25 °C - 2420 - pF Coss output capacitance Crss reverse transfer capacitance td(on) turn-on delay time QGS1 VDS = 12 V; VGS = 0 V; f = 1 MHz; Tj = 25 °C; see Figure 13; see Figure 14 VDS = 12 V; VGS = 4.5 V; RG(ext) = 4.7 Ω; ID = 25 A - 1871 - pF - 517 - pF - 179 - pF - 25 - ns tr rise time - 25 - ns td(off) turn-off delay time - 32 - ns tf fall time - 12 - ns PH6325L Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 22 December 2011 © NXP B.V. 2011. All rights reserved. 6 of 14 PH6325L NXP Semiconductors N-channel 25 V 6.3 mΩ logic level MOSFET in LFPAK Table 6. Characteristics …continued Symbol Parameter Conditions Min Typ Max Unit - 0.85 1.2 V Source-drain diode VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; see Figure 15 trr reverse recovery time Qr recovered charge IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V; VDS = 25 V 003aaa561 40 10 V ID 4.5 V 2.7 V VGS = 2.6 V - 33 - ns - 13 - nC 003aaa562 40 ID (A) (A) 2.5 V 30 30 2.4 V Tj = 150 °C 2.3 V 20 20 25 °C 2.2 V 2.1 V 2V 10 10 1.8 V 1.6 V 0 0 0 0.5 1 1.5 VDS (V) 0 2 Tj = 25 °C Fig 5. 1 VGS (V) 3 Tj = 25 °C and 150 °C; VDS > ID X RDSon Output characteristics: drain current as a function of drain-source voltage; typical values 03aa33 2.5 VGS(th) (V) 2 1.5 Fig 6. Transfer characteristics: drain current as a function of gate-source voltage; typical values 03aa36 10-1 ID (A) max 10-2 typ 10-3 min typ max 10-4 min 1 10-5 0.5 0 -60 2 10-6 0 60 120 Tj (°C) 180 0 1 2 VGS (V) 3 Tj = 25 °C; VDS = 5 V Fig 7. Gate-source threshold voltage as a function of junction temperature PH6325L Product data sheet Fig 8. Sub-threshold drain current as a function of gate-source voltage All information provided in this document is subject to legal disclaimers. Rev. 2 — 22 December 2011 © NXP B.V. 2011. All rights reserved. 7 of 14 PH6325L NXP Semiconductors N-channel 25 V 6.3 mΩ logic level MOSFET in LFPAK 03af18 2 003aaa563 20 VGS = 2.4 V RDSon a 2.5 V 2.6 V (mΩ) 1.5 15 1 10 2.7 V 3V 4.5 V 0.5 10 V 5 0 -60 0 60 120 Tj (°C) 0 180 0 10 20 30 ID (A) 40 Tj = 25 °C Fig 9. Normalized drain-source on-state resistance factor as a function of junction temperature Fig 10. Drain-source on-state resistance as a function of drain current; typical values 003aaa566 10 VDS VDS = 4.5 V VGS (V) ID 12 V 8 19 V VGS(pl) 6 VGS(th) VGS 4 QGS1 QGS2 QGS QGD QG(tot) 2 003aaa508 0 0 10 20 QG (nC) 30 ID = 25 A; VDS = 4.5 V, 12 V and 19 V Fig 11. Gate charge waveform definitions PH6325L Product data sheet Fig 12. Gate-source voltage as a function of gate charge; typical values All information provided in this document is subject to legal disclaimers. Rev. 2 — 22 December 2011 © NXP B.V. 2011. All rights reserved. 8 of 14 PH6325L NXP Semiconductors N-channel 25 V 6.3 mΩ logic level MOSFET in LFPAK 003aaa564 104 003aaa633 4000 C (pF) C (pF) Ciss 3000 Ciss Crss 103 2000 Coss 1000 Crss 102 10−1 0 1 10 VDS (V) 102 VGS = 0 V; f = 1 MHz 0 2 4 6 8 10 VGS (V) Tj = 25 °C and 150 °C; VDS = 0 V Fig 13. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values Fig 14. Input and reverse transfer capacitances as a function of gate-source voltage; typical values 003aaa565 40 IS (A) 30 Tj = 150 °C 20 25 °C 10 0 0.2 0.4 0.6 0.8 1 VSD (V) Tj = 25 °C and 150 °C; VGS = 0 V Fig 15. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values PH6325L Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 22 December 2011 © NXP B.V. 2011. All rights reserved. 9 of 14 PH6325L NXP Semiconductors N-channel 25 V 6.3 mΩ logic level MOSFET in LFPAK 7. Package outline Plastic single-ended surface-mounted package (LFPAK; Power-SO8); 4 leads A2 A E SOT669 C c2 b2 E1 b3 L1 mounting base b4 D1 D H L2 1 2 3 e 4 w M A b 1/2 X c e A (A 3) A1 C θ L detail X y C 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A A1 A2 A3 b b2 1.20 0.15 1.10 0.50 4.41 0.25 1.01 0.00 0.95 0.35 3.62 b3 b4 2.2 2.0 0.9 0.7 c D (1) c2 D1(1) E(1) E1(1) max 0.25 0.30 4.10 4.20 0.19 0.24 3.80 5.0 4.8 3.3 3.1 e H L L1 L2 w y θ 1.27 6.2 5.8 0.85 0.40 1.3 0.8 1.3 0.8 0.25 0.1 8° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT669 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 06-03-16 11-03-25 MO-235 Fig 16. Package outline SOT669 (LFPAK; Power-SO8) PH6325L Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 22 December 2011 © NXP B.V. 2011. All rights reserved. 10 of 14 PH6325L NXP Semiconductors N-channel 25 V 6.3 mΩ logic level MOSFET in LFPAK 8. Revision history Table 7. Revision history Document ID Release date Data sheet status Change notice Supersedes PH6325L v.2 20111222 Product data sheet - PH6325L v.1 Modifications: PH6325L v.1 PH6325L Product data sheet • The format of this document has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • Legal texts have been adapted to the new company name where appropriate. Status changed from preliminary to product. 20040428 Preliminary data sheet - All information provided in this document is subject to legal disclaimers. Rev. 2 — 22 December 2011 - © NXP B.V. 2011. All rights reserved. 11 of 14 PH6325L NXP Semiconductors N-channel 25 V 6.3 mΩ logic level MOSFET in LFPAK 9. Legal information 9.1 Data sheet status Document status [1] [2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Preview — The document is a preview version only. The document is still subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 9.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. PH6325L Product data sheet Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. All information provided in this document is subject to legal disclaimers. Rev. 2 — 22 December 2011 © NXP B.V. 2011. All rights reserved. 12 of 14 PH6325L NXP Semiconductors N-channel 25 V 6.3 mΩ logic level MOSFET in LFPAK Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V. HD Radio and HD Radio logo — are trademarks of iBiquity Digital Corporation. 10. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com PH6325L Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 22 December 2011 © NXP B.V. 2011. All rights reserved. 13 of 14 PH6325L NXP Semiconductors N-channel 25 V 6.3 mΩ logic level MOSFET in LFPAK 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3 Thermal characteristics . . . . . . . . . . . . . . . . . . .5 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . .12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Contact information. . . . . . . . . . . . . . . . . . . . . .13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 22 December 2011 Document identifier: PH6325L