BUV27

BUV27 NPN Silicon Power Transistor This device is designed for use in switching regulators and motor control. Features http://onsemi.com • Low Collection Emitter Saturation Voltage • Fast Switching Speed • Pb−Free Package is Available* POWER TRANSISTOR 12 AMPERES 120 VOLTS 70 WATTS MARKING DIAGRAM MAXIMUM RATINGS Rating Collector−Emitter Sustaining Voltage Collector−Emitter Breakdown Voltage Emitter−Base Voltage Collector Current Base Current Total Device Dissipation (TC = 25°C) Derate above 25°C Operating and Storage Temperature − Continuous − Peak (Note 1) Symbol VCEO VCBO VEBO IC ICM IB PD TJ, Tstg Value 120 240 7.0 12 20 4.0 70 0.56 − 65 to 150 Unit Vdc Vdc Vdc Adc Adc W W/°C °C 1 TO−220AB CASE 221A STYLE 1 2 4 BUV27G AYWW 3 THERMAL CHARACTERISTICS Rating Thermal Resistance, Junction−to−Case Junction−to−Ambient Symbol RqJC RqJA Max 1.78 62.5 Unit °C/W BUV27 A Y WW G = Device Code = Assembly Location = Year = Work Week = Pb−Free Package Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Pulse Test: Pulse Width = 5.0 ms, Duty Cycle ≤ 10%. ORDERING INFORMATION Device BUV27 BUV27G Package TO−220AB TO−220AB (Pb−Free) Shipping 50 per Rail 50 per Rail *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2005 1 August, 2005 − Rev. 1 Publication Order Number: BUV27/D BUV27 ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) Symbol ICER ICEX IEBO VCEO(sus) VEBO VCE(sat) (Note 2) VBE(sat) (Note 2) Parameter Collector Cut−off Current (RBE = 50 W) Collector Cut−off Current Emitter Cut−off Current (IC = 0) Collector−Emitter Sustaining Voltage Emitter−Base Voltage (IC = 0) Collector−Emitter Saturation Voltage Base−Emitter Saturation Voltage Test Conditions VCE = 240 V, TC = 125°C VCE = 240 V, VBE = −1.5 V, TC = 125°C VBE = 5 V IC = 0.2 A, L = 25 mH IE = 50 mA IC = 4 A, IB = 0.4 A IC = 8 A, IB = 0.8 A IC = 8 A, IB = 0.8 A 120 7.0 30 0.7 1.5 2.0 Min Typ Max 3.0 1.0 1.0 Unit mA mA mA V V V V Resistive Load ton ts tf Turn−on Time Storage Time Fall Time VCC = 90 V, IC = 8 A VBE = −6 V, IB1 = 0.8 A RBB = 3.75 W 0.4 0.5 0.12 0.8 1.2 0.25 ms ms ms Inductive Load ts tf ts tf Storage Time Fall Time Storage Time Fall Time VCC = 90 V, IC = 8 A IB1 = 0.8 A, VBE = −5 V LB = 1 mH VCC = 90 V, IC = 8 A IB1 = 0.8 A, VBE = −5 V LB = 1 mH, TJ = 125°C 0.6 0.04 2.0 0.15 ms 2. Pulsed: Pulse Duration = 300 ms, Duty Cycle = 2% http://onsemi.com 2 BUV27 1.0 0.7 0.5 0.3 0.2 0.1 0.1 0.05 0.02 ZqJC(t) = r(t) RqJC RqJC = 1.785C/W MAX D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) − TC = P(pk) ZqJC(t) SINGLE PULSE 0.01 0.01 0.02 0.05 0.1 0.2 0.5 1.0 2.0 5.0 t, TIME (ms) 10 20 r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED) D = 0.5 0.2 0.07 0.05 0.03 0.02 0.01 t2 DUTY CYCLE, D = t1/t2 50 100 200 500 1.0 k Figure 1. Thermal Response ,C I COLLECTOR CURRENT (AMP) 20 16 10 100 ms 5 ms dc 1.0 0.1 BONDING WIRE LIMITED THERMALLY LIMITED SECOND BREAKDOWN LIMITED @ TC = 25°C 5.0 10 50 20 120 150 VCE, COLLECTOR−EMITTER VOLTAGE (V) 0.02 2.0 There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC − VCE limits of the transistor that must be observed for reliable operation, i.e., the transistor must not be subjected to greater dissipation then the curves indicate. The data of Figures 2 is based on TJ(pk) = 150°C; TC is variable depending on conditions. Second breakdown pulse limits are valid for duty cycles to 10% provided TJ(pk) < 150°C. TJ(pk) may be calculated from the data in Figure 1. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. Figure 2. Forward Bias Safe Operating Area TA PD, POWER DISSIPATION (WATTS) TC 3.0 60 2.0 40 TC 1.0 20 TA 0 0 0 20 40 60 80 100 120 140 160 T, TEMPERATURE (°C) Figure 3. Power Derating http://onsemi.com 3 BUV27 PACKAGE DIMENSIONS TO−220AB CASE 221A−09 ISSUE AA NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. DIM A B C D F G H J K L N Q R S T U V Z INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.147 0.095 0.105 0.110 0.155 0.018 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 −−− −−− 0.080 BASE COLLECTOR EMITTER COLLECTOR MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 3.73 2.42 2.66 2.80 3.93 0.46 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 −−− −−− 2.04 −T− B 4 SEATING PLANE F T S C Q 123 A U K H Z L V G D N R J STYLE 1: PIN 1. 2. 3. 4. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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