www.fairchildsemi.com
FAN7585
Intelligent Voltage Mode PWM IC
Features
Description
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The FAN7585 is a fixed frequency improved performance
pulse width modulation control circuit with complete housekeeping circuitry for use in the secondary side of SMPS
(Switched Mode Power Supply). It contains various functions, which are overvoltage protection, undervoltage protection, over current protection, remote on/off control, power
good signal generator, etc.
Complete PWM Control and House Keeping Circuitry
Few External Components
Precision Voltage Reference Trimmed to 2%
Dual Output for Push-Pull Operation
Each Output TR for 200mA Sink Current
Variable Duty Cycle by Dead Time Control
Soft Start Capability by Using Dead Time Control
Double Pulse Suppression Logic
Over Voltage Protection for 3.3V/5V/12V
Under Voltage Protection for 3.3V/5V/12V
Over Current Protection for 3.3V/5V/12V
One More External Input for Various Protection (PT)
Remote On/Off Control Function (PS-ON)
Latch Function Controlled by Remote and Protection
Input
• Power Good Signal Generator with Hysteresis
Typical Application
• PC Power Supply
OVP (Over Voltage Protection) Section
It has OVP functions for +3.3V,+5V,+12V outputs and PT.
The circuit is made up of a comparator with four detecting
inputs and without hysteresis voltage. Especially, PT (Pin19)
is prepared for an extra OVP input or another protection
signal.
UVP (Under Voltage Protection) Section
It also has UVP functions for +3.3V, +5V, +12V outputs. The
block is made up of a comparator with three detecting inputs
and without hysteresis voltage.
OCP (Over Current Protection) Section
It has precision OCP functions for +3.3V, +5V, +12V outputs. The block is made up of three comparators with current
source setting function. Two inputs of each OCP comparator
are connected to both sides of current sensing inductor that is
located in the secondary output of SMPS.
Remote On/Off Section
The remote on/off section is used to control SMPS externally. If a high signal or open state is supplied to the remote
on/off input, PWM signal becomes a high state and all secondary outputs are grounded. The remote on/off signal is
transferred with some on-delay and off-delay time of 8ms,
24ms respectively.
24-SDIP
Precision Reference Section
1
The reference voltage is trimmed to ±2%.
(4.9V ≤ Vref ≤ 5.1V)
PG (Power Good Signal Generator) Section
The power good signal generator is to monitor the voltage
level of power supply for safe operation of a microprocessor
having some delay time at turn-on. The power good output
should be low state before the output voltatge is out of regulation at turn-off.
Rev. 1.0.0
©2003 Fairchild Semiconductor Corporation
FAN7585
Internal Block Diagram
RT/CT
7
COMP
2
E/A(-)
3
E/A(+)
OSCILLATOR
PWM
CONTROL
4
CK
Q
24
C1
22
C2
5
TREM
6
REM
(PS-ON)
OVP COMP
19
L
18
PT
V12
16
V5
14
V33
13
IS33
15
IS5
17
IS12
Delay
Controller
Q
0.1V
1.25V
Q
L
R
DEAD TIME
CONTROLER
D
L
L
S
1.4V
DTC
Vref
21
12
Vref
INTERNAL
BIAS
Vref
Start
Up
Vcc
1.25V
L
1
Vref
L
H UVP COMP
Iref1=Vref/RI
RI
V5
8
1.8V!"0.6V
Vref
Ichag
H
H
L
L
1.25V
H
OCP
L
L
V5
PG
GENERATOR
L
COMP3
L
H
L
1.8V!"0.6V
L
DET
9
L
COMP2
Iref1*5
10
TPG
2
11
20
PG TUVP
23
GND
FAN7585
Pin Definition
C1
GND
C2
24
23
22
DTC TUVP
21
20
PT
V12
IS12
V5
IS5
V33
IS33
19
18
17
16
15
14
13
8
9
10
11
12
RI
DET
TPG
PG
Vref
I/O
Pin Function Description
FAN7585
1
2
3
4
5
6
7
Vcc COMP E/A(-) E/A(+) TREM REM RT/CT
Pin Description
Pin
Number
Pin
Name
I/O
Pin Function Description
Pin
Number
Pin
Name
1
VCC
I
Supply Voltage
13
IS33
I
OCP Input for +3.3V
2
COMP
O
E/A Output
14
V33
I
OVP, UVP Input for +3.3V
3
E/A(-)
I
E/A (-) Input
15
IS5
I
OCP Input for +5V
4
E/A(+)
I
E/A (+) Input
16
V5
I
OVP, UVP Input for 5V
5
TREM
-
Remote On/Off Delay
17
IS12
I
OCP Input for +12V
6
REM
I
Remote On/Off Input
18
V12
I
OVP, UVP Input for +12V
7
RT/CT
-
Oscillation Freq. Setting R,C
19
PT
I
Extra Protection Input
8
RI
-
OCP Current Setting R
20
TUVP
-
UVP Delay
9
DET
I
Detect Input
21
DTC
I
Deadtime Control Input
10
TPG
-
PG Delay
22
C2
O
Output 2
11
PG
O
Power Good Signal Output
23
GND
-
Ground
12
Vref
O
Precision Reference Voltage
24
C1
O
Output 1
3
FAN7585
Pin Function
Pin Number Pin Name
4
Pin Function Description
1
VCC
Supply voltage. Operating range is 15V~30V. Test condition : VCC=20V, Ta=25°C.
2
COMP
Error amplifier output. It is connected to non-inverting input of pulse width modulator
comparator.
3
E/A(-)
Error amplifier inverting input. Its reference voltage is always 1.25V.
4
E/A(+)
Error amplifier non-inverting input feedback voltage. This pin may be used to sense
power supply output voltages.
5
TREM
Remote On/Off delay. Ton/Toff=8ms/24ms (Typ.) with C=0.1uF. Its High/Low threshold
voltages are 1.8V/0.6V.
6
REM
Remote On/Off input. It is TTL operation and its threshold voltage is 1.4V. Voltage at
this pin can reach normal 4.6V, with absolute maximum voltage, 5.25V.
If REM = “Low”, PWM = “Low”, that means the main SMPS is operational.
when REM = “High”, then PWM = “High” and the main SMPS is turned-off.
7
RT/CT
Oscillation frequency setting R, C.(Test condition RT =10kΩ)
8
RI
9
DET
AC input under voltage detection pin. Its threshold voltage is 1.25V Typ.
10
TPG
PG delay. Td =260ms (Typ.) with CTPG = 2.2uF. The High/Low threshold voltages are
1.8V/0.6V and the voltage of Pin10 is clamped to 2.9V for noise margin.
11
PG
Power Good output signal. PG = “High” means that the power is “Good” for operation
and PG = “Low” means “Power fail”.
12
Vref
Precision voltage reference is trimmed to ±2% (Typical Value = 5V).
13
IS33
Current sense input for +3.3V output. This pin is connected to the current sensing
resistor or inductor. You can define OCP offset voltage for +3.3V by using RI resistor
externally. If you connect 62kΩ at pin 8 to ground, the reference current(Iref1) should be
20uA. After that , you can make a constant OCP offset voltage(Voffset=Roffset*5*20uA).
In case the voltage drop(IO.33*Rs) of the sense resistor or inductor is larger than offset
voltage, after OCP delay time the main SMPS is turned off. So the over current level is
determined by the following equation. IO.33=Voffset/Rs.
14
V33
OVP, UVP input for +3.3V output (Typical Value = 4.1V/2.3V).
15
IS5
Current sense input for +5V output. You can make +5V OCP function as the previous
method in IS5(pin15).
16
V5
OCP current setting pin. You can fix the OCP reference current (Iref1) by using RI
resistor.
OVP, UVP input for +5V output (Typical Value = 6.4V/4.0V).
Current sense input for +12V output. You can make +12V OCP function as the previous
method in IS12(pin17).
17
IS12
18
V12
OVP, UVP input for 12V output (Typical Value = 14.2V/10V).
19
PT
This is prepared for an extra OVP input or another protection signal (Typical Value =
1.25V).
20
TUVP
Timing delay pin for under voltage protection and over current protection. Its threshold
voltage is 1.8V and clamped to 2.9V after full charging. Target of delay time is 38ms and
it is realized through external capacitor (CTUVP = 0.47uF).
21
DTC
Deadtime control input. The deadtime control comparator has an effective 120mV input
offset which limits the minimum output dead time. Dead time may be imposed on the
output by setting the dead time control input to a fixed voltage, ranging from 0V to 3.3V.
22
C2
23
GND
24
C1
Output drive pin for push-pull operation.
Ground.
Output drive pin for push-pull operation.
FAN7585
Absolute Maximum Ratings
Characteristics
Supply Voltage
Symbol
Value
Unit
VCC
40
V
Collector Output Voltage
VC1,VC2
40
V
Collector Output Current
IC1,IC2
200
mA
Power Dissipation (FAN7585)
PD
1.5
W
Operating Temperature Range
TOPR
-25 to 85
°C
Storage Temperature Range
TSTG
-65 to 150
°C
Temperature Characteristics
Characteristics
Symbol
Min.
Typ.
Max.
Unit
Temperature Coefficient of Vref (-25°C ≤ Ta ≤ 85°C)
∆Vref/∆T
-
0.01
-
%/°C
5
FAN7585
Electrical Characteristics
(Vcc=20V, Ta=25°C, unless otherwise specified)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
4.9
5
5.1
V
REFERENCE SECTION
Reference Output Voltage
Vref
Iref=1mA
Line Regulation
∆Vref.LINE
15V ≤ VCC ≤ 30V
-
2.0
25
mV
Load Regulation
∆Vref.LOAD
1mA ≤ Iref ≤ 10mA
-
1.0
15
mV
∆Vref/∆T
-25°C ≤ Ta ≤ 85°C
-
0.01
-
%/°C
15
35
75
mA
Temperature Coefficient of Vref
(1)
Short Circuit Output Current
ISC
Vref = 0
fosc
CT=0.01uF, RT=12k
-
9.4
-
kHz
fosc/T
CT=0.01uF, RT=12k
-
2
-
%
OSCILLATOR SECTION
Oscillation Frequency
Frequency Change with Temperature (1)
DEAD TIME CONTROL SECTION
Input Bias Current
IB(DT)
Maximum Duty Voltage
DCMAX
Input Threshold Voltage
VTH(DT)
-
-
-2.0
-10
uA
45
48
50
%
Zero Duty Cycle
-
3.0
3.3
Max. Duty Cycle
0
-
-
1.20
1.25
1.30
V
-
-0.1
-1.0
uA
70
95
-
dB
-
650
-
kHz
Pin21 (DTC)=0V
V
ERROR AMP SECTION
Inverting Reference Voltage
Input Bias Current
Vref(EA)
IB(EA)
Open-Loop Voltage Gain (1)
GVO
Unit-Gain Bandwidth (1)
BW
Output Sink Current
VCOMP=2.5V
0.5V ≤ VCOMP ≤ 3.5V
-
ISINK
VCOMP = 0.7V
0.3
0.9
-
mA
ISOURCE
VCOMP = 3.5V
-2.0
-4.0
-
mA
VTH(PWM)
Zero Duty Cycle
-
4
4.5
V
Output Saturation Voltage
VCE(SAT)
IC = 200mA
-
1.1
1.3
V
Collector Off-State Current
IC(off)
Output Source Current
PWM COMPARATOR SECTION
Input Threshold Voltage
OUTPUT SECTION
-
2
100
uA
Rising Time(1)
TR
-
-
100
200
ns
Time(1)
TF
-
-
50
200
ns
Falling
6
VCC=VC=30V, VE=0V
FAN7585
Electrical Characteristics (Continued)
(Vcc=20V, Ta=25°C, unless otherwise specified)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
VOVP1
-
3.8
4.1
4.3
V
Over Voltage Protection for +5V
VOVP2
-
6.0
6.4
6.8
V
Over Voltage Protection for +12V
VOVP3
-
13.5
14.2
15.0
V
VPT
-
1.20
1.25
1.30
V
Under Voltage Protection for +3.3V
VUVP1
-
2.1
2.3
2.5
V
Under Voltage Protection for +5V
VUVP2
-
3.7
4.0
4.3
V
Under Voltage Protection for +12V
VUVP3
-
PROTECTION SECTION
Over Voltage Protection for +3.3V
Input Threshold Voltage for PT
9.2
10
10.8
V
Voltage for Current Reference
VRI
1.21
1.25
1.29
V
Current Reference(1)
Iref1
10
-
65
uA
C=0.47uF
-16
-21
-28
uA
C=0.47uF, VTH=1.8V
24
38
57
ms
-5
-
5
mV
2.0
-
-
V
Charging Current for UVP, OCP Delay
UVP, OCP Delay Time
Offset Voltage of OCP Comparator
ICHG.UVP
TD.UVP
VOFFSET
REMOTE ON/OFF SECTION
REM On Input Voltage
VREMH
REM Off Input Voltage
VREML
-
-
-
0.8
V
REM Off Input Bias Current
IREML
VREM = 0.4V
-
-
-1.6
mA
REM On Open Voltage
IREM = -200uA
2.0
-
5.25
V
REM On Delay Time
Ton
C=0.1uF
4
8
14
ms
REM Off Delay Time
Toff
C=0.1uF
16
24
34
ms
-
1.20
1.25
1.30
V
-
REMOTE ON/OFF
VREM(OPEN)
-
SECTION (2)
Detecting Input Voltage
VIN(DET)
Detecting V5 Voltage
V5(DET)
4.1
4.3
4.5
V
Hysteresis Voltage 1
HY1
COMP1, 2
10
40
80
mV
Hysteresis Voltage 2
HY2
COMP3
0.6
1.2
-
V
PG Output Load Resistor
Charging Current for PG Delay
PG Delay Time
PG Output Saturation Voltage
0.5
1
2
kΩ
C=2.2uF
-
-10
-15
-23
uA
C=2.2uF, VTH=1.8V
100
260
500
ms
-
0.2
0.4
V
-
10
20
mA
RPG
ICHG.PG
TD.PG
VSAT(PG)
IPG=10mA
TOTAL DEVICE
Standby Supply Current
ICC
-
Note:
1. These parameters, although guaranteed over their recommended operating conditions are not 100% tested in production.
2. REM on delay time (Pin6 REM: “L” → “H”),
REM off delay time (Pin6 REM: “H” → “L”)
7
FAN7585
Application Informations
Timing Resistance vs Frequency
CT=1nF
FREQUENCY(KHz)
100
CT=2.2nF
CT=4.7nF
CT=10nF
10
CT=20nF
CT=50nF
CT=100nF
1
0.2
2
3
4
5
6
7 8 9 10
20
30
RT(Kohm)
Fig 1. Timing Resistance vs Frequency
Rt/Ct
Feedback
Dead-time
control
Ck
Q
Q
Output Q1
Output Q2
Fig 2. Operating Waveform
8
40
50
FAN7585
1. OVP Block
Vo
3.3V
5V
12V
14
16
18
R1
R101
R3
R5
PT
D
Vref=5V
19
A
B
R102
R2
SET of
R/S Latch
C
OVP COMP
R4
R6 1.25V
R102, R102
: External Components
The OVP function is simply realized by connecting Pin14, Pin16, Pin18 to each secondary outputs. R1, R2, R3, R4, R5, R6 are
internal resistors of the IC. Each OVP level is determined by resistor ratio and the typical values are 4.1V/6.4V/14.2V respectively.
• OVP detecting voltage for +3.3V
V
OVP1
R +R
R +R
1
2
1
2
( +3.3V ) = ---------------------- × V = ---------------------- × Vref = 4.1V
A
R
R
2
2
• OVP detecting voltage for +5V
V
OVP2
R +R
R +R
3
4
3
4
( +5V ) = ---------------------- × V = ---------------------- × Vref = 6.4V
B
R
R
4
4
• OVP detecting voltage for +12V
V
OVP3
R +R
R +R
5
6
5
6
( +12V ) = ---------------------- × V = ---------------------- × Vref = 14.2V
C
R
R
6
6
Especially, Pin19(PT) is prepared for extra OVP input or another protection signal. That is, if you want over voltage protection
of extra output voltage, then you can make a function with two external resistors.
• OVP detecting voltage for PT
R
+R
R
+R
101
102
101
102
PT = ----------------------------------- × V = ----------------------------------- × Vref
D
R
R
102
102
In the case of OVP, a system designer should know a fact that the main power can be dropped after a little time because of
system delay, even if PWM is triggered by OVP. So when the OVP level is tested with a set, you should check the secondary
outputs(+3.3V/+5V/+12V) and PG(Pin11) simultaneously. Then you can know the each OVP level as checking each output
voltage in just time that PG(Pin11) is triggered from high to low.
9
FAN7585
2. UVP Block
3.3V
5V
12V
14
16
18
R1
R3
R5
Vref=5V
A
SET of
R/S Latch
B
C
R2
R4
UVP COMP
R6 1.25V
The block is made up of a comparator with three detecting inputs and without hysteresis voltage. Each UVP level is
determined by resistor ratio and the typical values are 2.3V/4.0V/10V respectively.
• UVP detecting voltage for +3.3V
V
R +R
R +R
1
2
1
2
( +3.3V ) = ---------------------- × V = ---------------------- × Vref = 2.3V
UVP1
A
R
R
2
2
• UVP detecting voltage for +5V
V
UVP2
R +R
R +R
3
4
3
4
( +5V ) = ---------------------- × V = ---------------------- × Vref = 4V
B
R
R
4
4
• UVP detecting voltage for +12V
V
UVP3
R +R
R +R
5
6
5
6- × Vref = 10V
( +12V ) = ---------------------- × V = --------------------C
R
R
6
6
In the case of UVP, a system designer should know a fact that the main power can be dropped after some delay. (38msec@
CTUVP=0.47uF)
So when the UVP level is tested with a set, you should remove protection delay capacitor(Pin20) and check PG(Pin11). You
can know the each UVP level as checking each output voltage in just time that PG(Pin11) is triggered from high to low.
10
FAN7585
3. OCP Block
OVP Outpu t
Sense Inductor
Equivalent Resistor(Rs) ≅ 5mΩ
VS12
18
Io
17
Roffset
COMP1
IS12
(Offset Voltage Resistor)
VS5
TPROT
Iref × 5
Iref1
(100uA)
16
IS5
15
COMP2
Iref1
×5
Iref ×5
(100uA)
VS33 14
IS33 13
COMP3
Iref1
×5
Iref ×5
(100uA)
Iref1=20µA at RI=62kΩ
It also has OCP function for +3.3V,+5V,+12V outputs. The block is made up of three comparators. Pin17(IS12), pin15(IS5)
and pin13(IS33) are current sense inputs for +12V, +5V and +3.3V outputs respectively. These pins are connected to the current sensing resistor or inductor.
Each OCP level is determined by RI resistor , so you can define over current protection level by changing RI resistor. Pin8(RI)
voltage is always 1.25V, so if you connect 62kΩ resistor, the reference current is 20uA(Iref1).
If the voltage drop of the sense resistor or inductor is larger than offset voltage (Voffset = Roffset × 5 × Iref1), the DTC becomes
"High" after some delay(38ms at CTUVP=0.47uF)and the main SMPS is turned off. That means the output voltage(+3.3V,
+5V, +12V) will be ground level.
After main power is turned off at OCP and initialized by REM, if REM signal is changed from "High" to "Low", main power
becomes operational.
For example, if you want to define 5V output OCP level at 10A in the condition of equivalent resistor(Rs)= 5mΩ, you can
determine the offset voltage resistor(Roffset) as following method.
- Iref1 = 1.25V / 62kΩ = 20uA
- Voffset = RS × 5 × Iref1 = 5mΩ × 10A = 50mV
- Therefore, Roffset = 50mV / (5 × Iref1) = 500Ω
By the way, OCP output signal can be delayed by protection delay capacitor(CTUVP) and its delay time is decided by the value
of CTUVP.
C TUVP *∆V 0.47uF*1.7V
Tuvp ≈ ---------------------------- = ----------------------------------- = 38msec
∆I
21uA
If you use too small (or large) capacitor, the charging time would decrease (or increase) very much and it can cause
malfunction at the transient time. So you have to choose the reasonable delay time for system optimization by changing the
external capacitor value.
11
FAN7585
4. Remote On/Off & Delay Block
Vref
12
5V
Ton
Toff
PWM
REM
Ion
Trem
Rpull
5
6
0.6V↔1.8V
Ion+Ioff
1.25V
Trem 2.2V
0.1uF
PG
Block
Q1
Remote On/Off
C
COMP
Irem
COMP6
REM
B
A
Q2
Ioff = Irem - Ion
∆Von=2V, ∆Voff=2.1V
Remote On/Off section is controlled by a microprocessor. If a high signal is supplied to the Remote On/Off input(Pin6), the
output of COMP6 becomes high status. The output signal is transferred to ON/OFF delay block and PG block.
If no signal is supplied to Pin6, Pin6 maintains high status(=5V) for pull-up resistor, Rpull.
When Remote On/Off is high, it produces PWM(Pin6) "High" signal after ON delay time (about 8ms with CTREM=0.1uF) for
stabilizing system. Then, all outputs (+3.3V, +5V, +12V) are grounded.
When Remote On/Off is changed to "Low", it produces PWM "Low" signal after Off delay time (about 24ms with
CTREM=0.1uF) for stabilizing the system. If REM is low, then PWM is low. That means the main SMPS is operational. When
REM is high, PWM is high and the main SMPS is turned off.
Remote On/Off delay time can be calculated by following equation.
C TREM × ∆Von
0.1uF × 2V
Ton = K1 × ---------------------------------------- ≈ 0.95 × ------------------------------ = 8msec
Ion
23uA
C TREM × ∆Voff
0.1uF × 2.1V
Toff = K 2 × ---------------------------------------- ≈ 0.8 × ----------------------------------- = 24msec
Ioff
7uA
k1, k2: constant value gotten by test
In above equation, a typical capacitor value is 0.1uF. If the capacitor is changed to larger value, it can cause malfunction in
case of AC power on at "REM=High". Because PWM maintains Low status and main power turns on for on delay time. So
you should use 0.1uF or smaller capacitor.
12
FAN7585
5. Power Good Signal Generator
Vref +5V
12
16
Vcc
R13
11
Vref
R11
R15
1 kΩ
Ichg
PG COMP
PG
COMP1
60kΩ
Q3
COMP3
Vref
DET
Q2
0.6V
1.8V
9
4.7kΩ
10 TPG
COMP2
R12
R14
1.25V
Remote
ON/OFF
C PG
2.2 uF
Power Good Signal Generator circuit generates "ON or OFF" signal depending on the status of output voltage to prevent the
malfunctions of following systems like microprocessor, etc. caused by the output instability at power on or off .
At power on, it produces PG "High" signal after some delay time(about 260ms with CTPG=2.2uF) for stabilizing output voltage. At power off, it produces PG "Low" signal without delay time by sensing the status of power source for protecting following systems. Vcc detection point(Pin9) can be calculated by following equation. Recommended values of R11, R12 are
determined by the following equation.
R11
DET = 1.25V × 1 + ----------- = 17.2V
R12
The COMP3 creates PG "Low" without delay when +5V output falls to less than 4.0V to prevent some malfunction at transient
status, thus it improves system stability.
When Remote On/Off signal is high, it generates PG "Low" signal without delay. It means that PG becomes "Low" before
main power is grounded.
PG delay time(TPG) is determined by capacitor value(CTPG), threshold voltage of COMP3 and the charging current and its
euqation is as following.
C TPG × ∆V C TPG × Vth 2.2uF × 1.8V
- ≈ ------------------------------ = ----------------------------------- ≈ 260msec
T PG = ---------------------------Ichg
Ichg
15uA
Considering the lightning surge and noise, there are two types of protections. One is a few time delay between TPG and PG for
safe operation and another is some noise margin of Pin10.
Noise_Margin_of_TPG = VPin10(max)- Vth(L) = 2.9V - 0.6V = 2.3V
13
1
2
4
1
1
3
3
2
+
3
4
5
T1
6
RS1
CS1
2
Q1
D15
7
C3
R4
Q2
D16
8
R1
R2
R3
R5
D22
9
B+
C7
C8
D17
D18
R6
D21
10
C1 +
C2 +
R38
C12
R40
IS12
220Vac
(Open)
110Vac
(Short)
T2
5
BD1
2
1
CY1
CX2
D19
6
Line Filter
CY2
VDD
R53
+5Vsb
7
10
11
2
CX1
9
7
6
5
8
F1
t
RT1
L8
CO10
8
B+
4
C6
D23
CO9
L9
CO12
D20
R39
C13
R48
RS3
RS2
CS3
LM1
SW1
R11 R10
D30
CO11
D24
1
3
2
1
AC_INPUT
R7
R8
R12
R55
R56
C24
Q5
R51
R49
FAN7585
D25
C4
R54
R58
D27
VDD
23
U3
KA431
Q4
D26
C23
R45
R46
IS33
IS33
+5V
C16 R44
+
T3
4
D29
CS2
D3
CD1
CD2
D9
D1
D2
D4
RD1
D6
RD2
D10
D13
D14
D5
D8
D11
D12
R34
Q3
KA431
L1
L1-1
R33
R32
CO5
L1-4
L1-3
L1-2
L2
R37
CO1
L7
CO3
IS33
C11
L3
L4
L5
L6
VR2
IS12
IS5
CO6
R35
R36
CO2
CO4
CO7
CO8
R29
R31
R26
R25
R27
R30
C10
VR1
R20
R21
R22
R24
R23
R28
+12V
+5V
-12V
-5V
+3.3V
14
+3.3V
C17
V33
Vref
13
PG
12
C18
IS5
IS5
Tp g
14
11
PG
16
V5
DET
9
15
10
C19
+12V
R43
C15
R41
C14
20
R42
18
V12
17
IS12
8
RI
7
Rt/Ct
C20
R47
R57
R52
D28
R50
PSON
21
Tu vp
19
REM(PSON)PT
6
Tr em
5
DTC
24
C1
22
EA(+)
C21
4
C2
3
EA(-)
C22
GND
COMP
2
Vcc
1
R9
5H0165
C101
3
2
GND D
1
3
FB Vcc
4
C5
C100
2
FAN7585
Typical Application Circuit
FAN7585
Mechanical Dimensions
Package
Dimensions in millimeters
24-SDIP
15
FAN7585
Ordering Information
Product Number
Package
Operating Temperature
FAN7585
24-SDIP
-25°C ~ 85°C
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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