FAN7585

www.fairchildsemi.com FAN7585 Intelligent Voltage Mode PWM IC Features • • • • • • • • • • • • • • Complete PWM Control and House Keeping Circuitry Few External Components Precision Voltage Reference Trimmed to 2% Dual Output for Push-Pull Operation Each Output TR for 200mA Sink Current Variable Duty Cycle by Dead Time Control Soft Start Capability by Using Dead Time Control Double Pulse Suppression Logic Over Voltage Protection for 3.3V/5V/12V Under Voltage Protection for 3.3V/5V/12V Over Current Protection for 3.3V/5V/12V One More External Input for Various Protection (PT) Remote On/Off Control Function (PS-ON) Latch Function Controlled by Remote and Protection Input • Power Good Signal Generator with Hysteresis Description The FAN7585 is a fixed frequency improved performance pulse width modulation control circuit with complete housekeeping circuitry for use in the secondary side of SMPS (Switched Mode Power Supply). It contains various functions, which are overvoltage protection, undervoltage protection, over current protection, remote on/off control, power good signal generator, etc. OVP (Over Voltage Protection) Section It has OVP functions for +3.3V,+5V,+12V outputs and PT. The circuit is made up of a comparator with four detecting inputs and without hysteresis voltage. Especially, PT (Pin19) is prepared for an extra OVP input or another protection signal. UVP (Under Voltage Protection) Section It also has UVP functions for +3.3V, +5V, +12V outputs. The block is made up of a comparator with three detecting inputs and without hysteresis voltage. Typical Application • PC Power Supply OCP (Over Current Protection) Section It has precision OCP functions for +3.3V, +5V, +12V outputs. The block is made up of three comparators with current source setting function. Two inputs of each OCP comparator are connected to both sides of current sensing inductor that is located in the secondary output of SMPS. Remote On/Off Section The remote on/off section is used to control SMPS externally. If a high signal or open state is supplied to the remote on/off input, PWM signal becomes a high state and all secondary outputs are grounded. The remote on/off signal is transferred with some on-delay and off-delay time of 8ms, 24ms respectively. 24-SDIP Precision Reference Section 1 The reference voltage is trimmed to ±2%. (4.9V ≤ Vref ≤ 5.1V) PG (Power Good Signal Generator) Section The power good signal generator is to monitor the voltage level of power supply for safe operation of a microprocessor having some delay time at turn-on. The power good output should be low state before the output voltatge is out of regulation at turn-off. Rev. 1.0.0 ©2003 Fairchild Semiconductor Corporation FAN7585 Internal Block Diagram 24 C1 C2 RT/CT COMP E/A(-) E/A(+) DTC Vref 7 OSCILLATOR PWM CONTROL D Q 22 CK 2 L Q 3 4 1.25V DEAD TIME CONTROLER 0.1V R Q S Delay Controller L 1.4V 5 6 TREM REM (PS-ON) PT V12 V5 V33 L 21 INTERNAL BIAS Vref Start Up OVP COMP L 19 18 16 14 12 Vref Vcc 1 L Vref Iref1=Vref/RI L H UVP COMP 1.25V RI 8 Vref Ichag H L V5 L L L L COMP3 1.8V!"0.6V V5 1.8V!"0.6V H PG GENERATOR H 1.25V OCP L L H L 15 L 13 IS33 IS5 IS12 DET 9 COMP2 17 Iref1*5 10 11 20 23 TPG PG TUVP GND 2 FAN7585 Pin Definition C1 24 GND 23 C2 22 DTC TUVP 21 20 PT 19 V12 18 IS12 17 V5 16 IS5 15 V33 14 IS33 13 FAN7585 1 2 3 4 5 6 7 8 RI 9 DET 10 TPG 11 PG 12 Vref Vcc COMP E/A(-) E/A(+) TREM REM RT/CT Pin Description Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 Pin Name VCC COMP E/A(-) E/A(+) TREM REM RT/CT RI DET TPG PG Vref I/O I O I I I I O O Pin Function Description Supply Voltage E/A Output E/A (-) Input E/A (+) Input Remote On/Off Delay Remote On/Off Input Oscillation Freq. Setting R,C OCP Current Setting R Detect Input PG Delay Power Good Signal Output Precision Reference Voltage Pin Number 13 14 15 16 17 18 19 20 21 22 23 24 Pin Name IS33 V33 IS5 V5 IS12 V12 PT TUVP DTC C2 GND C1 I/O I I I I I I I I O O Pin Function Description OCP Input for +3.3V OVP, UVP Input for +3.3V OCP Input for +5V OVP, UVP Input for 5V OCP Input for +12V OVP, UVP Input for +12V Extra Protection Input UVP Delay Deadtime Control Input Output 2 Ground Output 1 3 FAN7585 Pin Function Pin Number Pin Name 1 2 3 4 5 VCC COMP E/A(-) E/A(+) TREM Pin Function Description Supply voltage. Operating range is 15V~30V. Test condition : VCC=20V, Ta=25°C. Error amplifier output. It is connected to non-inverting input of pulse width modulator comparator. Error amplifier inverting input. Its reference voltage is always 1.25V. Error amplifier non-inverting input feedback voltage. This pin may be used to sense power supply output voltages. Remote On/Off delay. Ton/Toff=8ms/24ms (Typ.) with C=0.1uF. Its High/Low threshold voltages are 1.8V/0.6V. Remote On/Off input. It is TTL operation and its threshold voltage is 1.4V. Voltage at this pin can reach normal 4.6V, with absolute maximum voltage, 5.25V. If REM = “Low”, PWM = “Low”, that means the main SMPS is operational. when REM = “High”, then PWM = “High” and the main SMPS is turned-off. Oscillation frequency setting R, C.(Test condition RT =10kΩ) OCP current setting pin. You can fix the OCP reference current (Iref1) by using RI resistor. AC input under voltage detection pin. Its threshold voltage is 1.25V Typ. PG delay. Td =260ms (Typ.) with CTPG = 2.2uF. The High/Low threshold voltages are 1.8V/0.6V and the voltage of Pin10 is clamped to 2.9V for noise margin. Power Good output signal. PG = “High” means that the power is “Good” for operation and PG = “Low” means “Power fail”. Precision voltage reference is trimmed to ±2% (Typical Value = 5V). Current sense input for +3.3V output. This pin is connected to the current sensing resistor or inductor. You can define OCP offset voltage for +3.3V by using RI resistor externally. If you connect 62kΩ at pin 8 to ground, the reference current(Iref1) should be 20uA. After that , you can make a constant OCP offset voltage(Voffset=Roffset*5*20uA). In case the voltage drop(IO.33*Rs) of the sense resistor or inductor is larger than offset voltage, after OCP delay time the main SMPS is turned off. So the over current level is determined by the following equation. IO.33=Voffset/Rs. OVP, UVP input for +3.3V output (Typical Value = 4.1V/2.3V). Current sense input for +5V output. You can make +5V OCP function as the previous method in IS5(pin15). OVP, UVP input for +5V output (Typical Value = 6.4V/4.0V). Current sense input for +12V output. You can make +12V OCP function as the previous method in IS12(pin17). OVP, UVP input for 12V output (Typical Value = 14.2V/10V). This is prepared for an extra OVP input or another protection signal (Typical Value = 1.25V). Timing delay pin for under voltage protection and over current protection. Its threshold voltage is 1.8V and clamped to 2.9V after full charging. Target of delay time is 38ms and it is realized through external capacitor (CTUVP = 0.47uF). Deadtime control input. The deadtime control comparator has an effective 120mV input offset which limits the minimum output dead time. Dead time may be imposed on the output by setting the dead time control input to a fixed voltage, ranging from 0V to 3.3V. Output drive pin for push-pull operation. Ground. Output drive pin for push-pull operation. 6 7 8 9 10 11 12 REM RT/CT RI DET TPG PG Vref 13 IS33 14 15 16 17 18 19 20 V33 IS5 V5 IS12 V12 PT TUVP 21 22 23 24 DTC C2 GND C1 4 FAN7585 Absolute Maximum Ratings Characteristics Supply Voltage Collector Output Voltage Collector Output Current Power Dissipation (FAN7585) Operating Temperature Range Storage Temperature Range Symbol VCC VC1,VC2 IC1,IC2 PD TOPR TSTG Value 40 40 200 1.5 -25 to 85 -65 to 150 Unit V V mA W °C °C Temperature Characteristics Characteristics Temperature Coefficient of Vref (-25°C ≤ Ta ≤ 85°C) Symbol ∆Vref/∆T Min. Typ. 0.01 Max. Unit %/°C 5 FAN7585 Electrical Characteristics (Vcc=20V, Ta=25°C, unless otherwise specified) Parameter REFERENCE SECTION Reference Output Voltage Line Regulation Load Regulation Temperature Coefficient of Vref Short Circuit Output Current OSCILLATOR SECTION Oscillation Frequency Frequency Change with Temperature (1) DEAD TIME CONTROL SECTION Input Bias Current Maximum Duty Voltage Input Threshold Voltage ERROR AMP SECTION Inverting Reference Voltage Input Bias Current Open-Loop Voltage Gain (1) Unit-Gain Bandwidth (1) Output Sink Current Output Source Current PWM COMPARATOR SECTION Input Threshold Voltage OUTPUT SECTION Output Saturation Voltage Collector Off-State Current Rising Time(1) Falling Time(1) VCE(SAT) IC(off) TR TF IC = 200mA VCC=VC=30V, VE=0V 1.1 2 100 50 1.3 100 200 200 V uA ns ns VTH(PWM) Zero Duty Cycle 4 4.5 V Vref(EA) IB(EA) GVO BW ISINK ISOURCE VCOMP=2.5V 0.5V ≤ VCOMP ≤ 3.5V VCOMP = 0.7V VCOMP = 3.5V 1.20 70 0.3 -2.0 1.25 -0.1 95 650 0.9 -4.0 1.30 -1.0 V uA dB kHz mA mA IB(DT) DCMAX VTH(DT) Pin21 (DTC)=0V Zero Duty Cycle Max. Duty Cycle 45 0 -2.0 48 3.0 -10 50 3.3 uA % V fosc fosc/T CT=0.01uF, RT=12k CT=0.01uF, RT=12k 9.4 2 kHz % (1) Symbol Vref ∆Vref.LINE ∆Vref.LOAD ∆Vref/∆T ISC Condition Iref=1mA 15V ≤ VCC ≤ 30V 1mA ≤ Iref ≤ 10mA -25°C ≤ Ta ≤ 85°C Vref = 0 Min. 4.9 15 Typ. 5 2.0 1.0 0.01 35 Max. 5.1 25 15 75 Unit V mV mV %/°C mA 6 FAN7585 Electrical Characteristics (Continued) (Vcc=20V, Ta=25°C, unless otherwise specified) Parameter PROTECTION SECTION Over Voltage Protection for +3.3V Over Voltage Protection for +5V Over Voltage Protection for +12V Input Threshold Voltage for PT Under Voltage Protection for +3.3V Under Voltage Protection for +5V Under Voltage Protection for +12V Voltage for Current Reference Current Reference(1) Charging Current for UVP, OCP Delay UVP, OCP Delay Time Offset Voltage of OCP Comparator REMOTE ON/OFF SECTION REM On Input Voltage REM Off Input Voltage REM Off Input Bias Current REM On Open Voltage REM On Delay Time REM Off Delay Time REMOTE ON/OFF SECTION (2) VIN(DET) V5(DET) HY1 HY2 RPG ICHG.PG TD.PG VSAT(PG) ICC C=2.2uF C=2.2uF, VTH=1.8V IPG=10mA COMP1, 2 COMP3 1.20 4.1 10 0.6 0.5 -10 100 1.25 4.3 40 1.2 1 -15 260 0.2 10 1.30 4.5 80 2 -23 500 0.4 20 V V mV V kΩ uA ms V mA Detecting Input Voltage Detecting V5 Voltage Hysteresis Voltage 1 Hysteresis Voltage 2 PG Output Load Resistor Charging Current for PG Delay PG Delay Time PG Output Saturation Voltage TOTAL DEVICE Standby Supply Current VREMH VREML IREML VREM(OPEN) Ton Toff C=0.1uF C=0.1uF IREM = -200uA VREM = 0.4V 2.0 2.0 4 16 8 24 0.8 -1.6 5.25 14 34 V V mA V ms ms VOVP1 VOVP2 VOVP3 VPT VUVP1 VUVP2 VUVP3 VRI Iref1 ICHG.UVP TD.UVP VOFFSET C=0.47uF C=0.47uF, VTH=1.8V 3.8 6.0 13.5 1.20 2.1 3.7 9.2 1.21 10 -16 24 -5 4.1 6.4 14.2 1.25 2.3 4.0 10 1.25 -21 38 4.3 6.8 15.0 1.30 2.5 4.3 10.8 1.29 65 -28 57 5 V V V V V V V V uA uA ms mV Symbol Condition Min. Typ. Max. Unit Note: 1. These parameters, although guaranteed over their recommended operating conditions are not 100% tested in production. 2. REM on delay time (Pin6 REM: “L” → “H”), REM off delay time (Pin6 REM: “H” → “L”) 7 FAN7585 Application Informations Timing Resistance vs Frequency CT=1nF 100 CT=2.2nF CT=4.7nF CT=10nF FREQUENCY(KHz) 10 CT=20nF CT=50nF CT=100nF 1 0.2 2 3 4 5 6 7 8 9 10 20 30 40 50 RT(Kohm) Fig 1. Timing Resistance vs Frequency Rt/Ct Feedback Dead-time control Ck Q Q Output Q1 Output Q2 Fig 2. Operating Waveform 8 FAN7585 1. OVP Block Vo 3.3V 14 R1 5V 16 12V 18 R101 R3 R5 Vref=5V PT D 19 A B C OVP COMP R4 R6 1.25V SET of R/S Latch R102 R2 R102, R102 : External Components The OVP function is simply realized by connecting Pin14, Pin16, Pin18 to each secondary outputs. R1, R2, R3, R4, R5, R6 are internal resistors of the IC. Each OVP level is determined by resistor ratio and the typical values are 4.1V/6.4V/14.2V respectively. • OVP detecting voltage for +3.3V V OVP1 R +R R +R 1 2 1 2 ( +3.3V ) = --------------------- × V = --------------------- × Vref = 4.1V A R R 2 2 • OVP detecting voltage for +5V V OVP2 R +R R +R 3 4 3 4 ( +5V ) = --------------------- × V = --------------------- × Vref = 6.4V B R R 4 4 • OVP detecting voltage for +12V V OVP3 R +R R +R 5 6 5 6 ( +12V ) = --------------------- × V = --------------------- × Vref = 14.2V C R R 6 6 Especially, Pin19(PT) is prepared for extra OVP input or another protection signal. That is, if you want over voltage protection of extra output voltage, then you can make a function with two external resistors. • OVP detecting voltage for PT R +R R +R 101 102 101 102 PT = ---------------------------------- × V = ---------------------------------- × Vref D R R 102 102 In the case of OVP, a system designer should know a fact that the main power can be dropped after a little time because of system delay, even if PWM is triggered by OVP. So when the OVP level is tested with a set, you should check the secondary outputs(+3.3V/+5V/+12V) and PG(Pin11) simultaneously. Then you can know the each OVP level as checking each output voltage in just time that PG(Pin11) is triggered from high to low. 9 FAN7585 2. UVP Block 3.3V 14 R1 5V 16 12V 18 R3 R5 Vref=5V A B C R2 R4 R6 1.25V SET of R/S Latch UVP COMP The block is made up of a comparator with three detecting inputs and without hysteresis voltage. Each UVP level is determined by resistor ratio and the typical values are 2.3V/4.0V/10V respectively. • UVP detecting voltage for +3.3V V R +R R +R 1 2 1 2 ( +3.3V ) = --------------------- × V = --------------------- × Vref = 2.3V UVP1 A R R 2 2 • UVP detecting voltage for +5V V UVP2 R +R R +R 3 4 3 4 ( +5V ) = --------------------- × V = --------------------- × Vref = 4V B R R 4 4 • UVP detecting voltage for +12V V UVP3 R +R R +R 5 6 5 6 ( +12V ) = --------------------- × V = --------------------- × Vref = 10V C R R 6 6 In the case of UVP, a system designer should know a fact that the main power can be dropped after some delay. (38msec@ CTUVP=0.47uF) So when the UVP level is tested with a set, you should remove protection delay capacitor(Pin20) and check PG(Pin11). You can know the each UVP level as checking each output voltage in just time that PG(Pin11) is triggered from high to low. 10 FAN7585 3. OCP Block OVP Outpu t Sense Inductor Equivalent Resistor(Rs) ≅ 5mΩ Io 17 Roffset VS12 18 COMP1 IS12 VS5 16 TPROT (Offset Voltage Resistor) Iref Iref1 × 5 (100uA) IS5 15 COMP2 Iref1 ×5 Iref × (100uA) VS33 14 IS33 13 COMP3 Iref1 ×5 Iref × (100uA) Iref1=20µA at RI=62kΩ It also has OCP function for +3.3V,+5V,+12V outputs. The block is made up of three comparators. Pin17(IS12), pin15(IS5) and pin13(IS33) are current sense inputs for +12V, +5V and +3.3V outputs respectively. These pins are connected to the current sensing resistor or inductor. Each OCP level is determined by RI resistor , so you can define over current protection level by changing RI resistor. Pin8(RI) voltage is always 1.25V, so if you connect 62kΩ resistor, the reference current is 20uA(Iref1). If the voltage drop of the sense resistor or inductor is larger than offset voltage (Voffset = Roffset × 5 × Iref1), the DTC becomes "High" after some delay(38ms at CTUVP=0.47uF)and the main SMPS is turned off. That means the output voltage(+3.3V, +5V, +12V) will be ground level. After main power is turned off at OCP and initialized by REM, if REM signal is changed from "High" to "Low", main power becomes operational. For example, if you want to define 5V output OCP level at 10A in the condition of equivalent resistor(Rs)= 5mΩ, you can determine the offset voltage resistor(Roffset) as following method. - Iref1 = 1.25V / 62kΩ = 20uA - Voffset = RS × 5 × Iref1 = 5mΩ × 10A = 50mV - Therefore, Roffset = 50mV / (5 × Iref1) = 500Ω By the way, OCP output signal can be delayed by protection delay capacitor(CTUVP) and its delay time is decided by the value of CTUVP. C TUVP * ∆ V 0.47uF*1.7V Tuvp ≈ ---------------------------- = ---------------------------------- = 38msec ∆I 21uA If you use too small (or large) capacitor, the charging time would decrease (or increase) very much and it can cause malfunction at the transient time. So you have to choose the reasonable delay time for system optimization by changing the external capacitor value. 11 FAN7585 4. Remote On/Off & Delay Block Vref 12 5V Ion Rpull Trem Ton Toff REM PWM 5 Irem Ion+Ioff PG Block Q1 A B COMP 0.6V↔1.8V Trem 2.2V 0.1uF C COMP6 1.25V REM 6 Q2 Ioff = Irem - Ion ∆Von=2V, ∆Voff=2.1V Remote On/Off Remote On/Off section is controlled by a microprocessor. If a high signal is supplied to the Remote On/Off input(Pin6), the output of COMP6 becomes high status. The output signal is transferred to ON/OFF delay block and PG block. If no signal is supplied to Pin6, Pin6 maintains high status(=5V) for pull-up resistor, Rpull. When Remote On/Off is high, it produces PWM(Pin6) "High" signal after ON delay time (about 8ms with CTREM=0.1uF) for stabilizing system. Then, all outputs (+3.3V, +5V, +12V) are grounded. When Remote On/Off is changed to "Low", it produces PWM "Low" signal after Off delay time (about 24ms with CTREM=0.1uF) for stabilizing the system. If REM is low, then PWM is low. That means the main SMPS is operational. When REM is high, PWM is high and the main SMPS is turned off. Remote On/Off delay time can be calculated by following equation. C TREM × ∆ Von 0.1uF × 2V Ton = K1 × --------------------------------------- ≈ 0.95 × ----------------------------- = 8msec Ion 23uA C TREM × ∆ Voff 0.1uF × 2.1V Toff = K 2 × ---------------------------------------- ≈ 0.8 × ---------------------------------- = 24msec Ioff 7uA k1, k2: constant value gotten by test In above equation, a typical capacitor value is 0.1uF. If the capacitor is changed to larger value, it can cause malfunction in case of AC power on at "REM=High". Because PWM maintains Low status and main power turns on for on delay time. So you should use 0.1uF or smaller capacitor. 12 FAN7585 5. Power Good Signal Generator Vref +5V 12 16 Vcc Ichg R15 1 kΩ R13 R11 60kΩ Vref COMP1 11 PG COMP Q3 COMP3 0.6V 1.8V PG DET 9 R12 4.7kΩ R14 Vref Q2 COMP2 1.25V Remote ON/OFF 10 TPG C PG 2.2 uF Power Good Signal Generator circuit generates "ON or OFF" signal depending on the status of output voltage to prevent the malfunctions of following systems like microprocessor, etc. caused by the output instability at power on or off . At power on, it produces PG "High" signal after some delay time(about 260ms with CTPG=2.2uF) for stabilizing output voltage. At power off, it produces PG "Low" signal without delay time by sensing the status of power source for protecting following systems. Vcc detection point(Pin9) can be calculated by following equation. Recommended values of R11, R12 are determined by the following equation. R11 DET = 1.25V ×  1 + ----------  = 17.2V  R12 The COMP3 creates PG "Low" without delay when +5V output falls to less than 4.0V to prevent some malfunction at transient status, thus it improves system stability. When Remote On/Off signal is high, it generates PG "Low" signal without delay. It means that PG becomes "Low" before main power is grounded. PG delay time(TPG) is determined by capacitor value(CTPG), threshold voltage of COMP3 and the charging current and its euqation is as following. C TPG × ∆ V C TPG × Vth 2.2uF × 1.8V T PG = ---------------------------- ≈ ------------------------------ = ---------------------------------- ≈ 260msec Ichg Ichg 15uA Considering the lightning surge and noise, there are two types of protections. One is a few time delay between TPG and PG for safe operation and another is some noise margin of Pin10. Noise_Margin_of_TPG = VPin10(max)- Vth(L) = 2.9V - 0.6V = 2.3V 13 T1 D1 IS12 B+ BD1 + Line Filter CY1 C3 CS1 2 C2 + R2 L1 3 RS2 4 LM1 CS2 5 D2 L3 AC_INPUT 2 1 3 1 3 2 1 SW1 F1 220Vac (Open) R1 C1 + RS1 2 110Vac (Short) - RT1 CY2 8 4 CX1 CX2 t C7 Q1 D17 4 R3 R11 R10 VDD C6 T3 D23 R53 3 D19 2 L8 5 1 B+ T2 R7 R4 C8 D18 6 7 R5 Q2 R8 D30 CO10 L9 D24 +5Vsb CO9 2 D16 R6 R9 10 D25 6 CO11 9 CO12 R12 3 2 GND D FB Vcc + C4 D20 R54 U3 1 4 R55 R38 D21 D22 5H0165 1 4 R39 R56 C12 3 KA431 C13 R40 +3.3V +12V IS12 IS5 R57 C100 C101 IS33 +5V R41 R42 R43 C16 R44 Typical Application Circuit C14 24 23 22 21 20 19 18 17 C15 16 15 14 C17 REM(PSON) PT V12 V5 GND DTC V33 C1 C2 IS5 Q4 D26 R52 D27 Q5 FAN7585 COMP EA(+) Tr em EA(-) Tu vp Rt/Ct DET 1 2 3 4 5 6 7 8 RI R51 9 10 11 C21 C20 R47 C19 D29 VDD R49 R48 R50 C22 PSON FAN7585 PG R46 D28 C23 C18 12 Vref Tp g Vcc PG IS33 IS12 13 R45 14 2 C5 R58 C24 KA431 10 D15 6 7 9 1 8 11 8 5 7 L1-1 +12V CO1 IS5 D4 D3 RS3 CD1 RD1 D5 D6 CO2 R20 R25 L1-2 L4 +5V CO3 L1-3 CO4 R26 R21 -12V L5 CD2 RD2 D8 CS3 CO7 R29 R30 R22 L1-4 L6 D9 -5V CO8 R31 R23 R27 D10 L2 D11 IS33 L7 +3.3V R24 D12 CO5 CO6 C10 D13 VR1 Q3 R32 R28 R33 D14 R34 R37 R35 C11 VR2 R36 FAN7585 Mechanical Dimensions Package Dimensions in millimeters 24-SDIP 15 FAN7585 Ordering Information Product Number FAN7585 Package 24-SDIP Operating Temperature -25°C ~ 85°C DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. www.fairchildsemi.com 5/13/03 0.0m 001 Stock#DSxxxxxxxx  2003 Fairchild Semiconductor Corporation 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.