FDBL0200N100

MOSFET – N-Channel, POWERTRENCH) 100 V, 300 A, 2.0 mW FDBL0200N100 Features • • • • www.onsemi.com Typical RDS(on) = 1.5 mW at VGS = 10 V, ID = 80 A Typical Qg(tot) = 95 nC at VGS = 10 V, ID = 80 A UIS Capability This Device is Pb−Free and is RoHS Compliant VDSS RDS(ON) MAX ID MAX 100 V 2.0 mW @ 10 V 300 A Applications • • • • • • • • • Industrial Motor Drive Industrial Power Supply Industrial Automation Battery Operated Tools Battery Protection Solar Inverters UPS and Energy Inverters Energy Storage Load Switch H−PSOF8L 11.68x9.80 CASE 100CU MARKING DIAGRAM $Y&Z&3&K FDBL 0200N100 $Y &Z &3 &K FDBL0200N100 = ON Semiconductor Logo = Assembly Plant Code = 3−Digit Plant Code = 2−Digits Lot Run Traceability Code = Specific Device Code ORDERING INFORMATION See detailed ordering and shipping information on page 7 of this data sheet. © Semiconductor Components Industries, LLC, 2016 May, 2021 − Rev. 2 1 Publication Order Number: FDBL0200N100/D FDBL0200N100 MOSFET MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Symbol Value Unit VDSS Drain−to−Source Voltage 100 V VGS Gate−to−Source Voltage ±20 V A ID Rating Drain Current − Continuous (VGS = 10) (Note 1) TC = 25°C 300 Pulsed Drain Current TC = 25°C See Figure 4 EAS Single Pulse Avalanche Energy (Note 2) 352 PD Power Dissipation 429 W Derate Above 25°C 2.9 W/°C −55 to +175 °C 0.35 °C/W TJ, TSTG Operating and Storage Temperature mJ RqJC Thermal Resistance, Junction to Case (Note 3) RqJA Thermal Resistance, Junction to Ambient (Note 3a) 43 °C/W RqJA Thermal Resistance, Junction to Ambient (Note 3b) 62.5 °C/W Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Current is limited by silicon. 2. Starting TJ = 25°C, L = 0.1 mH, IAS = 84 A, VDD = 100 V during inductor charging and VDD = 0 V during time in avalanche. 3. RqJA is the sum of the junction−to−case and case−to−ambient thermal resistance, where the case thermal reference is defined as the solder mounting surface of the drain pins. RqJC is guaranteed by design, while RqJA is determined by the board design. a. 43°C/W when mounted on a 1 in2 pad of 2 oz copper b. 62.5°C/W when mounted on a minimum pad of 2 oz copper www.onsemi.com 2 FDBL0200N100 ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Parameter Test Condition Min Typ Max Unit 100 − − V TJ = 25°C − − 5 mA TJ = 175°C (Note 4) − − 2 mA − − ±100 nA 2.0 3.1 4.5 V TJ = 25°C − 1.5 2.0 mW TJ = 175°C (Note 4) − 3.3 4.3 mW − 6970 9760 pF OFF CHARACTERISTICS BVDSS IDSS IGSS Drain−to−Source Breakdown Voltage ID = 250 mA, VGS = 0 V Drain−to−Source Leakage Current VDS = 100 V, VGS = 0 V Gate−to−Source Leakage Current VGS = ±20V ON CHARACTERISTICS VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250μA RDS(on) Drain to Source On Resistance ID = 80A, VGS= 10V DYNAMIC CHARACTERISTICS VDS = 50 V, VGS = 0 V, f = 1 MHz Ciss Input Capacitance Coss Output Capacitance − 3950 5530 pF Crss Reverse Transfer Capacitance − 29 41 pF Rg Gate Resistance f = 1 MHz − 0.45 1 W Total Gate Charge at 10 V VGS = 0 to 10 V, VDD = 80 V, ID = 80 A − 95 133 nC Threshold Gate Charge VGS = 0 to 2 V, VDD = 80 V, ID = 80 A − 13 − nC Qgs Gate−to−Source Gate Charge VDD = 80 V, ID = 80 A − 31 − nC Qgd Gate−to−Drain “Miller“ Charge − 20 − nC − − 73 ns − 31 50 ns Rise Time − 25 40 ns Turn−Off Delay − 36 58 ns Fall Time − 9 18 ns Turn−Off Time − − 59 ns ISD = 80 A, VGS = 0 V − − 1.25 V ISD = 40 A, VGS = 0 V − − 1.2 V IF = 80 A, dISD/dt = 100 A/ms, VDD = 80 V − 115 184 ns − 172 273 nC Qg(ToT) Qg(th) SWITCHING CHARACTERISTICS ton Turn−On Time td(on) Turn−On Delay tr td(off) tf toff VDD = 50 V, ID = 80 A, VGS = 10 V, RGEN = 6 W DRAIN−SOURCE DIODE CHARACTERISTICS VSD Source−to−Drain Diode Voltage trr Reverse−Recovery Time Qrr Reverse−Recovery Charge Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. www.onsemi.com 3 FDBL0200N100 400 1.2 1.0 0.8 0.6 0.4 0.2 0.0 CURRENT LIMITED BY PACKAGE 350 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER TYPICAL CHARACTERISTICS 300 250 200 150 100 50 0 25 50 75 100 125 150 0 175 25 50 Figure 1. Normalized Power Dissipation vs. Case Temperature 2 75 100 125 150 175 200 TC, CASE TEMPERATURE (°C) TC, CASE TEMPERATURE (°C) ZqJC, NORMALIZED THERMAL IMPEDANCE VGS = 10 V Figure 2. Maximum Drain Current vs. Case Temperature DUTY CYCLE − DESCENDING ORDER 1 0.1 0.01 −5 10 D = 0.50 0.20 0.10 0.05 0.02 0.01 SINGLE PULSE P DM t1 t2 NOTES: DUTY FACTOR: D = t1 / t2 PEAK TJ = PDM x ZqJC + TC 10 −4 10 −3 10 −2 10 −1 0 10 10 1 t, RECTANGULAR PULSE DURATION (s) Figure 3. Normalized Maximum Transient Thermal Impedance IDM, PEAK CURRENT (A) 2000 VGS = 10 V TC = 25°C FOR TEMPERATURE ABOVE 25°C DERATE PEAK CURRENT AS FOLLOWS: 1000 I + I 25 ƪǸ 175 * T C 15 ƫ SINGLE PULSE 100 −5 10 10 −4 10 −3 10 −2 10 −1 t, RECTANGULAR PULSE DURATION (s) Figure 4. Peak Current Capability www.onsemi.com 4 1 10 FDBL0200N100 TYPICAL CHARACTERISTICS (continued) 1000 IAS, AVALANCHE CURRENT (A) ID, DRAIN CURRENT (A) 5000 1000 100 10 ms 50 ms 100 ms OPERATION IN THIS AREA MAY BE LIMITED BY Rds(on) 10 SINGLE PULSE TJ = MAX RATED TC = 25°C 1 0.1 0.1 1 ms 10 ms 100 ms 10 1 100 IS, REVERSE DRAIN CURRENT (A) ID, DRAIN CURRENT (A) VDD = 5 V 250 TJ = 25°C TJ = −55°C 150 100 TJ = 175°C 50 0 3 4 5 6 10 STARTING TJ = 150°C 350 1 10 100 1000 VDD = 5 V 100 10 TJ = 175°C TJ = 25°C 1 0.0 VGS, GATE TO SOURCE VOLTAGE (V) 0.2 0.4 0.6 0.8 1.0 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 8. Forward Diode Characteristics 350 350 250 ms PULSE WIDTH Tj = 25°C 300 250 VGS 15 V Top 10 V 8V 7V 6V 5.5 V 5V Bottom 200 150 100 50 0 1 2 3 4 250 ms PULSE WIDTH Tj = 175°C 300 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 0.1 tAV, TIME IN AVALANCHE (ms) Refer to ON Semiconductor Application Notes AN−7514 and AN−7515 0.1 7 Figure 7. Transfer Characteristics 0 0.01 Figure 6. Unclamped Inductive Switching Capability PULSE DURATION = 250 ms DUTY CYCLE = 0.5% MAX 200 STARTING TJ = 25°C NOTE: Figure 5. Forward Bias Safe Operating Area 300 100 1 0.001 500 VDS, DRAIN TO SOURCE VOLTAGE (V) 350 If R = 0 tAV = (L)(IAS) / (1.3 x RATED BVDSS − VDD) If R ≠ 0 tAV = (L / R) ln [(IAS x R) / (1.3 x RATED BVDSS − VDD)+1] 250 200 150 100 50 0 5 VGS 15 V Top 10 V 8V 7V 6V 5.5 V 5V Bottom VDS, DRAIN TO SOURCE VOLTAGE (V) 0 1 2 3 4 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 9. Saturation Characteristics Figure 10. Saturation Characteristics www.onsemi.com 5 5 FDBL0200N100 30 PULSE DURATION = 250 ms DUTY CYCLE = 0.5% MAX RDS(on), DRAI TO SOURCE ON−RESISTANCE (mW) 25 ID = 80 A 20 15 10 TJ = 175°C 5 0 TJ = 25°C 4 5 6 7 8 9 10 NORMALIZED DRAIN TO SOURCE ON−RESISTANCE TYPICAL CHARACTERISTICS (continued) 2.5 PULSE DURATION = 250 ms DUTY CYCLE = 0.5% MAX 2.0 1.5 1.0 ID = 80 A VGS = 10 V 0.5 −80 VGS, GATE TO SOURCE VOLTAGE (V) 0.7 0.5 −80 −40 0 40 80 120 160 1.10 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE NORMALIZED GATE THRESHOLD VOLTAGE 0.9 0.3 200 VGS, GATE TO SOURCE VOLTAGE (V) CAPACITANCE (pF) Coss 100 0.1 Crss 1 160 200 1.05 1.00 0.95 0.90 −80 −40 0 40 80 120 160 200 TJ, JUNCTION TEMPERATURE (°C) Ciss 10 120 Figure 14. Normalized Drain to Source Breakdown Voltage vs. Junction Temperature 10000 f = 1 MHz VGS = 0 V 80 ID = 5 mA TJ, JUNCTION TEMPERATURE (°C) Figure 13. Normalized Gate Threshold Voltage vs. Temperature 1000 40 Figure 12. Normalized RDSON vs. Junction Temperature VGS = VDS ID = 250 mA 1.1 0 TJ, JUNCTION TEMPERATURE (°C) Figure 11. RDSON vs. Gate Voltage 1.3 −40 10 100 10 ID = 80 A 8 VDD = 50 V VDD = 60 V 6 VDD = 40 V 4 2 0 VDS, DRAIN TO SOURCE VOLTAGE (V) 0 20 40 60 80 Qg, GATE CHARGE (nC) Figure 15. Capacitance vs. Drain to Source Voltage Figure 16. Gate Charge vs. Gate to Source Voltage www.onsemi.com 6 100 FDBL0200N100 ORDERING INFORMATION Device FDBL0200N100 Device Marking Package Type Reel Size Tape Width Shipping† FDBL0200N100 H−PSOF8L 11.68x9.80 (Pb−Free) 13” 24 mm 2000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. www.onsemi.com 7 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS H−PSOF8L 11.68x9.80 CASE 100CU ISSUE A DATE 06 JAN 2020 GENERIC MARKING DIAGRAM* AYWWZZ XXXXXXXX XXXXXXXX A Y WW ZZ XXXX DOCUMENT NUMBER: DESCRIPTION: = Assembly Location = Year = Work Week = Assembly Lot Code = Specific Device Code 98AON13813G H−PSOF8L 11.68x9.80 *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. 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