FDBL0240N100

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This literature is subject to all applicable copyright laws and is not for resale in any manner. FDBL0240N100 N-Channel PowerTrench® MOSFET 100 V, 210 A, 2.8 mΩ Features Applications „ Max RDS(on) = 2.8 mΩ at VGS = 10 V, ID = 80 A „ Industrial Motor Drive „ Max Qg(tot) = 111 nC at VGS = 10 V, ID = 80 A „ Industrial Power Supply „ UIS Capability „ Industrial Automation „ RoHS Compliant „ Battery Operated tools „ Battery Protection „ Solar Inverters „ UPS and Energy Inverters „ Energy Storage „ Load Switch D D S SS S S G SS TOP G S BOTTOM MO-299A MOSFET Maximum Ratings TC = 25 °C unless otherwise noted. Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current -Continuous ID -Continuous TJ, TSTG ±20 V (Note 5) 210 TC = 100°C (Note 5) 150 (Note 4) 910 Single Pulse Avalanche Energy PD Units V TC = 25°C -Pulsed EAS Ratings 100 (Note 3) Power Dissipation TC = 25°C Power Dissipation TA = 25°C 821 300 (Note 1a) Operating and Storage Junction Temperature Range 3.5 -55 to +175 A mJ W °C Thermal Characteristics RθJC Thermal Resistance, Junction to Case RθJA Thermal Resistance, Junction to Ambient (Note 1) 0.5 (Note 1a) 43 °C/W Package Marking and Ordering Information Device Marking FDBL0240N100 Device FDBL0240N100 ©2015 Fairchild Semiconductor Corporation FDBL0240N100 Rev.C Package MO-299A 1 Reel Size - Tape Width - Quantity - www.fairchildsemi.com FDBL0240N100 N-Channel PowerTrench® MOSFET November 2015 Symbol Parameter Test Conditions Min. Typ. Max. Units Off Characteristics BVDSS ΔBVDSS ΔTJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = 250 μA, VGS = 0 V 100 ID = 250 μA, referenced to 25 °C V 58 VDS = 80 V, VGS = 0 V VGS = ±20 V, VDS = 0 V mV/°C 1 ±100 μA nA 4 2.8 V mΩ On Characteristics VGS(th) rDS(on) ΔVGS(th) ΔTJ gFS Gate to Source Threshold Voltage Static Drain to Source On Resistance Gate to Source Threshold Voltage Temperature Coefficient Forward Transconductance VGS = VDS, ID = 250 μA VGS = 10 V, ID = 80 A 2 2.9 2.2 ID = 250 μA, referenced to 25 °C -13 mV/°C VDS = 10 V, Id = 80 A 162 S Dynamic Characteristics Ciss Coss Crss Rg Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance VDS = 50 V, VGS = 0 V, f = 1 MHz VGS = 0.5V, f = 1MHz 5835 1235 41 2.5 8755 1855 65 pF pF pF Ω 26 32 44 17 79 11 27 16 42 51 70 30 111 15 ns ns ns ns nC nC nC nC 0.8 0.8 82 151 210 910 1.3 1.2 131 242 A A Switching Characteristics td(on) tr td(off) tf Qg(TOT) Qg(th) Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Threshold Gate Charge Gate to Source Gate Charge Gate to Drain “Miller” Charge VDD = 50 V, ID = 80 A, VGS = 10 V, RGEN = 6 Ω VGS = 0 to 10 V VGS = 0 to 2 V VDD = 50 V, ID = 80 A Drain-Source Diode Characteristics IS ISM VSD trr Qrr Maximum Continuous Drain to Source Diode Forward Current Maximum Pulsed Drain to Source Diode Forward Current VGS = 0 V, IS = 80 A (Note 2) Source to Drain Diode Forward Voltage (Note 2) VGS = 0 V, IS = 40 A Reverse Recovery Time IF = 80 A, di/dt = 100 A/μs Reverse Recovery Charge - V ns nC Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 43 °C/W when mounted on a 1 in2 pad of 2 oz copper. 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %. 3. EAS of 821 mJ is based on starting TJ = 25 °C, L = 0.3 mH, IAS = 74 A, VDD = 90 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 106 A. 4. Pulsed Id please refer to Figure “Forward Bias Safe Operating Area” for more details. 5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal & electro-mechanical application board design. ©2015 Fairchild Semiconductor Corporation FDBL0240N100 Rev.C 2 www.fairchildsemi.com FDBL0240N100 N-Channel PowerTrench® MOSFET Electrical Characteristics TJ = 25 °C unless otherwise noted. VGS = 10 V 3.0 VGS = 8 V NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 300 ID, DRAIN CURRENT (A) 250 VGS = 7 V 200 150 VGS = 6.5 V 100 VGS = 6 V PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 50 0 0.0 0.5 1.0 1.5 2.0 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 2.5 VGS = 6 V 2.0 VGS = 6.5 V 1.0 0.5 2.5 0 50 100 200 250 20 rDS(on), DRAIN TO 1.0 0.5 SOURCE ON-RESISTANCE (mΩ) ID = 80 A VGS = 10 V 1.5 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 15 ID = 80 A 10 TJ = 150 oC 5 TJ = 25 oC 0.0 -75 -50 -25 0 25 50 75 100 125 150 175 TJ, JUNCTION TEMPERATURE (oC) 0 Figure 3. Normalized On Resistance vs. Junction Temperature Figure 4. On-Resistance vs. Gate to Source Voltage IS, REVERSE DRAIN CURRENT (A) PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX VDS = 5 V 200 TJ = 175 oC 150 TJ = 25 oC 100 TJ = -55 oC 50 0 2 3 4 5 6 300 100 5 6 7 8 9 10 VGS = 0 V 10 TJ = 175 oC 1 TJ = 25 oC 0.1 TJ = -55 oC 0.01 0.001 0.0 7 VGS, GATE TO SOURCE VOLTAGE (V) 0.2 0.4 0.6 0.8 1.0 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics ©2015 Fairchild Semiconductor Corporation FDBL0240N100 Rev.C 4 VGS, GATE TO SOURCE VOLTAGE (V) 300 250 300 Figure 2. Normalized On-Resistance vs. Drain Current and Gate Voltage 2.5 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 150 ID, DRAIN CURRENT (A) Figure 1. On Region Characteristics ID, DRAIN CURRENT (A) VGS = 10 V VGS = 8 V VDS, DRAIN TO SOURCE VOLTAGE (V) 2.0 VGS = 7 V 1.5 Figure 6. Source to Drain Diode Forward Voltage vs. Source Current 3 www.fairchildsemi.com FDBL0240N100 N-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted. 10000 10 VGS, GATE TO SOURCE VOLTAGE (V) ID = 80 A Ciss 8 CAPACITANCE (pF) VDD = 25 V VDD = 50 V 6 VDD = 75 V 4 2 0 0 20 40 60 80 1000 Coss 100 f = 1 MHz VGS = 0 V 100 1 10 100 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs. Drain to Source Voltage 2000 1000 100 ID, DRAIN CURRENT (A) 1000 IAS, AVALANCHE CURRENT (A) Crss 10 0.1 TJ = 25 oC TJ = 150 oC 10 10 μs 100 THIS AREA IS LIMITED BY rDS(on) 10 TC = 25 C 0.01 0.1 1 10 100 0.1 0.1 1000 1 ms RθJC = 0.5 oC/W 1 o 1 0.001 100 μs SINGLE PULSE TJ = MAX RATED tAV, TIME IN AVALANCHE (ms) 10 ms 100 ms/DC CURVE BENT TO MEASURED DATA 1 10 100 1000 VDS, DRAIN to SOURCE VOLTAGE (V) Figure 10. Forward Bias Safe Operating Area Figure 9. Unclamped Inductive Switching Capability P(PK), PEAK TRANSIENT POWER (W) 100000 SINGLE PULSE o RθJC = 0.5 C/W o TC = 25 C 10000 1000 100 -5 10 -4 10 -3 -2 10 10 -1 10 1 t, PULSE WIDTH (sec) Figure 11. Single Pulse Maximum Power Dissipation ©2015 Fairchild Semiconductor Corporation FDBL0240N100 Rev.C 4 www.fairchildsemi.com FDBL0240N100 N-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 2 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 0.01 NOTES: SINGLE PULSE ZθJC(t) = r(t) x RθJC RθJC = 0.5 oC/W Peak TJ = PDM x ZθJC(t) + TC Duty Cycle, D = t1 / t2 0.001 -5 10 -4 10 -3 -2 10 10 -1 10 1 t, RECTANGULAR PULSE DURATION (sec) Figure 12. Junction-to-Case Transient Thermal Response Curve ©2015 Fairchild Semiconductor Corporation FDBL0240N100 Rev.C 5 www.fairchildsemi.com FDBL0240N100 N-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted. 9.70 9.90 DETAIL "A" 0.60 0.80 B 0.40 0.60 (0.40) 11.58 11.78 10° (3.30) (2X) 0.50 0.70 1 0.60 0.80 10.28 10.48 0.20 C A B DETAIL "A" 8 0.60 0.70 0.90 1.20 (0.35) (8X) 0.25 0.20 7X C A B C 8.40 10.20 TOP VIEW 5.10 4.45 DETAIL "B" 6.64 0.20 C 0.40 0.60 2.20 2.40 2.95 8.10 4.99 2.04 0.10 C 2.90 1.46 C 6.64 SIDE VIEW 0.86 13.28 0.60 2.80 1 A 9.80 10.00 0.20 C A B 0.80 8 1.20 LAND PATTERN RECOMMENDATION (8.00) 1.90 2.10 5.19 4.73 0.10 (2X) (7.15) 6.55 6.75 2.60 (2X) 3.30 (2X) 5.89 1.20 3X 3.75 0.65 2X 7.40 7.60 (8.30) BOTTOM VIEW 10° (0.35) DETAIL "B" NOTES: UNLESS OTHERWISE SPECIFIED A) PACKAGE STANDARD REFERENCE: JEDEC MO-299, ISSUE A, DATED NOVEMBER 2009. B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE BURRS OR MOLD FLASH. MOLD FLASH OR BURRS DOES NOT EXCEED 0.10MM. D) DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994. E) DRAWING FILE NAME: MKT-PSOF08AREV3 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. 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