FDMC2523P

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Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. FDMC2523P P-Channel QFET® -150V, -3A, 1.5Ω Features General Description „ Max rDS(on) = 1.5Ω at VGS = -10V, ID = -1.5A These P-Channel MOSFET enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for low voltage applications such as audio amplifier, high efficiency switching DC/DC converters, and DC motor control. „ Low Crss ( typical 10pF) „ Fast Switching „ Low gate charge ( typical 6.2 nC ) „ Improved dv / dt capability „ RoHS Compliant Application „ Active Clamp Switch Bottom Top Pin 1 S S S G D D D D S D S D S D G D MLP 3.3x3.3 MOSFET Maximum Ratings TA = 25°C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current -Continuous -Continuous ID Ratings -150 Units V ±30 V TC = 25°C -3 TC = 100°C -1.8 -Pulsed A -12 PD Power Dissipation (Steady State) EAS Single Pulse Avalanche Energy TC = 25°C TJ, TSTG Operating and Storage Junction Temperature Range TL Maximum lead temperature for soldering purposes, 1/8” from case for 5 seconds dv/dt Peak Diode Recovery dv/dt (Note 5) 42 W 3.3 mJ -55 to +150 °C 300 °C -5 V/ns (Note 2) Thermal Characteristics RθJC Thermal Resistance, Junction to Case (Note 1) 3.0 RθJA Thermal Resistance, Junction to Ambient (Note 1a) 60 °C/W Package Marking and Ordering Information Device Marking 2523P Device FDMC2523P ©2012 Fairchild Semiconductor Corporation FDMC2523P Rev.1.4 Package MLP 3.3x3.3 1 Reel Size 13 ’’ Tape Width 12 mm Quantity 3000 units www.fairchildsemi.com FDMC2523P P-Channel QFET® April 2015 Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = -250μA, VGS = 0V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient -150 ID = -250μA, referenced to 25°C IDSS Zero Gate Voltage Drain Current IGSS Gate to Source Leakage Current V -138 VDS = -150V, VGS = 0V mV/°C -1 TJ = 125°C -10 VGS = ±30V, VDS = 0V μA ±100 nA -5 V On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = -250μA ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Temperature Coefficient -3 ID = -250μA, referenced to 25°C rDS(on) Static Drain to Source On Resistance gFS Forward Transconductance -3.8 6 mV/°C VGS = -10V, ID = -1.5A 1.1 1.5 VGS = -10V, ID = -1.5A , TJ = 125°C 2.0 3.6 VDS = -40V, ID = -1.5A 1.4 (Note 4) Ω S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance VDS = -25V, VGS = 0V, f = 1MHz f = 1MHz 0.1 200 270 pF 60 80 pF 10 15 pF 7.5 15 Ω 15 27 ns 11 20 ns 19 35 ns 13 24 ns 6.2 9 nC Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time Qg Total Gate Charge Qgs Gate to Source Gate Charge Qgd Gate to Drain “Miller” Charge VDD = -75V, ID = -3A VGS = -10V, RGEN = 25Ω (Note 3,4) VGS = -10V VDD = -75V ID = -3A (Note 3,4) 1.4 nC 3.3 nC Drain-Source Diode Characteristics IS Maximum continuous Drain - Source Diode Forward Current -3 A ISM Maximum Pulse Drain - Source Doide Forward Current -12 A VSD Source to Drain Diode Forward Voltage VGS = 0V, IS = -3.0A trr Reverse Recovery Time IF = -3.0A, di/dt = 100A/μs Qrr Reverse Recovery Charge -1.8 (Note 3) -5 V 93 ns 0.27 μC Notes: 1: RθJA is the sum of the junction-to-case and case-to- ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 60°C/W when mounted on a 1 in2 pad of 2 oz copper 2: 3: 4: 5: b.135°C/W when mounted on a minimum pad of 2 oz copper ISD < -3A, dI/dt < 300A/us, VDD < BVDSS, Starting TJ = 25°C Pulse Test: Pulse Width < 300μs, Duty cycle < 2.0%. Essentially independent of operating temperature. EAS of 3.3 mJ is based on starting TJ = 25 °C; P-ch: L = 3 mH, IAS = -1.5 A, VDD = -150 V, VGS = -10 V. FDMC2523P Rev.1.4 2 www.fairchildsemi.com FDMC2523P P-Channel QFET® Electrical Characteristics TJ = 25°C unless otherwise noted FDMC2523P P-Channel QFET® Typical Characteristics TJ = 25°C unless otherwise noted 1.6 - ID, DRAIN CURRENT (A) VGS = -10V 2.5 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 3.0 PULSE DURATION = 300μs DUTY CYCLE = 2.0%MAX VGS = -8V 2.0 VGS = -7V VGS = -9V 1.5 1.0 VGS = -6V 0.5 0.0 0 2 4 6 8 -VDS, DRAIN TO SOURCE VOLTAGE (V) 1.4 VGS = -8V VGS = -9V 1.0 VGS = -10V 0.8 0.0 10 0.5 1.0 1.5 2.0 2.5 3.0 -ID, DRAIN CURRENT(A) Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 2.1 4.0 ID = -3A VGS = -10V 1.8 rDS(on), DRAIN TO SOURCE ON-RESISTANCE (Ω) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = -7V 1.2 Figure 1. On-Region Characteristics 1.5 1.2 0.9 0.6 0.3 -50 PULSE DURATION = 300μs DUTY CYCLE = 2.0%MAX 3.5 ID = -0.75A 3.0 2.5 TJ = 125oC 2.0 1.5 TJ = 25oC 1.0 -25 0 25 50 75 100 125 150 5 TJ, JUNCTION TEMPERATURE (oC) - IS, REVERSE DRAIN CURRENT (A) PULSE DURATION = 300μs DUTY CYCLE = 2.0%MAX VDD = -5V 2.0 1.5 TJ = 125oC 1.0 TJ = 25oC 0.5 TJ = -55oC 0.0 2 3 4 5 6 7 -VGS, GATE TO SOURCE VOLTAGE (V) 8 Figure 5. Transfer Characteristics FDMC2523P Rev.1.4 7 8 9 10 Figure 4. On-Resistance vs Gate to Source Voltage 3.0 2.5 6 -VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On- Resistance vs Junction Temperature - ID, DRAIN CURRENT (A) PULSE DURATION = 300μs DUTY CYCLE = 2.0%MAX VGS = -6V 10 VGS = 0V 1 TJ = 125oC 0.1 0.01 1E-3 1E-4 0.0 TJ = 25oC TJ = -55oC 0.5 1.0 1.5 2.0 -VSD, BODY DIODE FORWARD VOLTAGE (V) 2.5 Figure 6. Source to Drain Diode Forward Voltage vs Source Current 3 www.fairchildsemi.com FDMC2523P P-Channel QFET® 10 1000 ID = -3A VDD = -50V 8 Ciss VDD = -75V CAPACITANCE (pF) -VGS, GATE TO SOURCE VOLTAGE(V) Typical Characteristics TJ = 25°C unless otherwise noted VDD = -100V 6 4 2 100 Coss 10 Crss f = 1MHz VGS = 0V 0 0 2 4 6 Qg, GATE CHARGE(nC) 1 8 0 Figure 7. Gate Charge Characteristics 50 75 100 125 150 Figure 8. Capacitance vs Drain to Source Voltage 6 40 rDS(on) LIMITED 10 ID, DRAIN CURRENT (A) IAS, AVALANCHE CURRENT(A) 25 -VDS, DRAIN TO SOURCE VOLTAGE (V) TJ = 25oC TJ = 125oC 1 100us 1 1ms 10ms 0.1 100ms SINGLE PULSE TJ = MAX RATED 0.01 1s 10s DC o RθJA = 135 C/W TA = 25oC 0.5 -2 10 -1 0 10 1 10 10 1E-3 20 1 10 100 400 VDS, DRAIN to SOURCE VOLTAGE (V) tAV, TIME IN AVALANCHE(μs) Figure 9. Unclamped Inductive Switching Capability Figure 10. Forward Bias Safe Operating Area P(PK), PEAK TRANSIENT POWER (W) 500 TA = 25oC 100 FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS: 10 I = I25 150 – T A ----------------------125 SINGLE PULSE o 1 0.5 -4 10 RθJA = 135 C/W -3 10 -2 10 -1 10 t, PULSE WIDTH (s) 0 10 1 10 2 10 3 10 Figure 11. Single Pulse Maximum Power Dissipation FDMC2523P Rev.1.4 4 www.fairchildsemi.com FDMC2523P P-Channel QFET® r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE Typical Characteristics TJ = 25°C unless otherwise noted 2 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 NOTES: ZθJA(t) = r(t) x RθJA 0.01 0.001 -4 10 RθJA = 135 °C/W Peak TJ = PDM x ZθJA(t) + TA Duty Cycle, D = t1 / t2 SINGLE PULSE -3 10 -2 10 -1 10 1 10 2 10 3 10 t, RECTANGULAR PULSE DURATION (s) Figure 12. Transient Thermal Response Curve FDMC2523P Rev.1.4 5 www.fairchildsemi.com 3.30 0.05 C B A 2X 8 (3.40) 2.37 5 0.45(4X) 2.15 (1.70) 3.30 (0.40) KEEP OUT AREA (0.65) 0.70(4X) PIN#1 IDENT 0.05 C TOP VIEW 0.65 2X 1 4 0.42(8X) 1.95 RECOMMENDED LAND PATTERN 0.10 C 0.08 C NOTES: C SIDE VIEW SEATING PLANE A. DOES NOT CONFORM TO JEDEC REGISTRATION MO-229 B. DIMENSIONS ARE IN MILLIMETERS. 2.27+0.05 PIN #1 IDENT (0.50)4X (0.79) 1 C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 2009. D. LAND PATTERN RECOMMENDATION IS EXISTING INDUSTRY LAND PATTERN. 4 E. DRAWING FILENAME: MKT-MLP08Srev3. (0.35) (1.15) R0.15 8 0.65 5 1.95 BOTTOM VIEW 0.10 0.05 C A B C ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 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