FSUSB40L10X

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Configured as a double-pole, double-throw switch (DPDT) switch, it is optimized for switching between two Hi-Speed (480Mbps) sources or a Hi-Speed and Full-Speed (12Mbps) source. Low On Capacitance: 5.9pF Typical Low On Resistance: 3.9Ω Typical Low Power Consumption: 1μA Maximum - 15μA Maximum ICCT over an Expanded Voltage Range (VIN=1.8V, VCC=4.3V)   Wide -3db Bandwidth: > 720MHz Packaged in: - 10-Lead MicroPak™ (1.6 x 2.1mm) - 10-Lead UMLP (1.4 x 1.8mm)    8kV ESD Rating, >16kV Power/GND ESD Rating Power-Off Protection on All Ports When VCC=0V - D+/D- Pins Tolerate up to 5.25V Over-Voltage Tolerance (OVT) on all USB Ports Up to 5.25V without External Components Applications   Cell phone, PDA, Digital Camera, and Notebook LCD Monitor, TV, and Set-Top Box The FSUSB40 is compatible with the requirements of USB2.0 and features an extremely low on capacitance (CON) of 5.9pF. The wide bandwidth of this device (720MHz) exceeds the bandwidth needed to pass the third harmonic, resulting in signals with minimum edge and phase distortion. Superior channel-to-channel crosstalk also minimizes interference. The FSUSB40 contains special circuitry on the switch I/O pins for applications where the VCC supply is powered-off (VCC=0), which allows the device to withstand an over-voltage condition. This device is designed to minimize current consumption even when the control voltage applied to the SEL pin is lower than the supply voltage (VCC). This feature is especially valuable to ultra-portable applications, such as cell phones, allowing for direct interface with the generalpurpose I/Os of the baseband processor. Other applications include switching and connector sharing in portable cell phones, PDAs, digital cameras, printers, and notebook computers. IMPORTANT NOTE: For additional performance information, please contact analogswitch@fairchildsemi.com. Ordering Information Part Number Top Mark Operating Temperature Range FSUSB40L10X HD -40 to +85°C RoHS 10-Lead MicroPak™ 1.6 x 2.1mm, JEDEC MO-255B FSUSB40UMX HC -40 to +85°C Green 10-Lead, Quad, Ultrathin Molded Leadless Package (UMLP), 1.4 x 1.8mm Eco Status Package MicroPak™ is a trademark of Fairchild Semiconductor Corporation. For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. © 2007 Fairchild Semiconductor Corporation FSUSB40 • Rev. 1.0.8 www.fairchildsemi.com FSUSB40 — Low-Power, Two-Port, Hi-Speed, USB2.0 (480Mbps) Switch March 2013 HSD1+ D+ HSD2+ HSD1- D- HSD2Sel Control /OE Figure 1. Analog Symbol Pin Assignments V cc Sel 1 HSD1+ HSD2+ D+ 10 9 /OE 2 8 HSD1- 3 7 HSD2- 4 6 D+ HSD2+ HSD1+ 2 1 3 10 Sel GND 4 D- 5 D-- 5 9 Vcc 8 /OE 6 7 HSD2- HSD1- GND Figure 2. Pad Assignments for MicroPak™ (Top Through View) Figure 3. Pin Assignments for UMLP (Top Through View) FSUSB40 — Low-Power, Two-Port, Hi-Speed, USB2.0 (480Mbps) Switch Analog Symbol Pin Definitions MicroPak™ Pin # UMLP Pin # Name Description 9 8 /OE Switch Enable 1 10 Sel Switch Select 4, 6 3, 5 D+, D- USB Data Bus 2, 3, 7, 8 1, 2, 6, 7 HSDn+, HSDn- 5 4 GND Multiplexed Source inputs Ground Truth Table Sel /OE Function X H Disconnect L L D+, D-=HSD1+, HSD1- H L D+, D-=HSD2+, HSD2- © 2007 Fairchild Semiconductor Corporation FSUSB40 • Rev. 1.0.8 www.fairchildsemi.com 2 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VCC VCNTRL Parameter Supply Voltage DC Input Voltage (S, /OE) (1) (1) Min. Max. Unit -0.5 +5.5 V -0.5 VCC V 5.25 VSW DC Switch I/O Voltage -0.50 IIK DC Input Diode Current -50 IOUT DC Output Current TSTG Storage Temperature ESD -65 Human Body Model, JEDEC: JESD22-A114 100 mA +150 °C All Pins 7 I/O to GND 8 Power to GND 16 Charged Device Model, JEDEC: JESD22-C101 V mA kV 2 Note: 1. The input and output negative ratings may be exceeded if the input and output diode current ratings are observed. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol VCC VCNTRL VSW TA Parameter Supply Voltage Control Input Voltage (S, /OE) (2) Min. Max. Unit 3.0 4.3 V 0 VCC V Switch I/O Voltage -0.5 4.5 V Operating Temperature -40 +85 °C FSUSB40 — Low-Power, Two-Port, Hi-Speed, USB2.0 (480Mbps) Switch Absolute Maximum Ratings Note: 2. The control input must be held HIGH or LOW and it must not float. © 2007 Fairchild Semiconductor Corporation FSUSB40 • Rev. 1.0.8 www.fairchildsemi.com 3 All typical value are at 25°C unless otherwise specified. Symbol Parameter Conditions TA=- 40ºC to +85ºC Min. Typ. 3.0 Max. -1.2 Units VIK Clamp Diode Voltage VIH Input Voltage High VIL Input Voltage Low IIN Control Input Leakage VSW =0 to VCC 4.3 IOZ Off State Leakage 0 Dn, HSD1n, HSD2n 3.6V IOFF Power-Off Leakage Current (All I/O Ports) VSW =0V to 4.3V, VCC=0V Figure 5 RON HS Switch On Resistance(3) VSW =0.4V, ION=-8mA Figure 4 3.0 3.9 HS Delta Ron(4) VSW =0.4V, ION=-8mA 3.0 0.65 ICC Quiescent Supply Current VCNTRL=0 or Vcc, IOUT=0 4.3 1.0 µA Increase in ICC Current Per Control Voltage and VCC VCNTRL=2.6V VCC=4.3V 4.3 10.0 µA ICCT VCNTRL=1.8V VCC=4.3V 4.3 15.0 µA ∆RON IIN=-18mA VCC (V) 3.0 to 3.6 1.3 V 4.3 1.7 V 3.0 to 3.6 0.5 V 4.3 0.7 V -1 1 µA 4.3 -2 2 µA 0 -2 2 µA 6.5   Notes: 3. Measured by the voltage drop between HSDn and Dn pins at the indicated current through the switch. On resistance is determined by the lower of the voltage on the two (HSDn or Dn ports). 4. Guaranteed by characterization. © 2007 Fairchild Semiconductor Corporation FSUSB40 • Rev. 1.0.8 V FSUSB40 — Low-Power, Two-Port, Hi-Speed, USB2.0 (480Mbps) Switch DC Electrical Characteristics www.fairchildsemi.com 4 All typical value are for VCC=3.3V at 25°C unless otherwise specified. Symbol Parameter Conditions VCC (V) TA=- 40ºC to +85ºC Min. Typ. Max. Units tON Turn-On Time S, /OE to Output RL=50Ω, CL=5pF VSW =0.8V Figure 6, Figure 7 3.0 to 3.6 13 30 ns tOFF Turn-Off Time S, /OE to Output RL=50Ω, CL=5pF VSW =0.8V Figure 6, Figure 7 3.0 to 3.6 12 25 ns tPD Propagation Delay(5) CL=5 pF, RL=50Ω Figure 6, Figure 8 3.3 0.25 tBBM Break-Before-Make RL=50Ω, CL=5pF VSW1=VSW2=0.8V Figure 12 3.0 to 3.6 OIRR Off Isolation RL=50Ω, f=240MHz Figure 14 3.0 to 3.6 -30 dB Xtalk Non-Adjacent Channel Crosstalk RL=50Ω, f=240MHz Figure 15 3.0 to 3.6 -45 dB 720 MHz 550 MHz BW -3db Bandwidth RL=50Ω, CL=0pF Figure 13 2.0 ns 6.5 ns 3.0 to 3.6 RL=50Ω, CL=5pF Figure 13 Note: 5. Guaranteed by characterization. USB Hi-Speed-Related AC Electrical Characteristics Symbol tSK(P) tJ Parameter Skew of Opposite Transitions of the Same Output(6) Total Jitter (6) Conditions VCC (V) TA=- 40ºC to +85ºC Min. Typ. Max. Units CL=5pF, RL=50Ω Figure 9 3.0 to 3.6 20 ps RL=50Ω, CL=5pf, tR=tF=500ps (10-90%) at 480Mbps (PRBS=215 – 1) 3.0 to 3.6 200 ps FSUSB40 — Low-Power, Two-Port, Hi-Speed, USB2.0 (480Mbps) Switch AC Electrical Characteristics Note: 6. Guaranteed by characterization. Capacitance Symbol Parameter Conditions TA=- 40ºC to +85ºC Min. Typ. CIN Control Pin Input Capacitance VCC=0V 1.5 CON D+/D- On Capacitance VCC=3.3V, /OE=0V, f=1MHz Figure 11 5.9 COFF D1n, D2n Off Capacitance VCC and /OE=3.3V Figure 10 2.0 © 2007 Fairchild Semiconductor Corporation FSUSB40 • Rev. 1.0.8 Max. 6.5 Units pF www.fairchildsemi.com 5 VON I Dn(OFF) NC A HSDn VSW Dn VSW Select GND I ON GND Select R ON = V Sel = VON / ION V Sel = GND **Each switch port is tested separately 0 orV cc Figure 4. On Resistance HSDn Figure 5. Off Leakage tRISE = 2.5ns Dn VSW CL GND RS 0 orV V cc RL tFALL = 2.5ns VCC V OUT Input – V/OE , VSel GND 10% GND V Sel 90% 90% VCC /2 VCC /2 10% VOH 90% GND 90% Output- VOUT RL , RS , and C L are functions of the application environment (see AC Tables for specific values) CL includes test fixture and stray capacitance. VOL Figure 6. AC Test Circuit Load tON tOFF Figure 7. Turn-On / Turn-Off Waveforms tRISE = 500ps tFALL = 500ps FSUSB40 — Low-Power, Two-Port, Hi-Speed, USB2.0 (480Mbps) Switch Test Diagrams +400mV 90% 0V - 400mV 10% 90% 10% Output t PHL Figure 8. Propagation Delay (tRtF – 500ps) Figure 9. Intra-Pair Skew Test tSK(P) HSDn Capacitance Meter S Capacitance Meter HSDn S VSel = 0 or Vcc V Sel = 0 or Vcc HSDn HSDn Figure 10. Channel Off Capacitance © 2007 Fairchild Semiconductor Corporation FSUSB40 • Rev. 1.0.8 t PLH Figure 11. Channel On Capacitance www.fairchildsemi.com 6 tRISE = 2.5ns Vcc HSDn Dn VSW1 GND 10% 0V VOUT CL VSW2 90% Vcc/2 Input - VSel RL V OUT GND GND 0.9*Vout 0.9*Vout RS tBBM VSel RL , RS , and C L are functions of the application environment (see AC Tables for specific values) CL includes test fixture and stray capacitance. GND Figure 12. Break-Before-Make Interval Timing Network Analyzer RS V IN VS GND GND VSel GND VOUT GND RT GND RS and RT are functions of the application environment (see AC Tables for specific values). Figure 13. Bandwidth Network Analyzer RS VSel V IN GND RT VS FSUSB40 — Low-Power, Two-Port, Hi-Speed, USB2.0 (480Mbps) Switch Test Diagrams (Continued) GND GND V OUT GND GND RT RS and RT are functions of the application environment (see AC Tables for specific values). GND Off isolation = 20 Log (V OUT / VIN) Figure 14. Channel Off Isolation Network Analyzer NC RS GND V IN VS VSel GND GND RT GND GND RS and RT are functions of the application environment (see AC Tables for specific values). RT V OUT GND Crosstalk = 20 Log (VOUT / VIN) Figure 15. Non-Adjacent Channel-to-Channel Crosstalk © 2007 Fairchild Semiconductor Corporation FSUSB40 • Rev. 1.0.8 www.fairchildsemi.com 7 0.10 C 2.10 2X A 1.62 B KEEPOUT ZONE, NO TRACES OR VIAS ALLOWED (0.11) 0.56 1.12 1.60 PIN1 IDENT IS 2X LONGER THAN OTHER LINES 0.10 C 2X TOP VIEW (0.35) 10X (0.25) 10X 0.50 RECOMMENDED LAND PATTERN 0.55 MAX 0.05 C 0.05 C 0.05 0.00 (0.20) C 0.35 0.25 SIDE VIEW (0.15) D 0.65 0.55 DETAIL A 0.35 0.25 (0.36) 0.35 0.25 DETAIL A 2X SCALE 4 1 0.56 5 10 (0.29) 0.35 9X 0.25 6 9 0.50 0.25 9X 0.15 1.62 0.10 0.05 C A B C ALL FEATURES BOTTOM VIEW NOTES: A. PACKAGE CONFORMS TO JEDEC REGISTRATION MO-255, VARIATION UABD . B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. D. PRESENCE OF CENTER PAD IS PACKAGE SUPPLIER DEPENDENT. IF PRESENT IT IS NOT INTENDED TO BE SOLDERED AND HAS A BLACK OXIDE FINISH. E. DRAWING FILENAME: MKT-MAC10Arev5. FSUSB40 — Low-Power, Two-Port, Hi-Speed, USB2.0 (480Mbps) Switch Physical Dimensions Figure 16. 10-Lead MicroPak™ Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2007 Fairchild Semiconductor Corporation FSUSB40 • Rev. 1.0.8 www.fairchildsemi.com 8 0.15 C A 1.40 2X 1.700 B 9X 0.563 0.663 1 1.80 2.100 PIN #1 QUADRANT 0.400 0.15 C 2X 10X 0.225 TOP VIEW RECOMMENDED LAND PATTERN 0.55 MAX. 1.450 0.10 C 0.152 0.08 C 9X 0.450 0.550 SEATING PLANE 0.050 C 0.400 1.850 SIDE VIEW 10X 0.225 3 OPTIONAL MINIMIAL TOE LAND PATTERN 0.40 9X 0.35 0.45 0.45 0.55 6 1 10 0.500 0.15 10X 0.25 0.100 0.10 C A B 0.05 C FSUSB40 — Low-Power, Two-Port, Hi-Speed, USB2.0 (480Mbps) Switch Physical Dimensions 0.100 0.100 BOTTOM VIEW DETAIL A PIN #1 TERMINAL SCALE: 2X A. DIMENSIONS ARE IN MILLIMETERS. B. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 C. DRAWING FILENAME: UMLP10Arev2 Figure 17. 10-Lead, Ultrathin Molded Leadless Package (UMLP) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2007 Fairchild Semiconductor Corporation FSUSB40 • Rev. 1.0.8 www.fairchildsemi.com 9 FSUSB40 — Low-Power, Two-Port, Hi-Speed, USB2.0 (480Mbps) Switch © 2007 Fairchild Semiconductor Corporation FSUSB40 • Rev. 1.0.8 www.fairchildsemi.com 10 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. 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